#include <atmel_start.h>
#include "spi_slave_dma_config.h"
#include "ethercat/ethercat_e54.h"
#include "ethercat/ethercat_slave_def.h"

/* Buffer length to transfer/receive */
#define BUFFER_LEN (6)
#define SLAVE_BUFFER_SIZE	64

#define CONF_SERCOM_4_TRANSMIT_DMA_CHANNEL 2
#define CONF_SERCOM_4_RECEIVE_DMA_CHANNEL 3

/* DMA channel Descriptor */
extern DmacDescriptor _descriptor_section[DMAC_CH_NUM];
extern DmacDescriptor _write_back_section[DMAC_CH_NUM];

/* IO descriptor for SPI master */
struct io_descriptor *io_spi_master;

volatile uint8_t spi_master_tx_complete = 0;
volatile uint8_t spi_master_rx_complete = 0;
volatile uint8_t cs_pulled_high         = 0;
volatile uint8_t received_data_len      = 0;

//static uint8_t rx_buffer[BUFFER_LEN] = {0};
//static uint8_t tx_buffer[BUFFER_LEN] = "Hell0";

static uint8_t rx_buffer[SLAVE_BUFFER_SIZE] = {0};
static uint8_t tx_buffer[SLAVE_BUFFER_SIZE] =  {63,62,61,60,59,58,57,56,55,54,53,52,51,50,49,48,47,46,45,44,43,42,
	41,40,39,38,37,36,35,34,33,32,31,30,29,28,27,26,25,24,23,22,21,20,
												19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; 
												
												

/* DMA Transfer complete callback for SPI master TX */
static void spi_master_tx_complete_cb(struct _dma_resource *resource)
{
	/* Transfer completed */
	delay_us(CONF_DELAY_US);
	gpio_set_pin_level(SPI_CS, true);
	spi_master_tx_complete = true;
}

/* DMA Transfer complete callback for SPI master RX */
static void spi_master_rx_complete_cb(struct _dma_resource *resource)
{
	/* Transfer completed */
	gpio_set_pin_level(SPI_CS, true);
	spi_master_rx_complete = true;
}

/* Start SPI master data transfer */
void spi_master_transfer(uint8_t *buffer, uint8_t length)
{
	//spi_m_dma_enable(&SPI_0);
	gpio_set_pin_level(SPI_CS, false);
	//io_write(io_spi_master, buffer, length);
	spi_m_dma_transfer(&SPI_0,tx_buffer,rx_buffer,SLAVE_BUFFER_SIZE);
	
}

/* SPI master IO and Callback Initialization  */
void spi_master_init(void)
{
	spi_m_dma_get_io_descriptor(&SPI_0, &io_spi_master);
	spi_m_dma_register_callback(&SPI_0, SPI_M_DMA_CB_TX_DONE, spi_master_tx_complete_cb);
	spi_m_dma_register_callback(&SPI_0, SPI_M_DMA_CB_RX_DONE, spi_master_rx_complete_cb);
}

// ----------------------------------------------------------------------
// 	EtherCAT Cycle Timer - 1kHz
// ----------------------------------------------------------------------
void TC7_Handler(void)
{
	if (TC7->COUNT16.INTFLAG.bit.OVF == 0x01) {
		TC7->COUNT16.INTFLAG.bit.OVF = 0x01;
		//One_ms_cycle_callback();
		//gpio_toggle_pin_level(DEBUG_1);
		//tic_port(DEBUG_3_PORT);
		//tic_port(DEBUG_2_PORT);
		One_ms_cycle_callback();
		//toc_port(DEBUG_2_PORT);
		//Motor1.timerflags.motor_telemetry_flag = true;
		
	}
}


void enable_NVIC_IRQ(void)
{
	NVIC_EnableIRQ(TC7_IRQn);	 // TC7: TC_ECAT
}

int main(void)
{
	/* Initializes MCU, drivers and middleware */
	atmel_start_init();
	/* Initialize SPI master IO and Callback  */
	spi_master_init();
	spi_m_dma_enable(&SPI_0);
	//configure_ethercat_dma_descriptors();
	enable_NVIC_IRQ();
	
	/* Start SPI Master data transfer using DMA */
	//spi_master_rx(rx_buffer, BUFFER_LEN);
	//spi_master_tx(tx_buffer, SLAVE_BUFFER_SIZE);
	/* Start SPI Master data reception using DMA */
	//spi_master_rx(tx_buffer, BUFFER_LEN);
	printf("Init Complete\n\r");
	
	/* Replace with your application code */
	while (1) {
			
	}
}
