/*
 * bldc.h
 *
 * Created: 31/07/2021 14:56:02
 *  Author: Nick-XMG
 */ 


#ifndef BLDC_H_
#define BLDC_H_

// ----------------------------------------------------------------------
// 	M1 Hall Parameters
// ----------------------------------------------------------------------

#define M1_HALL_A_PIN					GPIO(GPIO_PORTA, 22)
#define M1_HALL_A_PORT					PORT_PA22
#define M1_HALL_A_MASK					~(1<<0)
#define M1_HALL_A_LSR					M1_HALL_A_PIN	- M1_HALL_A_GROUP*32 -0
#define M1_HALL_A_GROUP					M1_HALL_A_PIN/32

#define M1_HALL_B_PIN					GPIO(GPIO_PORTA, 23)
#define M1_HALL_B_PORT					PORT_PA23
#define M1_HALL_B_MASK					~(1<<1)
#define M1_HALL_B_LSR					M1_HALL_B_PIN	- M1_HALL_B_GROUP*32 -1
#define M1_HALL_B_GROUP					M1_HALL_B_PIN/32

#define M1_HALL_C_PIN					GPIO(GPIO_PORTA, 24)
#define M1_HALL_C_PORT					PORT_PA24
#define M1_HALL_C_MASK					~(1<<2)
#define M1_HALL_C_LSR					M1_HALL_C_PIN	- M1_HALL_C_GROUP*32 -2
#define M1_HALL_C_GROUP					M1_HALL_C_PIN/32

// ----------------------------------------------------------------------
// 	M2 Hall Parameters
// ----------------------------------------------------------------------

#define M2_HALL_A_PIN					GPIO(GPIO_PORTA, 4)
#define M2_HALL_A_PORT					PORT_PA04
#define M2_HALL_A_MASK					~(1<<0)
#define M2_HALL_A_LSR					M2_HALL_A_PIN	- M2_HALL_A_GROUP*32 -0
#define M2_HALL_A_GROUP					M2_HALL_A_PIN/32

#define M2_HALL_B_PIN					GPIO(GPIO_PORTA, 5)
#define M2_HALL_B_PORT					PORT_PA05
#define M2_HALL_B_MASK					~(1<<1)
#define M2_HALL_B_LSR					M2_HALL_B_PIN	- M2_HALL_B_GROUP*32 -1
#define M2_HALL_B_GROUP					M2_HALL_B_PIN/32

#define M2_HALL_C_PIN					GPIO(GPIO_PORTA, 6)
#define M2_HALL_C_PORT					PORT_PA06
#define M2_HALL_C_MASK					~(1<<2)
#define M2_HALL_C_LSR					M2_HALL_C_PIN	- M2_HALL_C_GROUP*32 -2
#define M2_HALL_C_GROUP					M2_HALL_C_PIN/32


static inline uint8_t readM1Hall(void)
{
	//volatile uint8_t motor_read = 0;
	//motor_read = (motor_read & M1_HALL_A_MASK) | (uint8_t)((PORT->Group[M1_HALL_A_GROUP].IN.reg & M1_HALL_A_PORT)>>(M1_HALL_A_LSR));
	//motor_read = (motor_read & M1_HALL_B_MASK) | (uint8_t)((PORT->Group[M1_HALL_B_GROUP].IN.reg & M1_HALL_B_PORT)>>(M1_HALL_B_LSR));
	//motor_read = (motor_read & M1_HALL_C_MASK) | (uint8_t)((PORT->Group[M1_HALL_C_GROUP].IN.reg & M1_HALL_C_PORT)>>(M1_HALL_C_LSR));
	//
	//return motor_read;
	volatile uint8_t a = gpio_get_pin_level(M1_HALL_A_PIN);
	volatile uint8_t b = gpio_get_pin_level(M1_HALL_B_PIN);
	volatile uint8_t c = gpio_get_pin_level(M1_HALL_C_PIN);
	
	return ((a << 2)	|
			(b << 1)	|
			(c << 0));
			
}

static inline uint8_t readM2Hall(void)
{
	//volatile uint8_t motor_read = 0;
	//motor_read = (motor_read & M2_HALL_A_MASK) | (uint8_t)((PORT->Group[M2_HALL_A_GROUP].IN.reg & M2_HALL_A_PORT)>>(M2_HALL_A_LSR));
	//motor_read = (motor_read & M2_HALL_B_MASK) | (uint8_t)((PORT->Group[M2_HALL_B_GROUP].IN.reg & M2_HALL_B_PORT)>>(M2_HALL_B_LSR));
	//motor_read = (motor_read & M2_HALL_C_MASK) | (uint8_t)((PORT->Group[M2_HALL_C_GROUP].IN.reg & M2_HALL_C_PORT)>>(M2_HALL_C_LSR));
	//
	//return motor_read;
	
	
	volatile uint8_t a = gpio_get_pin_level(M2_HALL_A_PIN);
	volatile uint8_t b = gpio_get_pin_level(M2_HALL_B_PIN);
	volatile uint8_t c = gpio_get_pin_level(M2_HALL_C_PIN);
	
	return ((a << 2)	|
			(b << 1)	|
			(c << 0));	
}


#endif /* BLDC_H_ */