init commit of examples

This commit is contained in:
Nicolas Trimborn
2021-07-13 12:25:44 +02:00
parent a74d1a099d
commit 5b57fb9584
666 changed files with 599088 additions and 42 deletions

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@@ -375,8 +375,7 @@
<armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
<armgcc.compiler.optimization.DebugLevel>Maximum (-g3)</armgcc.compiler.optimization.DebugLevel>
<armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
<armgcc.compiler.warnings.Pedantic>True</armgcc.compiler.warnings.Pedantic>
<armgcc.compiler.miscellaneous.OtherFlags>-std=gnu99 -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mfp16-format=ieee</armgcc.compiler.miscellaneous.OtherFlags>
<armgcc.compiler.miscellaneous.OtherFlags>-std=gnu99 -fsingle-precision-constant -Wdouble-promotion -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mfp16-format=ieee</armgcc.compiler.miscellaneous.OtherFlags>
<armgcc.linker.libraries.Libraries>
<ListValues>
<Value>libm</Value>

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@@ -192,15 +192,15 @@ void BLDC_runPosCntl(BLDCMotor_t *motor, int16_t posfbk, int16_t posRef);
// ----------------------------------------------------------------------
// Functions used with function pointers
// ----------------------------------------------------------------------
inline uint8_t readM1Hall(void);
inline uint8_t readM2Hall(void);
inline uint8_t readM3Hall(void);
uint8_t readM1Hall(void);
uint8_t readM2Hall(void);
uint8_t readM3Hall(void);
void DisableM1GateDrivers(BLDCMotor_t *motor);
void DisableM2GateDrivers(BLDCMotor_t *motor);
void DisableM3GateDrivers(BLDCMotor_t *motor);
inline void SetM1DutyCycle(const uint16_t duty);
inline void SetM2DutyCycle(const uint16_t duty);
inline void SetM3DutyCycle(const uint16_t duty);
void SetM1DutyCycle(const uint16_t duty);
void SetM2DutyCycle(const uint16_t duty);
void SetM3DutyCycle(const uint16_t duty);
// ----------------------------------------------------------------------
// all controller objects, variables and helpers:

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@@ -39,7 +39,7 @@
//while(1);
//}
inline void configure_tcc_pwm(void)
inline static void configure_tcc_pwm(void)
{
/* TCC0 */
@@ -115,7 +115,7 @@ inline void configure_TC_CCL_SPEED(void)
}
inline void adc_init_dma(void)
inline static void adc_init_dma(void)
{
adc_sram_dmac_init();
adc_dmac_sequence_init();

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@@ -24,7 +24,7 @@ void update_telemetry(void)
{
inline int16_t convert_to_mA(volatile float32_t current_PU)
{
return (int16_t)(current_PU*1000);
return (int16_t)(current_PU*1000.0f);
}
*state = applicationStatus.currentstate;
@@ -48,7 +48,7 @@ void update_setpoints(void)
{
inline float32_t convert_int_to_PU(volatile int16_t input)
{
return ((float32_t)input/1000.0f);
return ((float32_t)(input/1000.0f));
}
//Motor1.des_mode = 0;
//Motor1.set = 0;

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@@ -31,49 +31,49 @@ enum dma_transfer_descriptor_type {
// ----------------------------------------------------------------------
// Register Addresses
// ----------------------------------------------------------------------
#define read_var_num 32 //to change to 16bits need to change ecat spi lenght.
#define write_var_num 32 //max 20
#define read_var_num 32U //to change to 16bits need to change ecat spi lenght.
#define write_var_num 32U //max 20
// #define read_var_num 2 //to change to 16bits need to change ecat spi lenght.
// #define write_var_num 2 //max 20
#define ram_wr_start 0
#define ram_wr_start 0U
#define ram_rd_start write_var_num //write_var_num
#define ram_real_wr_start ram_rd_start + read_var_num
#define SPI_READ 0x03
#define SPI_WRITE 0x02
#define SPI_INC 0x40
#define SPI_DEC 0x80
#define TEST_VAL 0x87654321
#define CSR_BUSY 0x80000000
#define SPI_READ 0x03U
#define SPI_WRITE 0x02U
#define SPI_INC 0x40U
#define SPI_DEC 0x80U
#define TEST_VAL 0x87654321U
#define CSR_BUSY 0x80000000U
#define ADDR_BYTES 2
#define CSR_READ 1<<30
#define CSR_WRITE 0<<30
#define CSR_SIZE 4<<16
#define CSR_HW_RD 1<<27
#define ECAT_PRAM_RD_DATA 0x0000
#define ECAT_PRAM_WR_DATA 0x2000
#define ID_REV 0x5000
#define IRQ_CFG 0x5400
#define INT_STS 0x5800
#define INT_EN 0x5C00
#define BYTE_TEST 0x6400
#define HW_CFG 0x7400
#define PMT_CTRL 0x8400
#define GPT_CFG 0x8C00
#define GPT_CNT 0x9000
#define FREE_RUN 0x9C00
#define RESET_CTL 0xF801
#define ECAT_CSR_DATA 0x0003
#define ECAT_CSR_CMD 0x0403
#define ECAT_PRAM_RD_ADDR_LEN 0x0803
#define ECAT_PRAM_RD_CMD 0x0C03
#define ECAT_PRAM_WR_ADDR_LEN 0x1003
#define ECAT_PRAM_WR_CMD 0x1403
#define ECAT_PRAM_RD_DATA 0x0000U
#define ECAT_PRAM_WR_DATA 0x2000U
#define ID_REV 0x5000U
#define IRQ_CFG 0x5400U
#define INT_STS 0x5800U
#define INT_EN 0x5C00U
#define BYTE_TEST 0x6400U
#define HW_CFG 0x7400U
#define PMT_CTRL 0x8400U
#define GPT_CFG 0x8C00U
#define GPT_CNT 0x9000U
#define FREE_RUN 0x9C00U
#define RESET_CTL 0xF801U
#define ECAT_CSR_DATA 0x0003U
#define ECAT_CSR_CMD 0x0403U
#define ECAT_PRAM_RD_ADDR_LEN 0x0803U
#define ECAT_PRAM_RD_CMD 0x0C03U
#define ECAT_PRAM_WR_ADDR_LEN 0x1003U
#define ECAT_PRAM_WR_CMD 0x1403U
#define PDRAM_RD_ADDRESS 0x1100
#define PDRAM_WR_ADDRESS 0x1800
#define PDRAM_RD_ADDRESS 0x1100U
#define PDRAM_WR_ADDRESS 0x1800U
#define PDRAM_RD_LENGTH 2*read_var_num
#define PDRAM_WR_LENGTH 2*write_var_num