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init commit of examples

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This commit is contained in:
Nicolas Trimborn
2021-07-13 12:25:44 +02:00
parent a74d1a099d
commit 5b57fb9584
666 changed files with 599088 additions and 42 deletions
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66
Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_atomic.c Normal file
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/**
* \file
*
* \brief Critical sections related functionality implementation.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_atomic.h"
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
/**
* \brief Disable interrupts, enter critical section
*/
void atomic_enter_critical(hal_atomic_t volatile *atomic)
{
*atomic = __get_PRIMASK();
__disable_irq();
__DMB();
}
/**
* \brief Exit atomic section
*/
void atomic_leave_critical(hal_atomic_t volatile *atomic)
{
__DMB();
__set_PRIMASK(*atomic);
}
/**
* \brief Retrieve the current driver version
*/
uint32_t atomic_get_version(void)
{
return DRIVER_VERSION;
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_cache.c Normal file
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/**
* \file
*
* \brief HAL cache functionality implementation.
*
* Copyright (c)2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
*/
#include <compiler.h>
#include <hpl_cmcc.h>
/**
* \brief Initialize cache module
*/
int32_t cache_init(void)
{
return _cmcc_init();
}
/**
* \brief Enable cache module
*/
int32_t cache_enable(const void *hw)
{
return _cmcc_enable(hw);
}
/**
* \brief Disable cache module
*/
int32_t cache_disable(const void *hw)
{
return _cmcc_disable(hw);
}
/**
* \brief Configure cache module
*/
int32_t cache_configure(const void *hw, struct _cache_cfg *cache)
{
return _cmcc_configure(hw, cache);
}
/**
* \brief Invalidate entire cache entries
*/
int32_t cache_invalidate_all(const void *hw)
{
return _cmcc_invalidate_all(hw);
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_delay.c Normal file
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/**
* \file
*
* \brief HAL delay related functionality implementation.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include <hpl_irq.h>
#include <hpl_reset.h>
#include <hpl_sleep.h>
#include "hal_delay.h"
#include <hpl_delay.h>
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
/**
* \brief The pointer to a hardware instance used by the driver.
*/
static void *hardware;
/**
* \brief Initialize Delay driver
*/
void delay_init(void *const hw)
{
_delay_init(hardware = hw);
}
/**
* \brief Perform delay in us
*/
void delay_us(const uint16_t us)
{
_delay_cycles(hardware, _get_cycles_for_us(us));
}
/**
* \brief Perform delay in ms
*/
void delay_ms(const uint16_t ms)
{
_delay_cycles(hardware, _get_cycles_for_ms(ms));
}
/**
* \brief Retrieve the current driver version
*/
uint32_t delay_get_version(void)
{
return DRIVER_VERSION;
}

44
Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_gpio.c Normal file
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/**
* \file
*
* \brief Port
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_gpio.h"
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
uint32_t gpio_get_version(void)
{
return DRIVER_VERSION;
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_init.c Normal file
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/**
* \file
*
* \brief HAL initialization related functionality implementation.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_init.h"
/**
* \brief Driver version
*/
#define HAL_INIT_VERSION 0x00000001u
/**
* \brief Retrieve the current driver version
*/
uint32_t init_get_version(void)
{
return HAL_INIT_VERSION;
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_io.c Normal file
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/**
* \file
*
* \brief I/O functionality implementation.
*
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include <hal_io.h>
#include <utils_assert.h>
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
uint32_t io_get_version(void)
{
return DRIVER_VERSION;
}
/**
* \brief I/O write interface
*/
int32_t io_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
{
ASSERT(io_descr && buf);
return io_descr->write(io_descr, buf, length);
}
/**
* \brief I/O read interface
*/
int32_t io_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
{
ASSERT(io_descr && buf);
return io_descr->read(io_descr, buf, length);
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_sleep.c Normal file
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/**
* \file
*
* \brief Sleep related functionality implementation.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_sleep.h"
#include <hpl_sleep.h>
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
/**
* \brief Set the sleep mode of the device and put the MCU to sleep
*
* For an overview of which systems are disabled in sleep for the different
* sleep modes, see the data sheet.
*
* \param[in] mode Sleep mode to use
*
* \return The status of a sleep request
* \retval -1 The requested sleep mode was invalid or not available
* \retval 0 The operation completed successfully, returned after leaving the
* sleep
*/
int sleep(const uint8_t mode)
{
if (ERR_NONE != _set_sleep_mode(mode))
return ERR_INVALID_ARG;
_go_to_sleep();
return ERR_NONE;
}
/**
* \brief Retrieve the current driver version
*
* \return Current driver version
*/
uint32_t sleep_get_version(void)
{
return DRIVER_VERSION;
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_spi_m_dma.c Normal file
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/**
* \file
*
* \brief I/O SPI DMA related functionality implementation.
*
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_atomic.h"
#include "hal_spi_m_dma.h"
#include <utils_assert.h>
#include <utils.h>
/**
* \brief Driver version
*/
#define SPI_DRIVER_VERSION 0x00000001u
static int32_t _spi_m_dma_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t length);
static int32_t _spi_m_dma_io_read(struct io_descriptor *const io, uint8_t *const buf, const uint16_t length);
/**
* \brief Initialize the SPI HAL instance function pointer for HPL APIs.
*/
void spi_m_dma_set_func_ptr(struct spi_m_dma_descriptor *spi, void *const func)
{
ASSERT(spi);
spi->func = (struct _spi_m_dma_hpl_interface *)func;
}
int32_t spi_m_dma_init(struct spi_m_dma_descriptor *spi, void *const hw)
{
int32_t rc = 0;
ASSERT(spi && hw);
spi->dev.prvt = (void *)hw;
rc = _spi_m_dma_init(&spi->dev, hw);
if (rc) {
return rc;
}
spi->io.read = _spi_m_dma_io_read;
spi->io.write = _spi_m_dma_io_write;
return ERR_NONE;
}
void spi_m_dma_deinit(struct spi_m_dma_descriptor *spi)
{
ASSERT(spi);
_spi_m_dma_deinit(&spi->dev);
}
void spi_m_dma_enable(struct spi_m_dma_descriptor *spi)
{
ASSERT(spi);
_spi_m_dma_enable(&spi->dev);
}
void spi_m_dma_disable(struct spi_m_dma_descriptor *spi)
{
ASSERT(spi);
_spi_m_dma_disable(&spi->dev);
}
int32_t spi_m_dma_set_baudrate(struct spi_m_dma_descriptor *spi, const uint32_t baud_val)
{
ASSERT(spi);
return _spi_m_dma_set_baudrate(&spi->dev, baud_val);
}
int32_t spi_m_dma_set_mode(struct spi_m_dma_descriptor *spi, const enum spi_transfer_mode mode)
{
ASSERT(spi);
return _spi_m_dma_set_mode(&spi->dev, mode);
}
int32_t spi_m_dma_set_char_size(struct spi_m_dma_descriptor *spi, const enum spi_char_size char_size)
{
ASSERT(spi);
return _spi_m_dma_set_char_size(&spi->dev, char_size);
}
int32_t spi_m_dma_set_data_order(struct spi_m_dma_descriptor *spi, const enum spi_data_order dord)
{
ASSERT(spi);
return _spi_m_dma_set_data_order(&spi->dev, dord);
}
/** \brief Do SPI read in background
*
* It never blocks and return quickly, user check status or set callback to
* know when data is ready to process.
*
* \param[in, out] spi Pointer to the HAL SPI instance.
* \param[out] p_buf Pointer to the buffer to store read data.
* \param[in] size Size of the data in number of characters.
* \return ERR_NONE on success, or an error code on failure.
* \retval ERR_NONE Success, transfer started.
* \retval ERR_BUSY Busy.
*/
static int32_t _spi_m_dma_io_read(struct io_descriptor *io, uint8_t *const buf, const uint16_t length)
{
ASSERT(io);
struct spi_m_dma_descriptor *spi = CONTAINER_OF(io, struct spi_m_dma_descriptor, io);
return _spi_m_dma_transfer(&spi->dev, NULL, buf, length);
}
/** \brief Do SPI data write in background
*
* The data read back is discarded.
*
* It never blocks and return quickly, user check status or set callback to
* know when data is sent.
*
* \param[in, out] spi Pointer to the HAL SPI instance.
* \param[in] p_buf Pointer to the buffer to store data to write.
* \param[in] size Size of the data in number of characters.
*
* \return ERR_NONE on success, or an error code on failure.
* \retval ERR_NONE Success, transfer started.
* \retval ERR_BUSY Busy.
*/
static int32_t _spi_m_dma_io_write(struct io_descriptor *io, const uint8_t *const buf, const uint16_t length)
{
ASSERT(io);
struct spi_m_dma_descriptor *spi = CONTAINER_OF(io, struct spi_m_dma_descriptor, io);
return _spi_m_dma_transfer(&spi->dev, buf, NULL, length);
}
int32_t spi_m_dma_transfer(struct spi_m_dma_descriptor *spi, uint8_t const *txbuf, uint8_t *const rxbuf,
const uint16_t length)
{
ASSERT(spi);
return _spi_m_dma_transfer(&spi->dev, txbuf, rxbuf, length);
}
void spi_m_dma_register_callback(struct spi_m_dma_descriptor *spi, const enum spi_m_dma_cb_type type,
spi_m_dma_cb_t func)
{
ASSERT(spi);
_spi_m_dma_register_callback(&spi->dev, (enum _spi_dma_dev_cb_type)type, func);
}
int32_t spi_m_dma_get_io_descriptor(struct spi_m_dma_descriptor *const spi, struct io_descriptor **io)
{
ASSERT(spi && io);
*io = &spi->io;
return 0;
}
uint32_t spi_m_dma_get_version(void)
{
return SPI_DRIVER_VERSION;
}

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Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_spi_s_sync.c Normal file
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/**
* \file
*
* \brief I/O SPI related functionality implementation.
*
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_atomic.h"
#include "hal_spi_s_sync.h"
#include <utils_assert.h>
#include <utils.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \brief Driver version
*/
#define SPI_S_SYNC_DRIVER_VERSION 0x00000001u
/** Enable TX in transfer. */
#define SPI_XFER_TX_EN (1u << 0)
/** Enable RX in transfer. */
#define SPI_XFER_RX_EN (1u << 1)
/**
* \brief Transfer data
* \param[in, out] dev Pointer to the SPI device instance.
* \param[in] xfer Pointer to the transfer struct instance.
* \param[in] flags control options.
* \return Error or number of characters transferred.
* \retval <0 Error.
* \retval >=0 Number of characters transferred.
*/
static int32_t _spi_s_sync_xfer(struct spi_s_sync_descriptor *spi, const struct spi_xfer *xfer, const uint8_t flags)
{
uint32_t txcnt, rxcnt;
union {
uint16_t u16;
uint8_t u8[4];
} tmp;
uint32_t n_bytes;
ASSERT(spi && xfer);
if (xfer->size == 0) {
return 0;
}
n_bytes = xfer->size;
if (spi->dev.char_size > 1) {
n_bytes <<= 1;
}
tmp.u16 = 0;
for (txcnt = 0, rxcnt = 0; txcnt < n_bytes && rxcnt < n_bytes;) {
if (_spi_s_sync_is_error(&spi->dev)) {
return ERR_IO;
}
if ((flags & SPI_XFER_TX_EN) && _spi_s_sync_is_tx_ready(&spi->dev)) {
tmp.u8[0] = xfer->txbuf[txcnt++];
if (spi->dev.char_size > 1) {
tmp.u8[1] = xfer->txbuf[txcnt++];
}
_spi_s_sync_write_one(&spi->dev, tmp.u16);
}
if ((flags & SPI_XFER_RX_EN) && _spi_s_sync_is_rx_ready(&spi->dev)) {
tmp.u16 = _spi_s_sync_read_one(&spi->dev);
if (xfer->rxbuf) {
xfer->rxbuf[rxcnt++] = tmp.u8[0];
if (spi->dev.char_size > 1) {
xfer->rxbuf[rxcnt++] = tmp.u8[1];
}
}
}
if (spi->break_on_ss_det && _spi_s_sync_is_ss_deactivated(&spi->dev)) {
break;
}
}
if (spi->dev.char_size <= 1) {
return (flags & SPI_XFER_RX_EN) ? rxcnt : txcnt;
}
return ((flags & SPI_XFER_RX_EN) ? rxcnt : txcnt) >> 1;
}
/** \brief Do SPI data write
*
* Register background buffer to transmit data.
*
* It never blocks and return quickly, user check status or set callback to
* know when data is sent.
*
* \param[in] io Pointer to the I/O descriptor.
* \param[in] buf Pointer to the buffer to store data to write.
* \param[in] size Size of the data in number of characters.
* \return Operation status.
* \retval 0 Success.
* \retval -1 Busy, transfer in progress.
* \retval -3 Parameter error.
*/
static int32_t _spi_s_sync_io_write(struct io_descriptor *const io, const uint8_t *const buf, const uint16_t size)
{
struct spi_s_sync_descriptor *spi;
struct spi_xfer xfer;
ASSERT(io);
spi = CONTAINER_OF(io, struct spi_s_sync_descriptor, io);
xfer.txbuf = (uint8_t *)buf;
xfer.size = size;
return _spi_s_sync_xfer(spi, &xfer, SPI_XFER_TX_EN);
}
/** \brief Do SPI read from ring-buffer (asynchronously)
*
* Read available characters from ring-buffer and return number of characters
* read.
*
* It never blocks and return quickly, user check status or set callback to
* know when data is ready.
*
* \param[in] io Pointer to the I/O descriptor.
* \param[out] buf Pointer to the buffer to store read data,
NULL to discard data.
* \param[in] size Size of the data in number of characters.
* \return Read result.
* \retval n Number of characters read.
* \retval <0 Error.
*/
static int32_t _spi_s_sync_io_read(struct io_descriptor *const io, uint8_t *const buf, const uint16_t size)
{
struct spi_s_sync_descriptor *spi;
struct spi_xfer xfer;
ASSERT(io);
spi = CONTAINER_OF(io, struct spi_s_sync_descriptor, io);
xfer.rxbuf = (uint8_t *)buf;
xfer.size = size;
return _spi_s_sync_xfer(spi, &xfer, SPI_XFER_RX_EN);
}
/**
* \brief Initialize the SPI HAL instance function pointer for HPL APIs.
*/
void spi_s_sync_set_func_ptr(struct spi_s_sync_descriptor *spi, void *const func)
{
ASSERT(spi);
spi->func = (struct _spi_s_sync_hpl_interface *)func;
}
int32_t spi_s_sync_init(struct spi_s_sync_descriptor *spi, void *const hw)
{
int32_t rc;
ASSERT(spi && hw);
rc = _spi_s_sync_init(&spi->dev, hw);
if (rc < 0) {
return rc;
}
spi->io.read = _spi_s_sync_io_read;
spi->io.write = _spi_s_sync_io_write;
return ERR_NONE;
}
void spi_s_sync_deinit(struct spi_s_sync_descriptor *spi)
{
ASSERT(spi);
_spi_s_sync_deinit(&spi->dev);
}
void spi_s_sync_enable(struct spi_s_sync_descriptor *spi)
{
ASSERT(spi);
_spi_s_sync_enable(&spi->dev);
}
void spi_s_sync_disable(struct spi_s_sync_descriptor *spi)
{
ASSERT(spi);
_spi_s_sync_disable(&spi->dev);
}
int32_t spi_s_sync_set_mode(struct spi_s_sync_descriptor *spi, const enum spi_transfer_mode mode)
{
ASSERT(spi);
return _spi_s_sync_set_mode(&spi->dev, mode);
}
int32_t spi_s_sync_set_char_size(struct spi_s_sync_descriptor *spi, const enum spi_char_size char_size)
{
ASSERT(spi);
return _spi_s_sync_set_char_size(&spi->dev, char_size);
}
int32_t spi_s_sync_set_data_order(struct spi_s_sync_descriptor *spi, const enum spi_data_order dord)
{
ASSERT(spi);
return _spi_s_sync_set_data_order(&spi->dev, dord);
}
void spi_s_sync_break_on_ss_detect(struct spi_s_sync_descriptor *spi, const bool enable)
{
ASSERT(spi);
spi->break_on_ss_det = enable;
}
int32_t spi_s_sync_transfer(struct spi_s_sync_descriptor *spi, const struct spi_xfer *xfer)
{
return _spi_s_sync_xfer(spi, xfer, SPI_XFER_RX_EN | SPI_XFER_TX_EN);
}
int32_t spi_s_sync_get_io_descriptor(struct spi_s_sync_descriptor *spi, struct io_descriptor **io)
{
ASSERT(spi && io);
*io = &spi->io;
return ERR_NONE;
}
uint32_t spi_s_sync_get_version(void)
{
return SPI_S_SYNC_DRIVER_VERSION;
}
#ifdef __cplusplus
}
#endif

276
Examples/SPISLAVEDMA/SPISLAVEDMA(3)/hal/src/hal_usart_sync.c Normal file
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@@ -0,0 +1,276 @@
/**
* \file
*
* \brief I/O USART related functionality implementation.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_usart_sync.h"
#include <utils_assert.h>
#include <utils.h>
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length);
static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length);
/**
* \brief Initialize usart interface
*/
int32_t usart_sync_init(struct usart_sync_descriptor *const descr, void *const hw, void *const func)
{
int32_t init_status;
ASSERT(descr && hw);
init_status = _usart_sync_init(&descr->device, hw);
if (init_status) {
return init_status;
}
descr->io.read = usart_sync_read;
descr->io.write = usart_sync_write;
return ERR_NONE;
}
/**
* \brief Uninitialize usart interface
*/
int32_t usart_sync_deinit(struct usart_sync_descriptor *const descr)
{
ASSERT(descr);
_usart_sync_deinit(&descr->device);
descr->io.read = NULL;
descr->io.write = NULL;
return ERR_NONE;
}
/**
* \brief Enable usart interface
*/
int32_t usart_sync_enable(struct usart_sync_descriptor *const descr)
{
ASSERT(descr);
_usart_sync_enable(&descr->device);
return ERR_NONE;
}
/**
* \brief Disable usart interface
*/
int32_t usart_sync_disable(struct usart_sync_descriptor *const descr)
{
ASSERT(descr);
_usart_sync_disable(&descr->device);
return ERR_NONE;
}
/**
* \brief Retrieve I/O descriptor
*/
int32_t usart_sync_get_io_descriptor(struct usart_sync_descriptor *const descr, struct io_descriptor **io)
{
ASSERT(descr && io);
*io = &descr->io;
return ERR_NONE;
}
/**
* \brief Specify action for flow control pins
*/
int32_t usart_sync_set_flow_control(struct usart_sync_descriptor *const descr,
const union usart_flow_control_state state)
{
ASSERT(descr);
_usart_sync_set_flow_control_state(&descr->device, state);
return ERR_NONE;
}
/**
* \brief Set usart baud rate
*/
int32_t usart_sync_set_baud_rate(struct usart_sync_descriptor *const descr, const uint32_t baud_rate)
{
ASSERT(descr);
_usart_sync_set_baud_rate(&descr->device, baud_rate);
return ERR_NONE;
}
/**
* \brief Set usart data order
*/
int32_t usart_sync_set_data_order(struct usart_sync_descriptor *const descr, const enum usart_data_order data_order)
{
ASSERT(descr);
_usart_sync_set_data_order(&descr->device, data_order);
return ERR_NONE;
}
/**
* \brief Set usart mode
*/
int32_t usart_sync_set_mode(struct usart_sync_descriptor *const descr, const enum usart_mode mode)
{
ASSERT(descr);
_usart_sync_set_mode(&descr->device, mode);
return ERR_NONE;
}
/**
* \brief Set usart parity
*/
int32_t usart_sync_set_parity(struct usart_sync_descriptor *const descr, const enum usart_parity parity)
{
ASSERT(descr);
_usart_sync_set_parity(&descr->device, parity);
return ERR_NONE;
}
/**
* \brief Set usart stop bits
*/
int32_t usart_sync_set_stopbits(struct usart_sync_descriptor *const descr, const enum usart_stop_bits stop_bits)
{
ASSERT(descr);
_usart_sync_set_stop_bits(&descr->device, stop_bits);
return ERR_NONE;
}
/**
* \brief Set usart character size
*/
int32_t usart_sync_set_character_size(struct usart_sync_descriptor *const descr, const enum usart_character_size size)
{
ASSERT(descr);
_usart_sync_set_character_size(&descr->device, size);
return ERR_NONE;
}
/**
* \brief Retrieve the state of flow control pins
*/
int32_t usart_sync_flow_control_status(const struct usart_sync_descriptor *const descr,
union usart_flow_control_state *const state)
{
ASSERT(descr && state);
*state = _usart_sync_get_flow_control_state(&descr->device);
return ERR_NONE;
}
/**
* \brief Check if the usart transmitter is empty
*/
int32_t usart_sync_is_tx_empty(const struct usart_sync_descriptor *const descr)
{
ASSERT(descr);
return _usart_sync_is_ready_to_send(&descr->device);
}
/**
* \brief Check if the usart receiver is not empty
*/
int32_t usart_sync_is_rx_not_empty(const struct usart_sync_descriptor *const descr)
{
ASSERT(descr);
return _usart_sync_is_byte_received(&descr->device);
}
/**
* \brief Retrieve the current driver version
*/
uint32_t usart_sync_get_version(void)
{
return DRIVER_VERSION;
}
/*
* \internal Write the given data to usart interface
*
* \param[in] descr The pointer to an io descriptor
* \param[in] buf Data to write to usart
* \param[in] length The number of bytes to write
*
* \return The number of bytes written.
*/
static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
{
uint32_t offset = 0;
struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
ASSERT(io_descr && buf && length);
while (!_usart_sync_is_ready_to_send(&descr->device))
;
do {
_usart_sync_write_byte(&descr->device, buf[offset]);
while (!_usart_sync_is_ready_to_send(&descr->device))
;
} while (++offset < length);
while (!_usart_sync_is_transmit_done(&descr->device))
;
return (int32_t)offset;
}
/*
* \internal Read data from usart interface
*
* \param[in] descr The pointer to an io descriptor
* \param[in] buf A buffer to read data to
* \param[in] length The size of a buffer
*
* \return The number of bytes read.
*/
static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
{
uint32_t offset = 0;
struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
ASSERT(io_descr && buf && length);
do {
while (!_usart_sync_is_byte_received(&descr->device))
;
buf[offset] = _usart_sync_read_byte(&descr->device);
} while (++offset < length);
return (int32_t)offset;
}