diff --git a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/.atmelstart/atmel_start_config.atstart b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/.atmelstart/atmel_start_config.atstart
index 89c10b1..98ef807 100644
--- a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/.atmelstart/atmel_start_config.atstart
+++ b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/.atmelstart/atmel_start_config.atstart
@@ -471,7 +471,7 @@ drivers:
       dmac_evact_4: Channel resume operation
       dmac_evact_5: Channel resume operation
       dmac_evact_6: Channel resume operation
-      dmac_evact_7: No action
+      dmac_evact_7: Channel resume operation
       dmac_evact_8: No action
       dmac_evact_9: No action
       dmac_evie_0: false
@@ -1154,8 +1154,8 @@ drivers:
       evsys_evd_31: false
       evsys_evd_4: false
       evsys_evd_5: false
-      evsys_evd_6: true
-      evsys_evd_7: true
+      evsys_evd_6: false
+      evsys_evd_7: false
       evsys_evd_8: false
       evsys_evd_9: false
       evsys_evgen_0: TCC0 overflow
diff --git a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_dmac_config.h b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_dmac_config.h
index dbbe6bf..d0c697d 100644
--- a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_dmac_config.h
+++ b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_dmac_config.h
@@ -1821,7 +1821,7 @@
 // <i> Defines the event input action
 // <id> dmac_evact_7
 #ifndef CONF_DMAC_EVACT_7
-#define CONF_DMAC_EVACT_7 0
+#define CONF_DMAC_EVACT_7 5
 #endif
 
 // <o> Address Increment Step Size
diff --git a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_evsys_config.h b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_evsys_config.h
index b193999..1e29ec3 100644
--- a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_evsys_config.h
+++ b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Config/hpl_evsys_config.h
@@ -1252,7 +1252,7 @@
 // <i> Indicates whether event detected interrupt is enabled or not
 // <id> evsys_evd_6
 #ifndef CONF_EVD_6
-#define CONF_EVD_6 1
+#define CONF_EVD_6 0
 #endif
 
 // <q> On demand clock
@@ -1433,7 +1433,7 @@
 // <i> Indicates whether event detected interrupt is enabled or not
 // <id> evsys_evd_7
 #ifndef CONF_EVD_7
-#define CONF_EVD_7 1
+#define CONF_EVD_7 0
 #endif
 
 // <q> On demand clock
diff --git a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Two_Motor_D51.cproj b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Two_Motor_D51.cproj
index e089fa0..f08b2bb 100644
--- a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Two_Motor_D51.cproj
+++ b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/Two_Motor_D51.cproj
@@ -207,9 +207,9 @@
           <AcmeProjectActionInfo Action="File" Source="config/hpl_adc_config.h" IsConfig="true" Hash="njPXrYAhTILjVoEBy+zV6A" />
           <AcmeProjectActionInfo Action="File" Source="config/hpl_ccl_config.h" IsConfig="true" Hash="Q1yijLwNXjFOsGrwEEma+g" />
           <AcmeProjectActionInfo Action="File" Source="config/hpl_cmcc_config.h" IsConfig="true" Hash="bmtxQ8rLloaRtAo2HeXZRQ" />
-          <AcmeProjectActionInfo Action="File" Source="config/hpl_dmac_config.h" IsConfig="true" Hash="sfjBs3WMrKijBJZly88uDg" />
+          <AcmeProjectActionInfo Action="File" Source="config/hpl_dmac_config.h" IsConfig="true" Hash="Q6MypoZbcXVNOfGMM0+3Cg" />
           <AcmeProjectActionInfo Action="File" Source="config/hpl_eic_config.h" IsConfig="true" Hash="Zre11F0UnVVaJqMRScEOwA" />
-          <AcmeProjectActionInfo Action="File" Source="config/hpl_evsys_config.h" IsConfig="true" Hash="Ib+nrA6a7bLl8ib01Fr5PQ" />
+          <AcmeProjectActionInfo Action="File" Source="config/hpl_evsys_config.h" IsConfig="true" Hash="5A+5XSEs+eoLM4zXmSnbpg" />
           <AcmeProjectActionInfo Action="File" Source="config/hpl_gclk_config.h" IsConfig="true" Hash="fvc5nhPTGTNHCTNlzs6nhA" />
           <AcmeProjectActionInfo Action="File" Source="config/hpl_mclk_config.h" IsConfig="true" Hash="pxBzoQXTG66x4dbzVzxteg" />
           <AcmeProjectActionInfo Action="File" Source="config/hpl_osc32kctrl_config.h" IsConfig="true" Hash="HgvzEqDUH4jq/syjj/+G+Q" />
diff --git a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/hpl/tc/tc_lite.c b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/hpl/tc/tc_lite.c
index 736464a..9019c36 100644
--- a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/hpl/tc/tc_lite.c
+++ b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/hpl/tc/tc_lite.c
@@ -78,7 +78,7 @@ int8_t TIMER_0_init()
 
 	hri_tccount8_write_CC_reg(TC0, 0, 0xa); /* Compare/Capture Value: 0xa */
 
-	hri_tccount8_write_CC_reg(TC0, 1, 0x80); /* Compare/Capture Value: 0x3c */
+	hri_tccount8_write_CC_reg(TC0, 1, 0x3c); /* Compare/Capture Value: 0x3c */
 
 	// hri_tccount8_write_COUNT_reg(TC0,0x0); /* Counter Value: 0x0 */
 
diff --git a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/main.c b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/main.c
index 442b0b3..69ada91 100644
--- a/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/main.c
+++ b/2_Motor_Master_D51/Two_Motor_D51/Two_Motor_D51/main.c
@@ -71,7 +71,7 @@ void enable_NVIC_IRQ(void)
 	NVIC_SetPriority(ADC1_0_IRQn, 3);
 	NVIC_EnableIRQ(TCC0_0_IRQn);
 	//NVIC_EnableIRQ(TCC1_0_IRQn);
-	NVIC_EnableIRQ(EIC_2_IRQn);
+	//NVIC_EnableIRQ(EIC_2_IRQn);
 	         
 	NVIC_EnableIRQ(SERCOM1_1_IRQn);
 	NVIC_EnableIRQ(SERCOM2_1_IRQn);
@@ -208,37 +208,19 @@ int main(void)
 			Motor1.timerflags.motor_telemetry_flag = false;	
 
 			//DMAC->Channel[CONF_SERCOM_1_SPI_M_DMA_RX_CHANNEL].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
-			if (DMAC->Channel[CONF_SERCOM_1_SPI_M_DMA_TX_CHANNEL].CHCTRLA.bit.ENABLE)
-				{
-				/* Resume */
-					//DMAC->Channel[CONF_SERCOM_1_SPI_M_DMA_TX_CHANNEL].CHCTRLB.bit.CMD = 0x02;
-					volatile int x = 0;
-				}
-			else {
+			if (!(DMAC->Channel[CONF_SERCOM_1_SPI_M_DMA_TX_CHANNEL].CHCTRLA.bit.ENABLE)) {
+				/* Enable */
+				DMAC->Channel[CONF_SERCOM_1_SPI_M_DMA_TX_CHANNEL].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;	
+			}		
+			
+			if(!(DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLA.bit.ENABLE)) {
 			/* Enable */
-					DMAC->Channel[CONF_SERCOM_1_SPI_M_DMA_TX_CHANNEL].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;	
-			}			
+			DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
+			
+			}	
 					
 			update_telemetry();
 			update_setpoints();
-				
-			//PORT->Group[1].OUTCLR.reg = (1<<GPIO_PIN(SPI1_CS));
-
-			//_dma_enable_transaction(CONF_SERCOM_1_SPI_M_DMA_RX_CHANNEL, false);
-			//_dma_enable_transaction(CONF_SERCOM_1_SPI_M_DMA_TX_CHANNEL, false);
-			
-			volatile int16_t* angles = 0;
-			//angles = read_angle();
-			//Motor1.motor_status.abs_position = degrees(angles[0]);
-			//Motor2.motor_status.abs_position = degrees(angles[1]);		
-			
-			////field = ang_sense_read(AS_CMD_MAGNITUDE);
-			//*Spare1_tx = (field[0] & AS_MASK);
-			//*Spare2_tx = (field[1] & AS_MASK);
-			//temp =  ang_sense_read(AS_CMD_TEMP);
-			//*Spare3_tx = (int16_t)(((float)(temp[0] & AS_MASK) / 8.0) -  273.15);
-			//*Spare4_tx = (int16_t)(((float)(temp[1] & AS_MASK) / 8.0) -  273.15);
-
 		}
 		
 		if (Motor1.timerflags.current_loop_tic) {
@@ -248,43 +230,9 @@ int main(void)
 				exec_commutation(&Motor2);
 		}
 		
-		if (DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLA.bit.ENABLE)
-			{
-			/* Resume */
-				//DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLB.bit.CMD = 0x02;
-				volatile int x = 0;
-			} else {
-				DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
-			/* Enable */
-			//DMAC->Channel[8].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
-				
-		}		
-		
-		if (ADS1299.data_ReadyFlag){
-			ADS1299.data_ReadyFlag = false;
-			//PORT->Group[0].OUTCLR.reg = (1<<GPIO_PIN(SPI2_SS));
 			
-			if (DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLA.bit.ENABLE)
-			{
-			/* Resume */
-				//DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLB.bit.CMD = 0x02;
-				volatile int x = 0;
-			} else {
-				DMAC->Channel[CONF_SERCOM_2_SPI_M_DMA_TX_CHANNEL].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
-			/* Enable */
-			//DMAC->Channel[8].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
-				
-			}		
 			
-			//_dma_enable_transaction(2, false);
-			//_dma_enable_transaction(8, false);
-					
-			
-			//ADS1299_UPDATECHANNELDATA();
-		}
-
-		if (run_ECAT) {ECAT_STATE_MACHINE();}	
-		
+		if(run_ECAT) {ECAT_STATE_MACHINE();}	
 	}
 }