32 lines
1.4 KiB
C
32 lines
1.4 KiB
C
#include <samd21g18a.h>
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#include "SPI.h"
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/* initialize SPI on SERCOM0 with MOSI on pad 0 (pin PA08) */
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void SPI_init(void)
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{
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/* enable peripheral clock */
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PM->APBCMASK.bit.SERCOM0_ = 1;
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/* enable generic clock */
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GCLK->CLKCTRL.bit.ID = GCLK_CLKCTRL_ID_SERCOM0_CORE_Val; // configure generic clock for SERCOM0
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GCLK->CLKCTRL.bit.GEN = GCLK_CLKCTRL_GEN_GCLK0_Val; // source is generic clock generator 0
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GCLK->CLKCTRL.bit.CLKEN = 1; // enable generic clock
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/* select GPIO pins alternative function */
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PORT->Group[0].PINCFG[8].bit.PMUXEN = 1; // enable alternative function for pin PA08
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PORT->Group[0].PMUX[4].bit.PMUXE = MUX_PA08C_SERCOM0_PAD0; // PA08 alternative function C (SERCOM0 pad 0)
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/* configure peripheral */
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SERCOM0->SPI.CTRLA.bit.DOPO = 0x00; // MOSI on pad 0 (pin PA08)
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SERCOM0->SPI.CTRLA.bit.CPHA = 0x00;
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SERCOM0->SPI.CTRLA.bit.CPOL = 0x00; // transfer mode 0
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SERCOM0->SPI.CTRLA.bit.DORD = 0x00; // MSB first
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SERCOM0->SPI.CTRLA.bit.MODE = 0x03; // SPI master operation
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SERCOM0->SPI.CTRLB.bit.CHSIZE = 0x00; // 8 bit character size
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SERCOM0->SPI.BAUD.reg = 9; // SPI frequency 2.4 MHz (BAUD = gclk/(2*f_baud) - 1)
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/* enable peripheral */
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SERCOM0->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE;
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}
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