routine commit

.gitignore

@@ -1,22 +1,22 @@
-# ---> AltiumDesigner
+# ---> AltiumDesigner
-# For PCBs designed using Altium Designer
+# For PCBs designed using Altium Designer
-# Website: https://www.altium.com/altium-designer/
+# Website: https://www.altium.com/altium-designer/
-
+
-# Directories containing cache data
+# Directories containing cache data
-History
+History
-__Previews
+__Previews
-
+
-# Directories containing logs and generated outputs
+# Directories containing logs and generated outputs
-Project\ Logs*
+Project\ Logs*
-Project\ Outputs*
+Project\ Outputs*
-
+
-# Misc files generated by altium
+# Misc files generated by altium
-debug.log
+debug.log
-Status\ Report.txt
+Status\ Report.txt
-*.PcbDoc.htm
+*.PcbDoc.htm
-*.SchDocPreview
+*.SchDocPreview
-*.PcbDocPreview
+*.PcbDocPreview
-
+
-# Lock files sometimes left behind
+# Lock files sometimes left behind
-.~lock.*
+.~lock.*
-*.LOG
+*.LOG

Mosfets.cmp

@@ -1,18 +1,18 @@
-Component Name : IAUC45N04S6L063H
+Component Name : IAUC45N04S6L063H
-
+
-Part Count : 2
+Part Count : 2
-
+
-Part : Q?
+Part : Q?
-     Pins - (Normal) : 0
+     Pins - (Normal) : 0
-          Hidden Pins : 
+          Hidden Pins : 
-
+
-Part : Q?
+Part : Q?
-     Pins - (Normal) : 6
+     Pins - (Normal) : 6
-          SOURCE1        2              Passive
+          SOURCE1        2              Passive
-          GATE2          4              Passive
+          GATE2          4              Passive
-          GATE1          1              Passive
+          GATE1          1              Passive
-          SOURCE2_1      5, 6           Passive
+          SOURCE2_1      5, 6           Passive
-          DRAIN2         3              Passive
+          DRAIN2         3              Passive
-          SOURCE2_1      7,8            Passive
+          SOURCE2_1      7,8            Passive
-          Hidden Pins : 
+          Hidden Pins : 
-
+