routine commit

.gitignore

@@ -1,22 +1,22 @@
-# ---> AltiumDesigner
-# For PCBs designed using Altium Designer
-# Website: https://www.altium.com/altium-designer/
-
-# Directories containing cache data
-History
-__Previews
-
-# Directories containing logs and generated outputs
-Project\ Logs*
-Project\ Outputs*
-
-# Misc files generated by altium
-debug.log
-Status\ Report.txt
-*.PcbDoc.htm
-*.SchDocPreview
-*.PcbDocPreview
-
-# Lock files sometimes left behind
-.~lock.*
-*.LOG
+# ---> AltiumDesigner
+# For PCBs designed using Altium Designer
+# Website: https://www.altium.com/altium-designer/
+
+# Directories containing cache data
+History
+__Previews
+
+# Directories containing logs and generated outputs
+Project\ Logs*
+Project\ Outputs*
+
+# Misc files generated by altium
+debug.log
+Status\ Report.txt
+*.PcbDoc.htm
+*.SchDocPreview
+*.PcbDocPreview
+
+# Lock files sometimes left behind
+.~lock.*
+*.LOG

Mosfets.cmp

@@ -1,18 +1,18 @@
-Component Name : IAUC45N04S6L063H
-
-Part Count : 2
-
-Part : Q?
-     Pins - (Normal) : 0
-          Hidden Pins : 
-
-Part : Q?
-     Pins - (Normal) : 6
-          SOURCE1        2              Passive
-          GATE2          4              Passive
-          GATE1          1              Passive
-          SOURCE2_1      5, 6           Passive
-          DRAIN2         3              Passive
-          SOURCE2_1      7,8            Passive
-          Hidden Pins : 
-
+Component Name : IAUC45N04S6L063H
+
+Part Count : 2
+
+Part : Q?
+     Pins - (Normal) : 0
+          Hidden Pins : 
+
+Part : Q?
+     Pins - (Normal) : 6
+          SOURCE1        2              Passive
+          GATE2          4              Passive
+          GATE1          1              Passive
+          SOURCE2_1      5, 6           Passive
+          DRAIN2         3              Passive
+          SOURCE2_1      7,8            Passive
+          Hidden Pins : 
+