multi motor commutation implemented

This commit is contained in:
Nicolas Trimborn 2021-05-03 23:13:02 +02:00
parent 1d03af6dd3
commit 598ac6bd87
77 changed files with 749 additions and 2864 deletions

Binary file not shown.

View File

@ -47,7 +47,6 @@
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/evsys.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/ext_irq.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/pdec_async.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/pwm.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/spi_master_dma.rst"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_atomic.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_cache.h"/>
@ -109,6 +108,7 @@
<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_ringbuffer.c"/>
<file category="source" condition="GCC" name="hal/utils/src/utils_syscalls.c"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hpl/doc_lite/tc.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hpl/doc_lite/tcc.rst"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_ac_e54.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_adc_e54.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_aes_e54.h"/>
@ -155,23 +155,19 @@
<file category="header" condition="ARMCC, GCC, IAR" name="examples/driver_examples.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="examples/driver_examples.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_adc_async.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_pwm.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_async.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_sync.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_missing_features.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_pwm.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_reset.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_async.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_dma.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_sync.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_async.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_sync.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_timer.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_async.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_sync.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_adc_async.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_ext_irq.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_pwm.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_spi_m_dma.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/parts.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/adc/hpl_adc.c"/>
@ -197,8 +193,8 @@
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/sercom/hpl_sercom.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/tc/tc_lite.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/tc/tc_lite.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/tcc/hpl_tcc.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/tcc/hpl_tcc.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/tcc/tcc_lite.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/tcc/tcc_lite.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="atmel_start.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="atmel_start.c"/>
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_adc_config.h"/>
@ -214,7 +210,6 @@
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_pdec_config.h"/>
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_port_config.h"/>
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_sercom_config.h"/>
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_tcc_config.h"/>
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/peripheral_clk_config.h"/>
<file category="include" condition="ARMCC, GCC, IAR" name=""/>
<file category="include" condition="ARMCC, GCC, IAR" name="config"/>

View File

@ -1900,55 +1900,387 @@ drivers:
external_frequency: 0
configuration:
tc_gclk_selection: Generic clock generator 0
TCC_PWM2:
user_label: TCC_PWM2
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::TCC0::driver_config_definition::PWM.Mode::Lite:TCC:PWM
functionality: PWM
api: Lite:TCC:PWM
configuration:
cc_cc0: 0
cc_cc1: 0
cc_cc2: 0
cc_cc3: 0
cc_cc4: 0
cc_cc5: 0
cc_control: true
ctrla_alock: false
ctrla_control: true
ctrla_enable: true
ctrla_prescaler: DIV2
ctrla_prescsync: GCLK
ctrla_runstdby: false
ctrlbset_cmd: NONE
ctrlbset_control: false
ctrlbset_dir: false
ctrlbset_idxcmd: DISABLE
ctrlbset_lupd: false
ctrlbset_oneshot: false
dbgctrl_control: false
dbgctrl_dbgrun: false
dbgctrl_fddbd: false
drvctrl_control: false
drvctrl_filterval0: 0
drvctrl_filterval1: 0
drvctrl_inven0: false
drvctrl_inven1: false
drvctrl_inven2: false
drvctrl_inven3: false
drvctrl_inven4: false
drvctrl_inven5: false
drvctrl_inven6: false
drvctrl_inven7: false
drvctrl_nre0: false
drvctrl_nre1: false
drvctrl_nre2: false
drvctrl_nre3: false
drvctrl_nre4: false
drvctrl_nre5: false
drvctrl_nre6: false
drvctrl_nre7: false
drvctrl_nrv0: false
drvctrl_nrv1: false
drvctrl_nrv2: false
drvctrl_nrv3: false
drvctrl_nrv4: false
drvctrl_nrv5: false
drvctrl_nrv6: false
drvctrl_nrv7: false
evctrl_cnteo: false
evctrl_cntsel: START
evctrl_control: true
evctrl_evact0: 'OFF'
evctrl_evact1: 'OFF'
evctrl_mcei0: false
evctrl_mcei1: false
evctrl_mcei2: false
evctrl_mcei3: false
evctrl_mcei4: false
evctrl_mcei5: false
evctrl_mceo0: false
evctrl_mceo1: false
evctrl_mceo2: false
evctrl_mceo3: false
evctrl_mceo4: false
evctrl_mceo5: false
evctrl_ovfeo: true
evctrl_tcei0: false
evctrl_tcei1: false
evctrl_tcinv0: false
evctrl_tcinv1: false
evctrl_trgeo: false
fctrla_blank: NONE
fctrla_blankpresc: false
fctrla_blankval: 0
fctrla_chsel: CC0
fctrla_control: false
fctrla_filterval: 0
fctrla_halt: DISABLE
fctrla_keep: false
fctrla_qual: false
fctrla_restart: false
fctrla_src: DISABLE
fctrlb_blank: NONE
fctrlb_blankpresc: false
fctrlb_blankval: 0
fctrlb_chsel: CC0
fctrlb_control: false
fctrlb_filterval: 0
fctrlb_halt: DISABLE
fctrlb_keep: false
fctrlb_qual: false
fctrlb_restart: false
fctrlb_src: DISABLE
intenset_cnt: false
intenset_control: false
intenset_dfs: false
intenset_err: false
intenset_fault0: false
intenset_fault1: false
intenset_faulta: false
intenset_faultb: false
intenset_mc0: false
intenset_mc1: false
intenset_mc2: false
intenset_mc3: false
intenset_mc4: false
intenset_mc5: false
intenset_ovf: false
intenset_trg: false
patt_control: false
patt_pge0: false
patt_pge1: false
patt_pge2: false
patt_pge3: false
patt_pgv0: false
patt_pgv1: false
patt_pgv2: false
patt_pgv3: false
per_control: true
per_per: 1000
wave_ciccen0: false
wave_ciccen1: false
wave_ciccen2: false
wave_ciccen3: false
wave_ciperen: false
wave_control: true
wave_pol0: true
wave_pol1: true
wave_pol2: true
wave_pol3: true
wave_pol4: true
wave_pol5: true
wave_ramp: RAMP1
wave_swap0: false
wave_swap1: false
wave_swap2: false
wave_swap3: false
wave_wavegen: DSBOTTOM
wexctrl_control: true
wexctrl_dths: 0
wexctrl_dtien0: false
wexctrl_dtien1: false
wexctrl_dtien2: false
wexctrl_dtien3: false
wexctrl_dtls: 0
wexctrl_otmx: 0
optional_signals:
- identifier: TCC_PWM2:WO/0
pad: PC04
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.0
name: TCC0/WO/0
label: WO/0
- identifier: TCC_PWM2:WO/1
pad: PD08
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.1
name: TCC0/WO/1
label: WO/1
- identifier: TCC_PWM2:WO/2
pad: PD09
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.2
name: TCC0/WO/2
label: WO/2
- identifier: TCC_PWM2:WO/3
pad: PD10
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.3
name: TCC0/WO/3
label: WO/3
- identifier: TCC_PWM2:WO/4
pad: PA16
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.4
name: TCC0/WO/4
label: WO/4
- identifier: TCC_PWM2:WO/5
pad: PA17
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.5
name: TCC0/WO/5
label: WO/5
- identifier: TCC_PWM2:WO/6
pad: PC22
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.6
name: TCC0/WO/6
label: WO/6
- identifier: TCC_PWM2:WO/7
pad: PC23
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC0.WO.7
name: TCC0/WO/7
label: WO/7
variant: null
clocks:
domain_group:
nodes:
- name: TCC
input: Generic clock generator 0
external: false
external_frequency: 0
configuration:
tcc_gclk_selection: Generic clock generator 0
TCC_PWM:
user_label: TCC_PWM
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::TCC1::driver_config_definition::PWM::HAL:Driver:PWM
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::TCC1::driver_config_definition::PWM.Mode::Lite:TCC:PWM
functionality: PWM
api: HAL:Driver:PWM
api: Lite:TCC:PWM
configuration:
tcc_arch_alock: false
tcc_arch_cc0: 0
tcc_arch_cc1: 0
tcc_arch_cc2: 0
tcc_arch_cc3: 0
tcc_arch_cnteo: false
tcc_arch_cntsel: An interrupt/event is generated when a new counter cycle starts
tcc_arch_cpten0: false
tcc_arch_cpten1: false
tcc_arch_cpten2: false
tcc_arch_cpten3: false
tcc_arch_cpten4: false
tcc_arch_cpten5: false
tcc_arch_cpten6: false
tcc_arch_cpten7: false
tcc_arch_dbgrun: false
tcc_arch_evact0: Event action disabled
tcc_arch_evact1: Event action disabled
tcc_arch_lupd: false
tcc_arch_mcei0: false
tcc_arch_mcei1: false
tcc_arch_mcei2: false
tcc_arch_mcei3: false
tcc_arch_mceo0: false
tcc_arch_mceo1: false
tcc_arch_mceo2: false
tcc_arch_mceo3: false
tcc_arch_ovfeo: true
tcc_arch_prescsync: Reload or reset counter on next GCLK
tcc_arch_runstdby: false
tcc_arch_sel_ch: 0
tcc_arch_tcei0: false
tcc_arch_tcei1: false
tcc_arch_tceinv0: false
tcc_arch_tceinv1: false
tcc_arch_trgeo: false
tcc_arch_wave_duty_val: 0
tcc_arch_wave_per_val: 1000
tcc_arch_wavegen: Dual-slope, interrupt/event at ZERO (DSBOTTOM)
tcc_per: 10000
tcc_prescaler: Divide by 2
timer_event_control: true
cc_cc0: 0
cc_cc1: 0
cc_cc2: 0
cc_cc3: 0
cc_cc4: 0
cc_cc5: 0
cc_control: false
ctrla_alock: false
ctrla_control: true
ctrla_enable: true
ctrla_prescaler: DIV2
ctrla_prescsync: GCLK
ctrla_runstdby: false
ctrlbset_cmd: NONE
ctrlbset_control: false
ctrlbset_dir: false
ctrlbset_idxcmd: DISABLE
ctrlbset_lupd: false
ctrlbset_oneshot: false
dbgctrl_control: false
dbgctrl_dbgrun: false
dbgctrl_fddbd: false
drvctrl_control: false
drvctrl_filterval0: 0
drvctrl_filterval1: 0
drvctrl_inven0: false
drvctrl_inven1: false
drvctrl_inven2: false
drvctrl_inven3: false
drvctrl_inven4: false
drvctrl_inven5: false
drvctrl_inven6: false
drvctrl_inven7: false
drvctrl_nre0: false
drvctrl_nre1: false
drvctrl_nre2: false
drvctrl_nre3: false
drvctrl_nre4: false
drvctrl_nre5: false
drvctrl_nre6: false
drvctrl_nre7: false
drvctrl_nrv0: false
drvctrl_nrv1: false
drvctrl_nrv2: false
drvctrl_nrv3: false
drvctrl_nrv4: false
drvctrl_nrv5: false
drvctrl_nrv6: false
drvctrl_nrv7: false
evctrl_cnteo: false
evctrl_cntsel: START
evctrl_control: true
evctrl_evact0: 'OFF'
evctrl_evact1: 'OFF'
evctrl_mcei0: false
evctrl_mcei1: false
evctrl_mcei2: false
evctrl_mcei3: false
evctrl_mcei4: false
evctrl_mcei5: false
evctrl_mceo0: false
evctrl_mceo1: false
evctrl_mceo2: false
evctrl_mceo3: false
evctrl_mceo4: false
evctrl_mceo5: false
evctrl_ovfeo: true
evctrl_tcei0: false
evctrl_tcei1: false
evctrl_tcinv0: false
evctrl_tcinv1: false
evctrl_trgeo: false
fctrla_blank: NONE
fctrla_blankpresc: false
fctrla_blankval: 0
fctrla_chsel: CC0
fctrla_control: false
fctrla_filterval: 0
fctrla_halt: DISABLE
fctrla_keep: false
fctrla_qual: false
fctrla_restart: false
fctrla_src: DISABLE
fctrlb_blank: NONE
fctrlb_blankpresc: false
fctrlb_blankval: 0
fctrlb_chsel: CC0
fctrlb_control: false
fctrlb_filterval: 0
fctrlb_halt: DISABLE
fctrlb_keep: false
fctrlb_qual: false
fctrlb_restart: false
fctrlb_src: DISABLE
intenset_cnt: false
intenset_control: false
intenset_dfs: false
intenset_err: false
intenset_fault0: false
intenset_fault1: false
intenset_faulta: false
intenset_faultb: false
intenset_mc0: false
intenset_mc1: false
intenset_mc2: false
intenset_mc3: false
intenset_mc4: false
intenset_mc5: false
intenset_ovf: false
intenset_trg: false
patt_control: false
patt_pge0: false
patt_pge1: false
patt_pge2: false
patt_pge3: false
patt_pgv0: false
patt_pgv1: false
patt_pgv2: false
patt_pgv3: false
per_control: true
per_per: 1000
wave_ciccen0: false
wave_ciccen1: false
wave_ciccen2: false
wave_ciccen3: false
wave_ciperen: false
wave_control: true
wave_pol0: true
wave_pol1: true
wave_pol2: true
wave_pol3: true
wave_pol4: false
wave_pol5: false
wave_ramp: RAMP1
wave_swap0: false
wave_swap1: false
wave_swap2: false
wave_swap3: false
wave_wavegen: DSBOTTOM
wexctrl_control: true
wexctrl_dths: 0
wexctrl_dtien0: false
wexctrl_dtien1: false
wexctrl_dtien2: false
wexctrl_dtien3: false
wexctrl_dtls: 0
wexctrl_otmx: 3
optional_signals:
- identifier: TCC_PWM:WO/0
pad: PC14
mode: PWM output
configuration: null
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::optional_signal_definition::TCC1.WO.0
name: TCC1/WO/0
label: WO/0
- identifier: TCC_PWM:WO/2
pad: PB26
mode: PWM output
@ -2056,6 +2388,66 @@ pads:
mode: Peripheral IO
user_label: HALL_A
configuration: null
M2_0:
name: PC04
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PC04
mode: Peripheral IO
user_label: M2_0
configuration: null
M3_4:
name: PB14
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PB14
mode: Digital output
user_label: M3_4
configuration: null
M3_5:
name: PB15
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PB15
mode: Digital output
user_label: M3_5
configuration: null
M2_1:
name: PD08
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PD08
mode: Peripheral IO
user_label: M2_1
configuration: null
M2_2:
name: PD09
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PD09
mode: Peripheral IO
user_label: M2_2
configuration: null
M2_3:
name: PD10
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PD10
mode: Peripheral IO
user_label: M2_3
configuration: null
M3_2:
name: PC14
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PC14
mode: Peripheral IO
user_label: M3_2
configuration: null
M2_4:
name: PA16
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PA16
mode: Peripheral IO
user_label: M2_4
configuration: null
M2_5:
name: PA17
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PA17
mode: Peripheral IO
user_label: M2_5
configuration: null
M3_3:
name: PA18
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PA18
mode: Digital output
user_label: M3_3
configuration: null
LED0:
name: PC18
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PC18
@ -2063,6 +2455,18 @@ pads:
user_label: LED0
configuration:
pad_initial_level: Low
M3_0:
name: PC22
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PC22
mode: Peripheral IO
user_label: M3_0
configuration: null
M3_1:
name: PC23
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PC23
mode: Peripheral IO
user_label: M3_1
configuration: null
PB16:
name: PB16
definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PB16

View File

@ -150,29 +150,25 @@
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@ -198,8 +194,8 @@
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@ -215,8 +211,7 @@
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@ -540,9 +535,6 @@
<Compile Include="Config\hpl_sercom_config.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="Config\hpl_tcc_config.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="Config\peripheral_clk_config.h">
<SubType>compile</SubType>
</Compile>
@ -609,9 +601,6 @@
<Compile Include="hal\include\hal_pdec_async.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\include\hal_pwm.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\include\hal_sleep.h">
<SubType>compile</SubType>
</Compile>
@ -675,9 +664,6 @@
<Compile Include="hal\include\hpl_pdec_async.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\include\hpl_pwm.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\include\hpl_ramecc.h">
<SubType>compile</SubType>
</Compile>
@ -714,9 +700,6 @@
<Compile Include="hal\include\hpl_spi_s_sync.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\include\hpl_timer.h">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\include\hpl_usart.h">
<SubType>compile</SubType>
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@ -756,9 +739,6 @@
<Compile Include="hal\src\hal_pdec_async.c">
<SubType>compile</SubType>
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<Compile Include="hal\src\hal_pwm.c">
<SubType>compile</SubType>
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<Compile Include="hal\src\hal_sleep.c">
<SubType>compile</SubType>
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@ -876,10 +856,10 @@
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<SubType>compile</SubType>
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<Compile Include="hpl\tcc\tcc_lite.c">
<SubType>compile</SubType>
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<SubType>compile</SubType>
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@ -1083,15 +1063,15 @@
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<SubType>compile</SubType>
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<SubType>compile</SubType>
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<Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
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View File

@ -1,547 +0,0 @@
/* Auto-generated config file hpl_tcc_config.h */
#ifndef HPL_TCC_CONFIG_H
#define HPL_TCC_CONFIG_H
// <<< Use Configuration Wizard in Context Menu >>>
#include <peripheral_clk_config.h>
#ifndef CONF_TCC1_ENABLE
#define CONF_TCC1_ENABLE 1
#endif
#ifndef CONF_TCC1_PWM_ENABLE
#define CONF_TCC1_PWM_ENABLE 1
#endif
// <h> Basic settings
// <y> TCC1 Prescaler
// <TCC_CTRLA_PRESCALER_DIV1_Val"> No division
// <TCC_CTRLA_PRESCALER_DIV2_Val"> Divide by 2
// <TCC_CTRLA_PRESCALER_DIV4_Val"> Divide by 4
// <TCC_CTRLA_PRESCALER_DIV8_Val"> Divide by 8
// <TCC_CTRLA_PRESCALER_DIV16_Val"> Divide by 16
// <TCC_CTRLA_PRESCALER_DIV64_Val"> Divide by 64
// <TCC_CTRLA_PRESCALER_DIV256_Val"> Divide by 256
// <TCC_CTRLA_PRESCALER_DIV1024_Val"> Divide by 1024
// <i> This defines the TCC1 prescaler value
// <id> tcc_prescaler
#ifndef CONF_TCC1_PRESCALER
#define CONF_TCC1_PRESCALER TCC_CTRLA_PRESCALER_DIV2_Val
#endif
// <hidden>
//<o> TCC1 Period Value <0x000000-0xFFFFFF>
// <id> tcc_per
#ifndef CONF_TCC1_PER
#define CONF_TCC1_PER 0x2710
#endif
// </hidden>
// </h>
// <h> PWM Waveform Output settings
// <o> TCC1 Waveform Period Value (uS) <0x00-0xFFFFFFFF>
// <i> The unit of this value is us.
// <id> tcc_arch_wave_per_val
#ifndef CONF_TCC1_WAVE_PER_VAL
#define CONF_TCC1_WAVE_PER_VAL 0x3e8
#endif
// <o> TCC1 Waveform Duty Value (0.1%) <0x00-0x03E8>
// <i> The unit of this value is 1/1000.
// <id> tcc_arch_wave_duty_val
#ifndef CONF_TCC1_WAVE_DUTY_VAL
#define CONF_TCC1_WAVE_DUTY_VAL 0x0
#endif
// <o> TCC1 Waveform Channel Select <0x00-0x03>
// <i> Index of the Compare Channel register, into which the Waveform Duty Value is written.
// <i> Give index of the Compare Channel register here in 0x00-0x03 range.
// <id> tcc_arch_sel_ch
#ifndef CONF_TCC1_SEL_CH
#define CONF_TCC1_SEL_CH 0x0
#endif
/* Caculate pwm ccx register value based on WAVE_PER_VAL and Waveform Duty Value */
#if CONF_TCC1_PRESCALER < TCC_CTRLA_PRESCALER_DIV64_Val
#define CONF_TCC1_PER_REG \
((uint32_t)(((double)CONF_TCC1_WAVE_PER_VAL * CONF_GCLK_TCC1_FREQUENCY) / 1000000 / (1 << CONF_TCC1_PRESCALER) - 1))
#define CONF_TCC1_CCX_REG ((uint32_t)(((double)(double)CONF_TCC1_PER_REG * CONF_TCC1_WAVE_DUTY_VAL) / 1000))
#elif CONF_TCC1_PRESCALER == TCC_CTRLA_PRESCALER_DIV64_Val
#define CONF_TCC1_PER_REG ((uint32_t)(((double)CONF_TCC1_WAVE_PER_VAL * CONF_GCLK_TCC1_FREQUENCY) / 64000000 - 1))
#define CONF_TCC1_CCX_REG ((uint32_t)(((double)CONF_TCC1_PER_REG * CONF_TCC1_WAVE_DUTY_VAL) / 1000))
#elif CONF_TCC1_PRESCALER == TCC_CTRLA_PRESCALER_DIV256_Val
#define CONF_TCC1_PER_REG ((uint32_t)(((double)CONF_TCC1_WAVE_PER_VAL * CONF_GCLK_TCC1_FREQUENCY) / 256000000 - 1))
#define CONF_TCC1_CCX_REG ((uint32_t)(((double)CONF_TCC1_PER_REG * CONF_TCC1_WAVE_DUTY_VAL) / 1000))
#elif CONF_TCC1_PRESCALER == TCC_CTRLA_PRESCALER_DIV1024_Val
#define CONF_TCC1_PER_REG ((uint32_t)(((double)CONF_TCC1_WAVE_PER_VAL * CONF_GCLK_TCC1_FREQUENCY) / 1024000000 - 1))
#define CONF_TCC1_CCX_REG ((uint32_t)(((double)CONF_TCC1_PER_REG * CONF_TCC1_WAVE_DUTY_VAL) / 1000))
#endif
// </h>
// <h> Advanced settings
/* Commented intentionally. Timer uses fixed value of the following bit(s)/bitfield(s) of CTRL A register.
* May be used by other abstractions based on TC. */
//#define CONF_TCC1_RESOLUTION TCC_CTRLA_RESOLUTION_NONE_Val
// <q> Run in standby
// <i> Indicates whether the TCC1 will continue running in standby sleep mode or not
// <id> tcc_arch_runstdby
#ifndef CONF_TCC1_RUNSTDBY
#define CONF_TCC1_RUNSTDBY 0
#endif
// <y> TCC1 Prescaler and Counter Synchronization Selection
// <TCC_CTRLA_PRESCSYNC_GCLK_Val"> Reload or reset counter on next GCLK
// <TCC_CTRLA_PRESCSYNC_PRESC_Val"> Reload or reset counter on next prescaler clock
// <TCC_CTRLA_PRESCSYNC_RESYNC_Val"> Reload or reset counter on next GCLK and reset prescaler counter
// <i> These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCCx clock or on the next prescaled GCLK_TCCx clock.
// <id> tcc_arch_prescsync
#ifndef CONF_TCC1_PRESCSYNC
#define CONF_TCC1_PRESCSYNC TCC_CTRLA_PRESCSYNC_GCLK_Val
#endif
// <y> TCC1 Waveform Generation Selection
// <TCC_WAVE_WAVEGEN_NPWM_Val"> Single-slope PWM
// <TCC_WAVE_WAVEGEN_DSCRITICAL_Val"> Dual-slope, critical interrupt/event at ZERO (DSCRITICAL)
// <TCC_WAVE_WAVEGEN_DSBOTTOM_Val"> Dual-slope, interrupt/event at ZERO (DSBOTTOM)
// <TCC_WAVE_WAVEGEN_DSBOTH_Val"> Dual-slope, interrupt/event at Top and ZERO (DSBOTH)
// <TCC_WAVE_WAVEGEN_DSTOP_Val"> Dual-slope, interrupt/event at Top (DSTOP)
// <id> tcc_arch_wavegen
#ifndef CONF_TCC1_WAVEGEN
#define CONF_TCC1_WAVEGEN TCC_WAVE_WAVEGEN_DSBOTTOM_Val
#endif
// <q> TCC1 Auto Lock
// <i> Indicates whether the TCC1 Auto Lock is enabled or not
// <id> tcc_arch_alock
#ifndef CONF_TCC1_ALOCK
#define CONF_TCC1_ALOCK 0
#endif
// <q> TCC1 Capture Channel 0 Enable
// <i> Indicates whether the TCC1 Capture Channel 0 is enabled or not
// <id> tcc_arch_cpten0
#ifndef CONF_TCC1_CPTEN0
#define CONF_TCC1_CPTEN0 0
#endif
// <q> TCC1 Capture Channel 1 Enable
// <i> Indicates whether the TCC1 Capture Channel 1 is enabled or not
// <id> tcc_arch_cpten1
#ifndef CONF_TCC1_CPTEN1
#define CONF_TCC1_CPTEN1 0
#endif
// <q> TCC1 Capture Channel 2 Enable
// <i> Indicates whether the TCC1 Capture Channel 2 is enabled or not
// <id> tcc_arch_cpten2
#ifndef CONF_TCC1_CPTEN2
#define CONF_TCC1_CPTEN2 0
#endif
// <q> TCC1 Capture Channel 3 Enable
// <i> Indicates whether the TCC1 Capture Channel 3 is enabled or not
// <id> tcc_arch_cpten3
#ifndef CONF_TCC1_CPTEN3
#define CONF_TCC1_CPTEN3 0
#endif
// <hidden>
// <q> TCC1 Capture Channel 4 Enable
// <i> Indicates whether the TCC1 Capture Channel 4 is enabled or not
// <id> tcc_arch_cpten4
#ifndef CONF_TCC1_CPTEN4
#define CONF_TCC1_CPTEN4 0
#endif
// </hidden>
// <hidden>
// <q> TCC1 Capture Channel 5 Enable
// <i> Indicates whether the TCC1 Capture Channel 5 is enabled or not
// <id> tcc_arch_cpten5
#ifndef CONF_TCC1_CPTEN5
#define CONF_TCC1_CPTEN5 0
#endif
// </hidden>
// <hidden>
// <q> TCC1 Capture Channel 6 Enable
// <i> Indicates whether the TCC1 Capture Channel 6 is enabled or not
// <id> tcc_arch_cpten6
#ifndef CONF_TCC1_CPTEN6
#define CONF_TCC1_CPTEN6 0
#endif
// </hidden>
// <hidden>
// <q> TCC1 Capture Channel 7 Enable
// <i> Indicates whether the TCC1 Capture Channel 7 is enabled or not
// <id> tcc_arch_cpten7
#ifndef CONF_TCC1_CPTEN7
#define CONF_TCC1_CPTEN7 0
#endif
// </hidden>
// <q> TCC1 Lock update
// <i> Indicates whether the TCC1 Lock update is enabled or not
// <id> tcc_arch_lupd
#ifndef CONF_TCC1_LUPD
#define CONF_TCC1_LUPD 0
#endif
/* Commented intentionally. Timer uses fixed value of the following bit(s)/bitfield(s) of CTRL B register.
* May be used by other abstractions based on TC. */
//#define CONF_TCC1_DIR 0
//#define CONF_TCC1_ONESHOT 0
/* Commented intentionally. No fault control for timers. */
/*#define CONF_TCC1_FAULT_A_SRC TCC_FCTRLA_SRC_DISABLE_Val
#define CONF_TCC1_FAULT_A_KEEP 0
#define CONF_TCC1_FAULT_A_QUAL 0
#define CONF_TCC1_FAULT_A_BLANK TCC_FCTRLA_BLANK_DISABLE_Val
#define CONF_TCC1_FAULT_A_RESTART 0
#define CONF_TCC1_FAULT_A_HALT TCC_FCTRLA_HALT_DISABLE_Val
#define CONF_TCC1_FAULT_A_CHSEL TCC_FCTRLA_CHSEL_CC0_Val
#define CONF_TCC1_FAULT_A_CAPTURE TCC_FCTRLA_CAPTURE_DISABLE_Val
#define CONF_TCC1_FAULT_A_BLACNKPRESC 0
#define CONF_TCC1_FAULT_A_BLANKVAL 0
#define CONF_TCC1_FAULT_A_FILTERVAL 0
#define CONF_TCC1_FAULT_B_SRC TCC_FCTRLB_SRC_DISABLE_Val
#define CONF_TCC1_FAULT_B_KEEP 0
#define CONF_TCC1_FAULT_B_QUAL 0
#define CONF_TCC1_FAULT_B_BLANK TCC_FCTRLB_BLANK_DISABLE_Val
#define CONF_TCC1_FAULT_B_RESTART 0
#define CONF_TCC1_FAULT_B_HALT TCC_FCTRLB_HALT_DISABLE_Val
#define CONF_TCC1_FAULT_B_CHSEL TCC_FCTRLB_CHSEL_CC0_Val
#define CONF_TCC1_FAULT_B_CAPTURE TCC_FCTRLB_CAPTURE_DISABLE_Val
#define CONF_TCC1_FAULT_B_BLACNKPRESC 0
#define CONF_TCC1_FAULT_B_BLANKVAL 0
#define CONF_TCC1_FAULT_B_FILTERVAL 0*/
/* Commented intentionally. No dead-time control for timers. */
/*#define CONF_TCC1_OTMX 0
#define CONF_TCC1_DTIEN0 0
#define CONF_TCC1_DTIEN1 0
#define CONF_TCC1_DTIEN2 0
#define CONF_TCC1_DTIEN3 0
#define CONF_TCC1_DTHS 0*/
/* Commented intentionally. No driver control for timers. */
/*#define CONF_TCC1_NRE0 0
#define CONF_TCC1_NRE1 0
#define CONF_TCC1_NRE2 0
#define CONF_TCC1_NRE3 0
#define CONF_TCC1_NRE4 0
#define CONF_TCC1_NRE5 0
#define CONF_TCC1_NRE6 0
#define CONF_TCC1_NRE7 0
#define CONF_TCC1_NVR0 0
#define CONF_TCC1_NVR1 0
#define CONF_TCC1_NVR2 0
#define CONF_TCC1_NVR3 0
#define CONF_TCC1_NVR4 0
#define CONF_TCC1_NVR5 0
#define CONF_TCC1_NVR6 0
#define CONF_TCC1_NVR7 0
#define CONF_TCC1_INVEN0 0
#define CONF_TCC1_INVEN1 0
#define CONF_TCC1_INVEN2 0
#define CONF_TCC1_INVEN3 0
#define CONF_TCC1_INVEN4 0
#define CONF_TCC1_INVEN5 0
#define CONF_TCC1_INVEN6 0
#define CONF_TCC1_INVEN7 0
#define CONF_TCC1_FILTERVAL0 0
#define CONF_TCC1_FILTERVAL1 0*/
// <q> TCC1 Debug Running Mode
// <i> Indicates whether the TCC1 Debug Running Mode is enabled or not
// <id> tcc_arch_dbgrun
#ifndef CONF_TCC1_DBGRUN
#define CONF_TCC1_DBGRUN 0
#endif
/* Commented intentionally. Timer uses fixed value of the following bit(s)/bitfield(s) of Debug Control register.
* May be used by other abstractions based on TC. */
//#define CONF_TCC1_FDDBD 0
// <e> Event control
// <id> timer_event_control
#ifndef CONF_TCC1_EVENT_CONTROL_ENABLE
#define CONF_TCC1_EVENT_CONTROL_ENABLE 1
#endif
// <q> Match or Capture Channel 0 Event Output
// <i> This bit indicates whether match/capture event on channel 0 is enabled and will be generated
// <id> tcc_arch_mceo0
#ifndef CONF_TCC1_MCEO0
#define CONF_TCC1_MCEO0 0
#endif
// <q> Match or Capture Channel 0 Event Input
// <i> This bit indicates whether match/capture 0 incoming event is enabled
// <id> tcc_arch_mcei0
#ifndef CONF_TCC1_MCEI0
#define CONF_TCC1_MCEI0 0
#endif
// <q> Match or Capture Channel 1 Event Output
// <i> This bit indicates whether match/capture event on channel 1 is enabled and will be generated
// <id> tcc_arch_mceo1
#ifndef CONF_TCC1_MCEO1
#define CONF_TCC1_MCEO1 0
#endif
// <q> Match or Capture Channel 1 Event Input
// <i> This bit indicates whether match/capture 1 incoming event is enabled
// <id> tcc_arch_mcei1
#ifndef CONF_TCC1_MCEI1
#define CONF_TCC1_MCEI1 0
#endif
// <q> Match or Capture Channel 2 Event Output
// <i> This bit indicates whether match/capture event on channel 2 is enabled and will be generated
// <id> tcc_arch_mceo2
#ifndef CONF_TCC1_MCEO2
#define CONF_TCC1_MCEO2 0
#endif
// <q> Match or Capture Channel 2 Event Input
// <i> This bit indicates whether match/capture 2 incoming event is enabled
// <id> tcc_arch_mcei2
#ifndef CONF_TCC1_MCEI2
#define CONF_TCC1_MCEI2 0
#endif
// <q> Match or Capture Channel 3 Event Output
// <i> This bit indicates whether match/capture event on channel 3 is enabled and will be generated
// <id> tcc_arch_mceo3
#ifndef CONF_TCC1_MCEO3
#define CONF_TCC1_MCEO3 0
#endif
// <q> Match or Capture Channel 3 Event Input
// <i> This bit indicates whether match/capture 3 incoming event is enabled
// <id> tcc_arch_mcei3
#ifndef CONF_TCC1_MCEI3
#define CONF_TCC1_MCEI3 0
#endif
// <q> Timer/Counter Event Input 0
// <i> This bit is used to enable input event 0 to the TCC
// <id> tcc_arch_tcei0
#ifndef CONF_TCC1_TCEI0
#define CONF_TCC1_TCEI0 0
#endif
// <q> Timer/Counter Event Input 0 Invert
// <i> This bit inverts the event 0 input
// <id> tcc_arch_tceinv0
#ifndef CONF_TCC1_TCINV0
#define CONF_TCC1_TCINV0 0
#endif
// <q> Timer/Counter Event Input 1
// <i> This bit is used to enable input event 1 to the TCC
// <id> tcc_arch_tcei1
#ifndef CONF_TCC1_TCEI1
#define CONF_TCC1_TCEI1 0
#endif
// <q> Timer/Counter Event Input 1 Invert
// <i> This bit inverts the event 1 input
// <id> tcc_arch_tceinv1
#ifndef CONF_TCC1_TCINV1
#define CONF_TCC1_TCINV1 0
#endif
// <q> Timer/Counter Event Output
// <i> This bit is used to enable the counter cycle event.
//<id> tcc_arch_cnteo
#ifndef CONF_TCC1_CNTEO
#define CONF_TCC1_CNTEO 0
#endif
// <q> Re-trigger Event Output
// <i> This bit is used to enable the counter re-trigger event.
//<id> tcc_arch_trgeo
#ifndef CONF_TCC1_TRGEO
#define CONF_TCC1_TRGEO 0
#endif
// <q> Overflow/Underflow Event Output
// <i> This bit is used to enable enable event on overflow/underflow.
//<id> tcc_arch_ovfeo
#ifndef CONF_TCC1_OVFEO
#define CONF_TCC1_OVFEO 1
#endif
// <o> Timer/Counter Interrupt and Event Output Selection
// <0=> An interrupt/event is generated when a new counter cycle starts
// <1=> An interrupt/event is generated when a counter cycle ends
// <2=> An interrupt/event is generated when a counter cycle ends, except for the first and last cycles
// <3=> An interrupt/event is generated when a new counter cycle starts or a counter cycle ends
// <i> These bits define on which part of the counter cycle the counter event output is generated
// <id> tcc_arch_cntsel
#ifndef CONF_TCC1_CNTSEL
#define CONF_TCC1_CNTSEL 0
#endif
// <o> Timer/Counter Event Input 0 Action
// <0=>Event action disabled
// <1=>Start restart or re-trigger on event
// <2=>Count on event
// <3=>Start on event
// <4=>Increment on event
// <5=>Count on active state of asynchronous event
// <6=>Capture overflow times (Max value)
// <7=>Non-recoverable fault
// <i> These bits define the action the TCC performs on TCE0 event input 0
// <id> tcc_arch_evact0
#ifndef CONF_TCC1_EVACT0
#define CONF_TCC1_EVACT0 0
#endif
// <o> Timer/Counter Event Input 1 Action
// <0=>Event action disabled
// <1=>Re-trigger counter on event
// <2=>Direction control
// <3=>Stop counter on event
// <4=>Decrement counter on event
// <5=>Period capture value in CC0 register, pulse width capture value in CC1 register
// <6=>Period capture value in CC1 register, pulse width capture value in CC0 register
// <7=>Non-recoverable fault
// <i> These bits define the action the TCC performs on TCE0 event input 0
// <id> tcc_arch_evact1
#ifndef CONF_TCC1_EVACT1
#define CONF_TCC1_EVACT1 0
#endif
// </e>
/* Commented intentionally. No pattern control for timers. */
/*#define CONF_TCC1_PGE0 0
#define CONF_TCC1_PGE1 0
#define CONF_TCC1_PGE2 0
#define CONF_TCC1_PGE3 0
#define CONF_TCC1_PGE4 0
#define CONF_TCC1_PGE5 0
#define CONF_TCC1_PGE6 0
#define CONF_TCC1_PGE7 0
#define CONF_TCC1_PGV0 0
#define CONF_TCC1_PGV1 0
#define CONF_TCC1_PGV2 0
#define CONF_TCC1_PGV3 0
#define CONF_TCC1_PGV4 0
#define CONF_TCC1_PGV5 0
#define CONF_TCC1_PGV6 0
#define CONF_TCC1_PGV7 0*/
/* Commented intentionally. No pattern waveform control for timers. */
/*#define CONF_TCC1_WAVEGEN TCC_WAVE_WAVEGEN_MFRQ_Val
#define CONF_TCC1_RAMP TCC_WAVE_RAMP_RAMP1_Val
#define CONF_TCC1_CIPEREN 0
#define CONF_TCC1_CICCEN0 0
#define CONF_TCC1_CICCEN1 0
#define CONF_TCC1_CICCEN2 0
#define CONF_TCC1_CICCEN3 0
#define CONF_TCC1_POL0 0
#define CONF_TCC1_POL1 0
#define CONF_TCC1_POL2 0
#define CONF_TCC1_POL3 0
#define CONF_TCC1_POL4 0
#define CONF_TCC1_POL5 0
#define CONF_TCC1_POL6 0
#define CONF_TCC1_POL7 0
#define CONF_TCC1_SWAP0 0
#define CONF_TCC1_SWAP1 0
#define CONF_TCC1_SWAP2 0
#define CONF_TCC1_SWAP3 0*/
//<o> TCC1 Compare and Capture value 0 <0x00-0xFFFFFF>
// <id> tcc_arch_cc0
#ifndef CONF_TCC1_CC0
#define CONF_TCC1_CC0 0x0
#endif
//<o> TCC1 Compare and Capture value 1 <0x00-0xFFFFFF>
// <id> tcc_arch_cc1
#ifndef CONF_TCC1_CC1
#define CONF_TCC1_CC1 0x0
#endif
//<o> TCC1 Compare and Capture value 2 <0x00-0xFFFFFF>
// <id> tcc_arch_cc2
#ifndef CONF_TCC1_CC2
#define CONF_TCC1_CC2 0x0
#endif
//<o> TCC1 Compare and Capture value 3 <0x00-0xFFFFFF>
// <id> tcc_arch_cc3
#ifndef CONF_TCC1_CC3
#define CONF_TCC1_CC3 0x0
#endif
/* Commented intentionally. No pattern control for timers. */
/*#define CONF_TCC1_PATTB_PGEB0 0
#define CONF_TCC1_PATTB_PGEB1 0
#define CONF_TCC1_PATTB_PGEB2 0
#define CONF_TCC1_PATTB_PGEB3 0
#define CONF_TCC1_PATTB_PGEB4 0
#define CONF_TCC1_PATTB_PGEB5 0
#define CONF_TCC1_PATTB_PGEB6 0
#define CONF_TCC1_PATTB_PGEB7 0
#define CONF_TCC1_PATTB_PGVB0 0
#define CONF_TCC1_PATTB_PGVB1 0
#define CONF_TCC1_PATTB_PGVB2 0
#define CONF_TCC1_PATTB_PGVB3 0
#define CONF_TCC1_PATTB_PGVB4 0
#define CONF_TCC1_PATTB_PGVB5 0
#define CONF_TCC1_PATTB_PGVB6 0
#define CONF_TCC1_PATTB_PGVB7 0*/
/* Commented intentionally. No waveform control for timers. */
/*#define CONF_TCC1_WAVEGENB TCC_WAVEB_WAVEGENB_MFRQ_Val
#define CONF_TCC1_RAMPB TCC_WAVE_RAMP_RAMP1_Val
#define CONF_TCC1_CIPERENB 0
#define CONF_TCC1_CICCEN0B 0
#define CONF_TCC1_CICCEN1B 0
#define CONF_TCC1_CICCEN2B 0
#define CONF_TCC1_CICCEN3B 0
#define CONF_TCC1_POL0B 0
#define CONF_TCC1_POL1B 0
#define CONF_TCC1_POL2B 0
#define CONF_TCC1_POL3B 0
#define CONF_TCC1_POL4B 0
#define CONF_TCC1_POL5B 0
#define CONF_TCC1_POL6B 0
#define CONF_TCC1_POL7B 0
#define CONF_TCC1_SWAP0B 0
#define CONF_TCC1_SWAP1B 0
#define CONF_TCC1_SWAP2B 0
#define CONF_TCC1_SWAP3B 0*/
/* Commented intentionally. No buffering for timers. */
/*#define CONF_TCC1_PERB 0
#define CONF_TCC1_CCB0 0
#define CONF_TCC1_CCB1 0
#define CONF_TCC1_CCB2 0
#define CONF_TCC1_CCB3 0*/
// </h>
#define CONF_TCC1_CTRLA \
TCC_CTRLA_PRESCALER(CONF_TCC1_PRESCALER) | (CONF_TCC1_RUNSTDBY << TCC_CTRLA_RUNSTDBY_Pos) \
| TCC_CTRLA_PRESCSYNC(CONF_TCC1_PRESCSYNC) | (CONF_TCC1_CPTEN0 << TCC_CTRLA_CPTEN0_Pos) \
| (CONF_TCC1_CPTEN1 << TCC_CTRLA_CPTEN1_Pos) | (CONF_TCC1_CPTEN2 << TCC_CTRLA_CPTEN2_Pos) \
| (CONF_TCC1_CPTEN3 << TCC_CTRLA_CPTEN3_Pos) | (CONF_TCC1_ALOCK << TCC_CTRLA_ALOCK_Pos)
#define CONF_TCC1_CTRLB (CONF_TCC1_LUPD << TCC_CTRLBSET_LUPD_Pos)
#define CONF_TCC1_DBGCTRL (CONF_TCC1_DBGRUN << TCC_DBGCTRL_DBGRUN_Pos)
#define CONF_TCC1_EVCTRL \
TCC_EVCTRL_CNTSEL(CONF_TCC1_CNTSEL) | (CONF_TCC1_OVFEO << TCC_EVCTRL_OVFEO_Pos) \
| (CONF_TCC1_TRGEO << TCC_EVCTRL_TRGEO_Pos) | (CONF_TCC1_CNTEO << TCC_EVCTRL_CNTEO_Pos) \
| (CONF_TCC1_MCEO0 << TCC_EVCTRL_MCEO0_Pos) | (CONF_TCC1_MCEI0 << TCC_EVCTRL_MCEI0_Pos) \
| (CONF_TCC1_MCEO1 << TCC_EVCTRL_MCEO1_Pos) | (CONF_TCC1_MCEI1 << TCC_EVCTRL_MCEI1_Pos) \
| (CONF_TCC1_MCEO2 << TCC_EVCTRL_MCEO2_Pos) | (CONF_TCC1_MCEI2 << TCC_EVCTRL_MCEI2_Pos) \
| (CONF_TCC1_MCEO3 << TCC_EVCTRL_MCEO3_Pos) | (CONF_TCC1_MCEI3 << TCC_EVCTRL_MCEI3_Pos) \
| (CONF_TCC1_TCEI0 << TCC_EVCTRL_TCEI0_Pos) | (CONF_TCC1_TCEI1 << TCC_EVCTRL_TCEI1_Pos) \
| (CONF_TCC1_TCINV0 << TCC_EVCTRL_TCINV0_Pos) | (CONF_TCC1_TCINV1 << TCC_EVCTRL_TCINV1_Pos) \
| TCC_EVCTRL_EVACT1(CONF_TCC1_EVACT1) | TCC_EVCTRL_EVACT0(CONF_TCC1_EVACT0)
// <<< end of configuration section >>>
#endif // HPL_TCC_CONFIG_H

View File

@ -891,6 +891,46 @@
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
// <i> Select the clock source for TCC.
#ifndef CONF_GCLK_TCC0_SRC
#define CONF_GCLK_TCC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
#endif
/**
* \def CONF_GCLK_TCC0_FREQUENCY
* \brief TCC0's Clock frequency
*/
#ifndef CONF_GCLK_TCC0_FREQUENCY
#define CONF_GCLK_TCC0_FREQUENCY 100000000
#endif
// <y> TCC Clock Source
// <id> tcc_gclk_selection
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
// <i> Select the clock source for TCC.
#ifndef CONF_GCLK_TCC1_SRC
#define CONF_GCLK_TCC1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val

View File

@ -86,7 +86,6 @@ C_SRCS += \
../hal/src/hal_init.c \
../hal/src/hal_io.c \
../hal/src/hal_pdec_async.c \
../hal/src/hal_pwm.c \
../hal/src/hal_sleep.c \
../hal/src/hal_spi_m_dma.c \
../hal/utils/src/utils_assert.c \
@ -110,7 +109,7 @@ C_SRCS += \
../hpl/pm/hpl_pm.c \
../hpl/ramecc/hpl_ramecc.c \
../hpl/sercom/hpl_sercom.c \
../hpl/tcc/hpl_tcc.c \
../hpl/tcc/tcc_lite.c \
../hpl/tc/tc_lite.c \
../main.c
@ -139,7 +138,6 @@ hal/src/hal_gpio.o \
hal/src/hal_init.o \
hal/src/hal_io.o \
hal/src/hal_pdec_async.o \
hal/src/hal_pwm.o \
hal/src/hal_sleep.o \
hal/src/hal_spi_m_dma.o \
hal/utils/src/utils_assert.o \
@ -163,7 +161,7 @@ hpl/pdec/hpl_pdec.o \
hpl/pm/hpl_pm.o \
hpl/ramecc/hpl_ramecc.o \
hpl/sercom/hpl_sercom.o \
hpl/tcc/hpl_tcc.o \
hpl/tcc/tcc_lite.o \
hpl/tc/tc_lite.o \
main.o
@ -185,7 +183,6 @@ hal/src/hal_gpio.o \
hal/src/hal_init.o \
hal/src/hal_io.o \
hal/src/hal_pdec_async.o \
hal/src/hal_pwm.o \
hal/src/hal_sleep.o \
hal/src/hal_spi_m_dma.o \
hal/utils/src/utils_assert.o \
@ -209,7 +206,7 @@ hpl/pdec/hpl_pdec.o \
hpl/pm/hpl_pm.o \
hpl/ramecc/hpl_ramecc.o \
hpl/sercom/hpl_sercom.o \
hpl/tcc/hpl_tcc.o \
hpl/tcc/tcc_lite.o \
hpl/tc/tc_lite.o \
main.o
@ -231,7 +228,6 @@ hal/src/hal_gpio.d \
hal/src/hal_init.d \
hal/src/hal_io.d \
hal/src/hal_pdec_async.d \
hal/src/hal_pwm.d \
hal/src/hal_sleep.d \
hal/src/hal_spi_m_dma.d \
hal/utils/src/utils_assert.d \
@ -255,7 +251,7 @@ hpl/pdec/hpl_pdec.d \
hpl/pm/hpl_pm.d \
hpl/ramecc/hpl_ramecc.d \
hpl/sercom/hpl_sercom.d \
hpl/tcc/hpl_tcc.d \
hpl/tcc/tcc_lite.d \
hpl/tc/tc_lite.d \
main.d
@ -277,7 +273,6 @@ hal/src/hal_gpio.d \
hal/src/hal_init.d \
hal/src/hal_io.d \
hal/src/hal_pdec_async.d \
hal/src/hal_pwm.d \
hal/src/hal_sleep.d \
hal/src/hal_spi_m_dma.d \
hal/utils/src/utils_assert.d \
@ -301,7 +296,7 @@ hpl/pdec/hpl_pdec.d \
hpl/pm/hpl_pm.d \
hpl/ramecc/hpl_ramecc.d \
hpl/sercom/hpl_sercom.d \
hpl/tcc/hpl_tcc.d \
hpl/tcc/tcc_lite.d \
hpl/tc/tc_lite.d \
main.d
@ -441,13 +436,6 @@ hal/src/hal_pdec_async.o: ../hal/src/hal_pdec_async.c
@echo Finished building: $<
hal/src/hal_pwm.o: ../hal/src/hal_pwm.c
@echo Building file: $<
@echo Invoking: ARM/GNU C Compiler : 6.3.1
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
@echo Finished building: $<
hal/src/hal_sleep.o: ../hal/src/hal_sleep.c
@echo Building file: $<
@echo Invoking: ARM/GNU C Compiler : 6.3.1
@ -609,7 +597,7 @@ hpl/sercom/hpl_sercom.o: ../hpl/sercom/hpl_sercom.c
@echo Finished building: $<
hpl/tcc/hpl_tcc.o: ../hpl/tcc/hpl_tcc.c
hpl/tcc/tcc_lite.o: ../hpl/tcc/tcc_lite.c
@echo Building file: $<
@echo Invoking: ARM/GNU C Compiler : 6.3.1
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"

View File

@ -151,8 +151,7 @@ atmel_start.d atmel_start.o: .././atmel_start.c ../atmel_start.h \
../hal/utils/include/utils.h ../hal/include/hpl_pdec_async.h \
../hal/include/hal_spi_m_dma.h ../hal/include/hpl_spi_m_dma.h \
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
../hal/include/hpl_pwm.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hpl/tcc/tcc_lite.h
../atmel_start.h:
@ -552,10 +551,4 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
../hpl/tc/tc_lite.h:
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hpl/tcc/tcc_lite.h:

View File

@ -166,9 +166,8 @@ bldc.d bldc.o: .././bldc.c .././bldc.h .././arm_math.h \
../hal/utils/include/utils.h ../hal/include/hpl_pdec_async.h \
../hal/include/hal_spi_m_dma.h ../hal/include/hpl_spi_m_dma.h \
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
../hal/include/hpl_pwm.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h \
.././control.h .././utilities.h .././statemachine.h
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hpl/tcc/tcc_lite.h \
.././control.h .././utilities.h .././motor_params.h .././statemachine.h
.././bldc.h:
@ -600,16 +599,12 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
../hpl/tc/tc_lite.h:
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hpl/tcc/tcc_lite.h:
.././control.h:
.././utilities.h:
.././motor_params.h:
.././statemachine.h:

Binary file not shown.

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@ -151,8 +151,7 @@ driver_init.d driver_init.o: .././driver_init.c .././driver_init.h \
../hal/utils/include/utils.h ../hal/include/hpl_pdec_async.h \
../hal/include/hal_spi_m_dma.h ../hal/include/hpl_spi_m_dma.h \
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
../hal/include/hpl_pwm.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hpl/tcc/tcc_lite.h \
../Config/peripheral_clk_config.h ../hpl/adc/hpl_adc_base.h \
../hal/include/hpl_adc_sync.h
@ -552,13 +551,7 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
../hpl/tc/tc_lite.h:
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hpl/tcc/tcc_lite.h:
../Config/peripheral_clk_config.h:

View File

@ -152,8 +152,7 @@ ethercat/ethercat_e54.d ethercat/ethercat_e54.o: \
../hal/utils/include/utils.h ../hal/include/hpl_pdec_async.h \
../hal/include/hal_spi_m_dma.h ../hal/include/hpl_spi_m_dma.h \
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
../hal/include/hpl_pwm.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hpl/tcc/tcc_lite.h \
../pins.h ../driver_init.h ../ethercat/ethercat_e54.h \
../ethercat/ethercat_slave_def.h ../bldc.h ../arm_math.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\string.h \
@ -170,7 +169,8 @@ ethercat/ethercat_e54.d ethercat/ethercat_e54.o: \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\xlocale.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\string.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\math.h \
../atmel_start.h ../control.h ../utilities.h ../statemachine.h
../atmel_start.h ../control.h ../utilities.h ../motor_params.h \
../statemachine.h
../atmel_start.h:
@ -570,13 +570,7 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
../hpl/tc/tc_lite.h:
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hpl/tcc/tcc_lite.h:
../pins.h:
@ -624,4 +618,6 @@ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-no
../utilities.h:
../motor_params.h:
../statemachine.h:

View File

@ -152,8 +152,7 @@ examples/driver_examples.d examples/driver_examples.o: \
../hal/utils/include/utils.h ../hal/include/hpl_pdec_async.h \
../hal/include/hal_spi_m_dma.h ../hal/include/hpl_spi_m_dma.h \
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
../hal/include/hpl_pwm.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hpl/tcc/tcc_lite.h
../examples/driver_examples.h:
@ -553,10 +552,4 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
../hpl/tc/tc_lite.h:
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hpl/tcc/tcc_lite.h:

View File

@ -1,468 +0,0 @@
hal/src/hal_pwm.d hal/src/hal_pwm.o: ../hal/src/hal_pwm.c \
../hal/include/hal_pwm.h ../hal/include/hpl_pwm.h \
../hal/utils/include/compiler.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stddef.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdint.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\stdint.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\machine\_default_types.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\features.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\_newlib_version.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_intsup.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_stdint.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdbool.h \
../hal/utils/include/parts.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54p20a.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/core_cm4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_version.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_compiler.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_gcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/mpu_armv7.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/system_same54.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/adc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/aes.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/can.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ccl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/cmcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dsu.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/eic.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/evsys.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/freqm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/hmatrixb.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/icm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/i2s.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/mclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/nvmctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/oscctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/osc32kctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pdec.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/port.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/qspi.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ramecc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rstc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rtc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sdhc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sercom.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/supc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/trng.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/usb.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/wdt.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/aes.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ccl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/cmcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dsu.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/eic.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/evsys.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/freqm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/hmatrix.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/icm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/i2s.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/mclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/nvmctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/oscctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/osc32kctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pdec.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/port.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pukcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/qspi.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ramecc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rstc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rtc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom2.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom3.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom5.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom6.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom7.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/supc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc2.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc3.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc5.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc6.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc7.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc2.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc3.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/trng.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/usb.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/wdt.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/pio/same54p20a.h \
../hri/hri_e54.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/sam.h \
../hri/hri_ac_e54.h ../hal/include/hal_atomic.h ../hri/hri_adc_e54.h \
../hri/hri_aes_e54.h ../hri/hri_can_e54.h ../hri/hri_ccl_e54.h \
../hri/hri_cmcc_e54.h ../hri/hri_dac_e54.h ../hri/hri_dmac_e54.h \
../hri/hri_dsu_e54.h ../hri/hri_eic_e54.h ../hri/hri_evsys_e54.h \
../hri/hri_freqm_e54.h ../hri/hri_gclk_e54.h ../hri/hri_gmac_e54.h \
../hri/hri_hmatrixb_e54.h ../hri/hri_i2s_e54.h ../hri/hri_icm_e54.h \
../hri/hri_mclk_e54.h ../hri/hri_nvmctrl_e54.h \
../hri/hri_osc32kctrl_e54.h ../hri/hri_oscctrl_e54.h \
../hri/hri_pac_e54.h ../hri/hri_pcc_e54.h ../hri/hri_pdec_e54.h \
../hri/hri_pm_e54.h ../hri/hri_port_e54.h ../hri/hri_qspi_e54.h \
../hri/hri_ramecc_e54.h ../hri/hri_rstc_e54.h ../hri/hri_rtc_e54.h \
../hri/hri_sdhc_e54.h ../hri/hri_sercom_e54.h ../hri/hri_supc_e54.h \
../hri/hri_tc_e54.h ../hri/hri_tcc_e54.h ../hri/hri_trng_e54.h \
../hri/hri_usb_e54.h ../hri/hri_wdt_e54.h \
../hal/utils/include/err_codes.h ../hal/include/hpl_irq.h \
../hal/utils/include/utils_assert.h ../hal/utils/include/utils.h
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hal/utils/include/compiler.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stddef.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdint.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\stdint.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\machine\_default_types.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\features.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\_newlib_version.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_intsup.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_stdint.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdbool.h:
../hal/utils/include/parts.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54p20a.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/core_cm4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_version.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_compiler.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_gcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/mpu_armv7.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/system_same54.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/adc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/aes.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/can.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ccl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/cmcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dsu.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/eic.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/evsys.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/freqm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/hmatrixb.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/icm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/i2s.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/mclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/nvmctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/oscctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/osc32kctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pdec.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/port.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/qspi.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ramecc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rstc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rtc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sdhc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sercom.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/supc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/trng.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/usb.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/wdt.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/aes.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ccl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/cmcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dsu.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/eic.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/evsys.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/freqm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/hmatrix.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/icm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/i2s.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/mclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/nvmctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/oscctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/osc32kctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pdec.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/port.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pukcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/qspi.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ramecc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rstc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rtc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom2.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom3.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom5.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom6.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom7.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/supc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc2.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc3.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc5.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc6.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc7.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc2.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc3.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/trng.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/usb.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/wdt.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/pio/same54p20a.h:
../hri/hri_e54.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/sam.h:
../hri/hri_ac_e54.h:
../hal/include/hal_atomic.h:
../hri/hri_adc_e54.h:
../hri/hri_aes_e54.h:
../hri/hri_can_e54.h:
../hri/hri_ccl_e54.h:
../hri/hri_cmcc_e54.h:
../hri/hri_dac_e54.h:
../hri/hri_dmac_e54.h:
../hri/hri_dsu_e54.h:
../hri/hri_eic_e54.h:
../hri/hri_evsys_e54.h:
../hri/hri_freqm_e54.h:
../hri/hri_gclk_e54.h:
../hri/hri_gmac_e54.h:
../hri/hri_hmatrixb_e54.h:
../hri/hri_i2s_e54.h:
../hri/hri_icm_e54.h:
../hri/hri_mclk_e54.h:
../hri/hri_nvmctrl_e54.h:
../hri/hri_osc32kctrl_e54.h:
../hri/hri_oscctrl_e54.h:
../hri/hri_pac_e54.h:
../hri/hri_pcc_e54.h:
../hri/hri_pdec_e54.h:
../hri/hri_pm_e54.h:
../hri/hri_port_e54.h:
../hri/hri_qspi_e54.h:
../hri/hri_ramecc_e54.h:
../hri/hri_rstc_e54.h:
../hri/hri_rtc_e54.h:
../hri/hri_sdhc_e54.h:
../hri/hri_sercom_e54.h:
../hri/hri_supc_e54.h:
../hri/hri_tc_e54.h:
../hri/hri_tcc_e54.h:
../hri/hri_trng_e54.h:
../hri/hri_usb_e54.h:
../hri/hri_wdt_e54.h:
../hal/utils/include/err_codes.h:
../hal/include/hpl_irq.h:
../hal/utils/include/utils_assert.h:
../hal/utils/include/utils.h:

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hpl/tcc/hpl_tcc.d hpl/tcc/hpl_tcc.o: ../hpl/tcc/hpl_tcc.c \
../hal/utils/include/compiler.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stddef.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdint.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\stdint.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\machine\_default_types.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\features.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\_newlib_version.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_intsup.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_stdint.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdbool.h \
../hal/utils/include/parts.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54p20a.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/core_cm4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_version.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_compiler.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_gcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/mpu_armv7.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/system_same54.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/adc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/aes.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/can.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ccl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/cmcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dsu.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/eic.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/evsys.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/freqm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/hmatrixb.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/icm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/i2s.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/mclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/nvmctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/oscctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/osc32kctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pdec.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/port.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/qspi.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ramecc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rstc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rtc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sdhc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sercom.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/supc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/trng.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/usb.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/wdt.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/aes.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ccl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/cmcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dsu.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/eic.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/evsys.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/freqm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gmac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/hmatrix.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/icm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/i2s.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/mclk.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/nvmctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/oscctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/osc32kctrl.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pac.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pdec.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pm.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/port.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pukcc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/qspi.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ramecc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rstc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rtc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom2.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom3.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom5.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom6.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom7.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/supc.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc2.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc3.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc5.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc6.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc7.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc0.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc1.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc2.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc3.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc4.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/trng.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/usb.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/wdt.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/pio/same54p20a.h \
../hri/hri_e54.h \
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/sam.h \
../hri/hri_ac_e54.h ../hal/include/hal_atomic.h ../hri/hri_adc_e54.h \
../hri/hri_aes_e54.h ../hri/hri_can_e54.h ../hri/hri_ccl_e54.h \
../hri/hri_cmcc_e54.h ../hri/hri_dac_e54.h ../hri/hri_dmac_e54.h \
../hri/hri_dsu_e54.h ../hri/hri_eic_e54.h ../hri/hri_evsys_e54.h \
../hri/hri_freqm_e54.h ../hri/hri_gclk_e54.h ../hri/hri_gmac_e54.h \
../hri/hri_hmatrixb_e54.h ../hri/hri_i2s_e54.h ../hri/hri_icm_e54.h \
../hri/hri_mclk_e54.h ../hri/hri_nvmctrl_e54.h \
../hri/hri_osc32kctrl_e54.h ../hri/hri_oscctrl_e54.h \
../hri/hri_pac_e54.h ../hri/hri_pcc_e54.h ../hri/hri_pdec_e54.h \
../hri/hri_pm_e54.h ../hri/hri_port_e54.h ../hri/hri_qspi_e54.h \
../hri/hri_ramecc_e54.h ../hri/hri_rstc_e54.h ../hri/hri_rtc_e54.h \
../hri/hri_sdhc_e54.h ../hri/hri_sercom_e54.h ../hri/hri_supc_e54.h \
../hri/hri_tc_e54.h ../hri/hri_tcc_e54.h ../hri/hri_trng_e54.h \
../hri/hri_usb_e54.h ../hri/hri_wdt_e54.h \
../hal/utils/include/err_codes.h ../hal/include/hpl_pwm.h \
../hal/include/hpl_irq.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h \
../hal/include/hpl_irq.h ../Config/hpl_tcc_config.h \
../Config/peripheral_clk_config.h ../hal/utils/include/utils.h \
../hal/utils/include/utils_assert.h
../hal/utils/include/compiler.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stddef.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdint.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\stdint.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\machine\_default_types.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\features.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\_newlib_version.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_intsup.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\_stdint.h:
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\lib\gcc\arm-none-eabi\6.3.1\include\stdbool.h:
../hal/utils/include/parts.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/same54p20a.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/core_cm4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_version.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_compiler.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/cmsis_gcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include/mpu_armv7.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/system_same54.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/adc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/aes.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/can.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ccl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/cmcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/dsu.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/eic.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/evsys.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/freqm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/gmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/hmatrixb.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/icm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/i2s.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/mclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/nvmctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/oscctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/osc32kctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pdec.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/pm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/port.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/qspi.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/ramecc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rstc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/rtc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sdhc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/sercom.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/supc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/tcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/trng.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/usb.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/component/wdt.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/adc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/aes.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/can1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ccl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/cmcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/dsu.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/eic.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/evsys.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/freqm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/gmac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/hmatrix.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/icm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/i2s.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/mclk.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/nvmctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/oscctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/osc32kctrl.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pac.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pdec.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pm.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/port.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/pukcc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/qspi.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/ramecc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rstc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/rtc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sdhc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom2.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom3.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom5.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom6.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/sercom7.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/supc.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc2.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc3.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc5.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc6.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tc7.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc0.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc1.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc2.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc3.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/tcc4.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/trng.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/usb.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/instance/wdt.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/pio/same54p20a.h:
../hri/hri_e54.h:
C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include/sam.h:
../hri/hri_ac_e54.h:
../hal/include/hal_atomic.h:
../hri/hri_adc_e54.h:
../hri/hri_aes_e54.h:
../hri/hri_can_e54.h:
../hri/hri_ccl_e54.h:
../hri/hri_cmcc_e54.h:
../hri/hri_dac_e54.h:
../hri/hri_dmac_e54.h:
../hri/hri_dsu_e54.h:
../hri/hri_eic_e54.h:
../hri/hri_evsys_e54.h:
../hri/hri_freqm_e54.h:
../hri/hri_gclk_e54.h:
../hri/hri_gmac_e54.h:
../hri/hri_hmatrixb_e54.h:
../hri/hri_i2s_e54.h:
../hri/hri_icm_e54.h:
../hri/hri_mclk_e54.h:
../hri/hri_nvmctrl_e54.h:
../hri/hri_osc32kctrl_e54.h:
../hri/hri_oscctrl_e54.h:
../hri/hri_pac_e54.h:
../hri/hri_pcc_e54.h:
../hri/hri_pdec_e54.h:
../hri/hri_pm_e54.h:
../hri/hri_port_e54.h:
../hri/hri_qspi_e54.h:
../hri/hri_ramecc_e54.h:
../hri/hri_rstc_e54.h:
../hri/hri_rtc_e54.h:
../hri/hri_sdhc_e54.h:
../hri/hri_sercom_e54.h:
../hri/hri_supc_e54.h:
../hri/hri_tc_e54.h:
../hri/hri_tcc_e54.h:
../hri/hri_trng_e54.h:
../hri/hri_usb_e54.h:
../hri/hri_wdt_e54.h:
../hal/utils/include/err_codes.h:
../hal/include/hpl_pwm.h:
../hal/include/hpl_irq.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hal/include/hpl_irq.h:
../Config/hpl_tcc_config.h:
../Config/peripheral_clk_config.h:
../hal/utils/include/utils.h:
../hal/utils/include/utils_assert.h:

View File

@ -151,8 +151,7 @@ main.d main.o: .././main.c ../atmel_start.h ../driver_init.h \
../hal/utils/include/utils.h ../hal/include/hpl_pdec_async.h \
../hal/include/hal_spi_m_dma.h ../hal/include/hpl_spi_m_dma.h \
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
../hal/include/hpl_pwm.h ../hpl/tcc/hpl_tcc.h ../hal/include/hpl_timer.h \
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hpl/tcc/tcc_lite.h \
../arm_math.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\string.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\_ansi.h \
@ -169,8 +168,8 @@ main.d main.o: .././main.c ../atmel_start.h ../driver_init.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\string.h \
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\math.h \
.././interrupt_handlers.h .././atmel_start.h .././pins.h .././bldc.h \
.././arm_math.h .././control.h .././utilities.h .././statemachine.h \
.././ethercat/ethercat_e54.h .././configuration.h \
.././arm_math.h .././control.h .././utilities.h .././motor_params.h \
.././statemachine.h .././ethercat/ethercat_e54.h .././configuration.h \
.././ethercat/ethercat_slave_def.h .././ethercat/ethercat_e54.h
../atmel_start.h:
@ -571,13 +570,7 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
../hpl/tc/tc_lite.h:
../hal/include/hal_pwm.h:
../hal/include/hpl_pwm.h:
../hpl/tcc/hpl_tcc.h:
../hal/include/hpl_timer.h:
../hpl/tcc/tcc_lite.h:
../arm_math.h:
@ -623,6 +616,8 @@ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-no
.././utilities.h:
.././motor_params.h:
.././statemachine.h:
.././ethercat/ethercat_e54.h:

Binary file not shown.

View File

@ -36,8 +36,6 @@ hal\src\hal_io.c
hal\src\hal_pdec_async.c
hal\src\hal_pwm.c
hal\src\hal_sleep.c
hal\src\hal_spi_m_dma.c
@ -84,7 +82,7 @@ hpl\ramecc\hpl_ramecc.c
hpl\sercom\hpl_sercom.c
hpl\tcc\hpl_tcc.c
hpl\tcc\tcc_lite.c
hpl\tc\tc_lite.c

View File

@ -30,6 +30,9 @@
#define HALL_C GPIO(GPIO_PORTA, 4)
#define HALL_B GPIO(GPIO_PORTA, 5)
#define HALL_A GPIO(GPIO_PORTA, 6)
#define M2_4 GPIO(GPIO_PORTA, 16)
#define M2_5 GPIO(GPIO_PORTA, 17)
#define M3_3 GPIO(GPIO_PORTA, 18)
#define DRV_ENA GPIO(GPIO_PORTA, 22)
#define DRV_INA GPIO(GPIO_PORTA, 23)
#define DRV_RESET GPIO(GPIO_PORTA, 27)
@ -38,6 +41,8 @@
#define nDRV_RESET GPIO(GPIO_PORTB, 5)
#define PB08 GPIO(GPIO_PORTB, 8)
#define PB09 GPIO(GPIO_PORTB, 9)
#define M3_4 GPIO(GPIO_PORTB, 14)
#define M3_5 GPIO(GPIO_PORTB, 15)
#define PB16 GPIO(GPIO_PORTB, 16)
#define PB17 GPIO(GPIO_PORTB, 17)
#define DRV_INC GPIO(GPIO_PORTB, 26)
@ -48,8 +53,14 @@
#define DEBUG_1 GPIO(GPIO_PORTC, 1)
#define DEBUG_3 GPIO(GPIO_PORTC, 2)
#define DEBUG_2 GPIO(GPIO_PORTC, 3)
#define DEBUG_4 GPIO(GPIO_PORTC, 30)
#define M2_0 GPIO(GPIO_PORTC, 4)
#define M3_2 GPIO(GPIO_PORTC, 14)
#define LED0 GPIO(GPIO_PORTC, 18)
#define M3_0 GPIO(GPIO_PORTC, 22)
#define M3_1 GPIO(GPIO_PORTC, 23)
#define DEBUG_4 GPIO(GPIO_PORTC, 30)
#define M2_1 GPIO(GPIO_PORTD, 8)
#define M2_2 GPIO(GPIO_PORTD, 9)
#define M2_3 GPIO(GPIO_PORTD, 10)
#endif // ATMEL_START_PINS_H_INCLUDED

View File

@ -143,6 +143,9 @@ void BldcInitFunctions()
Motor1.DisableMotor = DisableM1GateDrivers;
Motor2.DisableMotor = DisableM2GateDrivers;
Motor3.DisableMotor = DisableM3GateDrivers;
Motor1.SetDutyCycle = SetM1DutyCycle;
Motor2.SetDutyCycle = SetM2DutyCycle;
Motor3.SetDutyCycle = SetM3DutyCycle;
}
// ----------------------------------------------------------------------
@ -269,27 +272,105 @@ void DisableM3GateDrivers(BLDCMotor_t *motor)
}
void SetM1DutyCycle(uint16_t duty)
{
TCC1->CCBUF[1].reg = duty;
}
void SetM2DutyCycle(uint16_t duty)
{
TCC0->CCBUF[0].reg = duty;
TCC0->CCBUF[1].reg = duty;
TCC0->CCBUF[2].reg = duty;
TCC0->CCBUF[3].reg = duty;
}
void SetM3DutyCycle(uint16_t duty)
{
TCC0->CCBUF[4].reg = duty;
TCC0->CCBUF[5].reg = duty;
TCC1->CCBUF[0].reg = duty;
}
/**
** ____|___TCC0_________ ||____TCC1_________|
** W0 | M2_0 | CC0 || __M3_2__ | CC0 |
** W1 | M2_1 | CC1 || - | CC1 |
** W2 | M2_2 | CC2 || M1_0 | CC1 |
** W3 | M2_3 | CC3 || M1_1 | CC1 |
** W4 | __M3_0__ | CC4 || M1_2 | CC1 |
** W5 | __M3_1__ | CC5 || M1_3 | CC1 |
** W6 | M2_4 | CC0 || M1_4 | CC1 |
** W7 | M2_5 | CC1 || M1_5 | CC1 |
*/
void exec_commutation(void)
{
//CRITICAL_SECTION_ENTER();
//Motor1.currentHallPattern = HALLPatternGet();
{
// ----------------------------------------------------------------------
// Read Motor Hall Sensors
// ----------------------------------------------------------------------
Motor1.motor_status.currentHallPattern = Motor1.ReadHall();
Motor2.motor_status.currentHallPattern = Motor2.ReadHall();
Motor3.motor_status.currentHallPattern = Motor3.ReadHall();
Motor2.motor_status.currentHallPattern = Motor1.ReadHall();
Motor3.motor_status.currentHallPattern = Motor1.ReadHall();
//tic(DEBUG_3);
////if ((Motor1.nextHallPattern == Motor1.currentHallPattern) &&
//if ((Motor1.currentHallPattern != INVALID_HALL_0) &&
//(Motor1.currentHallPattern != INVALID_HALL_7)) {
///* Check the Hall pattern is a valid pattern */
//hri_tcc_write_PATTBUF_reg(TCC1, (COMMUTATION_PATTERN[(Motor1.currentHallPattern + Motor1.directionOffset)]));
//}
// ----------------------------------------------------------------------
// Multi Motor Register Masking
// ----------------------------------------------------------------------
volatile uint16_t temp_M1 = COMMUTATION_PATTERN_M1[Motor1.motor_status.currentHallPattern];
volatile uint16_t temp_M2 = COMMUTATION_PATTERN_M2[Motor2.motor_status.currentHallPattern];
volatile uint16_t temp_M3_tcc1_des = COMMUTATION_PATTERN_M1[Motor3.motor_status.currentHallPattern] & m3_TCC1_mask;
volatile uint16_t temp_M3_tcc0_des = COMMUTATION_PATTERN_M2[Motor3.motor_status.currentHallPattern] & m3_TCC0_mask;
/* Zero target bits */
temp_M1 &= m3_TCC1_inv_mask;
temp_M2 &= m3_TCC0_inv_mask;
/* Set Desired bits */
temp_M1 |= temp_M3_tcc1_des;
temp_M2 |= temp_M3_tcc0_des;
// ----------------------------------------------------------------------
// Set Pattern Buffers
// ----------------------------------------------------------------------
TCC0->PATTBUF.reg = (uint16_t)temp_M2;
TCC1->PATTBUF.reg = (uint16_t)temp_M1;
// ----------------------------------------------------------------------
// Set Remaining GPIO lines responsible for M3 Commutation
// ----------------------------------------------------------------------
///* GPIO En Pin Setting for M3 */
switch(Motor3.motor_status.currentHallPattern)
{
// REG_PORT_OUTSET0 = Port A
// REG_PORT_OUTSET1 = Port B
case 1: case 6: case 9: case 14:
REG_PORT_OUTCLR0 = (1 << GPIO_PIN(M3_3));
REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4))|(1 << GPIO_PIN(M3_5));
break;
case 2: case 5: case 10: case 13:
REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4));
REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_5));
break;
case 3: case 4: case 11: case 12:
REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_4));
REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_5));
break;
default:
/*hall error - should not get here */
break;
}
TCC1->PATTBUF.reg = COMMUTATION_PATTERN_M1[(Motor1.motor_status.currentHallPattern +
Motor1.motor_setpoints.directionOffset)];
// TCC1->PATTBUF.reg = COMMUTATION_PATTERN_M1[(Motor1.motor_status.currentHallPattern +
// Motor1.motor_setpoints.directionOffset)];
// ----------------------------------------------------------------------
// Set Calculated Duty Cycles
// ----------------------------------------------------------------------
Motor1.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
Motor2.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle+1);
Motor3.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle+2);
TCC1->CCBUF->reg = (uint16_t)Motor1.motor_status.duty_cycle;
//TCC1->CCBUF->reg = (uint16_t)Motor1.motor_status.duty_cycle;
//hri_tcc_write_PATTBUF_reg(TCC1, (COMMUTATION_PATTERN[(Motor1.currentHallPattern + Motor1.directionOffset)]));
//hri_tcc_write_CCBUF_CCBUF_bf(TCC1, 0, 150);

View File

@ -112,7 +112,7 @@ volatile typedef struct
// ----------------------------------------------------------------------
typedef uint8_t (*ReadHallFunc)(void);
typedef void (*DisableMotorFunc)(void);
typedef void (*SetMotorDutyCycle)(uint16_t);
volatile typedef struct BLDCmotor
{
@ -136,6 +136,7 @@ volatile typedef struct BLDCmotor
/* Functions */
ReadHallFunc ReadHall;
DisableMotorFunc DisableMotor;
SetMotorDutyCycle SetDutyCycle;
} BLDCMotor_t;
@ -183,6 +184,9 @@ uint8_t readM3Hall(void);
void DisableM1GateDrivers(BLDCMotor_t *motor);
void DisableM2GateDrivers(BLDCMotor_t *motor);
void DisableM3GateDrivers(BLDCMotor_t *motor);
void SetM1DutyCycle(uint16_t duty);
void SetM2DutyCycle(uint16_t duty);
void SetM3DutyCycle(uint16_t duty);
// ----------------------------------------------------------------------
// all controller objects, variables and helpers:

View File

@ -31,8 +31,12 @@ inline void configure_tcc_pwm(void)
hri_tcc_set_WAVE_POL3_bit(TCC1);
hri_tcc_set_WAVE_POL4_bit(TCC1);
pwm_register_callback(&TCC_PWM, PWM_PERIOD_CB, pwm_cb);
pwm_enable(&TCC_PWM);
hri_tcc_clear_CTRLA_ENABLE_bit(TCC1);
hri_tcc_write_CTRLA_MSYNC_bit(TCC1, true);
hri_tcc_write_CTRLA_ENABLE_bit(TCC1, 1 << TCC_CTRLA_ENABLE_Pos); /* Enable: enabled */
//pwm_register_callback(&TCC_PWM, PWM_PERIOD_CB, pwm_cb);
//pwm_enable(&TCC_PWM);
}

View File

@ -46,8 +46,6 @@ struct pdec_async_descriptor POSITION_DECODER_0;
struct spi_m_dma_descriptor SPI_0;
struct pwm_descriptor TCC_PWM;
/**
* \brief ADC initialization function
*
@ -226,9 +224,37 @@ void TC_ECAT_CLOCK_init(void)
hri_gclk_write_PCHCTRL_reg(GCLK, TC7_GCLK_ID, CONF_GCLK_TC7_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
}
void TCC_PWM2_PORT_init(void)
{
gpio_set_pin_function(M2_0, PINMUX_PC04F_TCC0_WO0);
gpio_set_pin_function(M2_1, PINMUX_PD08F_TCC0_WO1);
gpio_set_pin_function(M2_2, PINMUX_PD09F_TCC0_WO2);
gpio_set_pin_function(M2_3, PINMUX_PD10F_TCC0_WO3);
gpio_set_pin_function(M2_4, PINMUX_PA16G_TCC0_WO4);
gpio_set_pin_function(M2_5, PINMUX_PA17G_TCC0_WO5);
gpio_set_pin_function(M3_0, PINMUX_PC22F_TCC0_WO6);
gpio_set_pin_function(M3_1, PINMUX_PC23F_TCC0_WO7);
}
void TCC_PWM2_CLOCK_init(void)
{
hri_mclk_set_APBBMASK_TCC0_bit(MCLK);
hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, CONF_GCLK_TCC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
}
void TCC_PWM_PORT_init(void)
{
gpio_set_pin_function(M3_2, PINMUX_PC14G_TCC1_WO0);
gpio_set_pin_function(DRV_INC, PINMUX_PB26F_TCC1_WO2);
gpio_set_pin_function(DRV_INB, PINMUX_PB27F_TCC1_WO3);
@ -244,22 +270,28 @@ void TCC_PWM_PORT_init(void)
void TCC_PWM_CLOCK_init(void)
{
hri_mclk_set_APBBMASK_TCC1_bit(MCLK);
hri_gclk_write_PCHCTRL_reg(GCLK, TCC1_GCLK_ID, CONF_GCLK_TCC1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
}
void TCC_PWM_init(void)
{
TCC_PWM_CLOCK_init();
TCC_PWM_PORT_init();
pwm_init(&TCC_PWM, TCC1, _tcc_get_pwm());
}
void system_init(void)
{
init_mcu();
// GPIO on PA18
gpio_set_pin_level(M3_3,
// <y> Initial level
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
// Set pin direction to output
gpio_set_pin_direction(M3_3, GPIO_DIRECTION_OUT);
gpio_set_pin_function(M3_3, GPIO_PIN_FUNCTION_OFF);
// GPIO on PA27
gpio_set_pin_level(DRV_RESET,
@ -288,6 +320,34 @@ void system_init(void)
gpio_set_pin_function(ECAT_SPI_CS_PIN, GPIO_PIN_FUNCTION_OFF);
// GPIO on PB14
gpio_set_pin_level(M3_4,
// <y> Initial level
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
// Set pin direction to output
gpio_set_pin_direction(M3_4, GPIO_DIRECTION_OUT);
gpio_set_pin_function(M3_4, GPIO_PIN_FUNCTION_OFF);
// GPIO on PB15
gpio_set_pin_level(M3_5,
// <y> Initial level
// <id> pad_initial_level
// <false"> Low
// <true"> High
false);
// Set pin direction to output
gpio_set_pin_direction(M3_5, GPIO_DIRECTION_OUT);
gpio_set_pin_function(M3_5, GPIO_PIN_FUNCTION_OFF);
// GPIO on PB31
// Set pin direction to input
@ -394,5 +454,15 @@ void system_init(void)
TC_ECAT_init();
TCC_PWM2_CLOCK_init();
TCC_PWM2_PORT_init();
TCC_PWM2_init();
TCC_PWM_CLOCK_init();
TCC_PWM_PORT_init();
TCC_PWM_init();
}

View File

@ -35,9 +35,8 @@ extern "C" {
#include <hal_spi_m_dma.h>
#include <tc_lite.h>
#include <tc_lite.h>
#include <hal_pwm.h>
#include <hpl_tcc.h>
#include <tcc_lite.h>
#include <tcc_lite.h>
extern struct adc_async_descriptor ADC_0;
extern struct adc_async_descriptor ADC_1;
@ -46,8 +45,6 @@ extern struct pdec_async_descriptor POSITION_DECODER_0;
extern struct spi_m_dma_descriptor SPI_0;
extern struct pwm_descriptor TCC_PWM;
void ADC_0_init(void);
void ADC_1_init(void);
@ -72,9 +69,17 @@ void TC_ECAT_CLOCK_init(void);
int8_t TC_ECAT_init(void);
void TCC_PWM_PORT_init(void);
void TCC_PWM2_CLOCK_init(void);
void TCC_PWM2_PORT_init(void);
int8_t TCC_PWM2_init(void);
void TCC_PWM_CLOCK_init(void);
void TCC_PWM_init(void);
void TCC_PWM_PORT_init(void);
int8_t TCC_PWM_init(void);
/**
* \brief Perform system initialization, initialize pins and clocks for

View File

@ -107,12 +107,3 @@ void SPI_0_example(void)
spi_m_dma_enable(&SPI_0);
io_write(io, example_SPI_0, 12);
}
/**
* Example of using TCC_PWM.
*/
void TCC_PWM_example(void)
{
pwm_set_parameters(&TCC_PWM, 10000, 5000);
pwm_enable(&TCC_PWM);
}

View File

@ -24,8 +24,6 @@ void POSITION_DECODER_0_example(void);
void SPI_0_example(void);
void TCC_PWM_example(void);
#ifdef __cplusplus
}
#endif

View File

@ -1,53 +0,0 @@
The PWM Driver(bare-bone)
=========================
Pulse-width modulation (PWM) is used to create an analog behavior
digitally by controlling the amount of power transferred to the
connected peripheral. This is achieved by controlling the high period
(duty-cycle) of a periodic signal.
User can change the period or duty cycle whenever PWM is running. The
function pwm_set_parameters is used to configure these two parameters.
Note these are raw register values and the parameter duty_cycle means
the period of first half during one cycle, which should be not beyond
total period value.
In addition, user can also get multi PWM channels output from different
peripherals at the same time, which is implemented more flexible by the
function pointers.
Features
--------
* Initialization/de-initialization
* Enabling/disabling
* Run-time control of PWM duty-cycle and period
* Notifications about errors and one PWM cycle is done
Applications
------------
Motor control, ballast, LED, H-bridge, power converters, and
other types of power control applications.
Dependencies
------------
The peripheral which can perform waveform generation like frequency
generation and pulse-width modulation, such as Timer/Counter.
Concurrency
-----------
N/A
Limitations
-----------
The current driver doesn't support the features like recoverable,
non-recoverable faults, dithering, dead-time insertion.
Known issues and workarounds
----------------------------
N/A

View File

@ -1,151 +0,0 @@
/**
* \file
*
* \brief PWM functionality declaration.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#ifndef HAL_PWM_H_INCLUDED
#define HAL_PWM_H_INCLUDED
#include <hpl_pwm.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \addtogroup doc_driver_hal_pwm_async
*
*@{
*/
/**
* \brief PWM descriptor
*
* The PWM descriptor forward declaration.
*/
struct pwm_descriptor;
/**
* \brief PWM callback type
*/
typedef void (*pwm_cb_t)(const struct pwm_descriptor *const descr);
/**
* \brief PWM callback types
*/
enum pwm_callback_type { PWM_PERIOD_CB, PWM_ERROR_CB };
/**
* \brief PWM callbacks
*/
struct pwm_callbacks {
pwm_cb_t period;
pwm_cb_t error;
};
/** \brief PWM descriptor
*/
struct pwm_descriptor {
/** PWM device */
struct _pwm_device device;
/** PWM callback structure */
struct pwm_callbacks pwm_cb;
};
/** \brief Initialize the PWM HAL instance and hardware
*
* \param[in] descr Pointer to the HAL PWM descriptor
* \param[in] hw The pointer to hardware instance
* \param[in] func The pointer to a set of functions pointers
*
* \return Operation status.
*/
int32_t pwm_init(struct pwm_descriptor *const descr, void *const hw, struct _pwm_hpl_interface *const func);
/** \brief Deinitialize the PWM HAL instance and hardware
*
* \param[in] descr Pointer to the HAL PWM descriptor
*
* \return Operation status.
*/
int32_t pwm_deinit(struct pwm_descriptor *const descr);
/** \brief PWM output start
*
* \param[in] descr Pointer to the HAL PWM descriptor
*
* \return Operation status.
*/
int32_t pwm_enable(struct pwm_descriptor *const descr);
/** \brief PWM output stop
*
* \param[in] descr Pointer to the HAL PWM descriptor
*
* \return Operation status.
*/
int32_t pwm_disable(struct pwm_descriptor *const descr);
/** \brief Register PWM callback
*
* \param[in] descr Pointer to the HAL PWM descriptor
* \param[in] type Callback type
* \param[in] cb A callback function, passing NULL de-registers callback
*
* \return Operation status.
* \retval 0 Success
* \retval -1 Error
*/
int32_t pwm_register_callback(struct pwm_descriptor *const descr, enum pwm_callback_type type, pwm_cb_t cb);
/** \brief Change PWM parameter
*
* \param[in] descr Pointer to the HAL PWM descriptor
* \param[in] period Total period of one PWM cycle
* \param[in] duty_cycle Period of PWM first half during one cycle
*
* \return Operation status.
*/
int32_t pwm_set_parameters(struct pwm_descriptor *const descr, const pwm_period_t period,
const pwm_period_t duty_cycle);
/** \brief Get PWM driver version
*
* \return Current driver version.
*/
uint32_t pwm_get_version(void);
/**@}*/
#ifdef __cplusplus
}
#endif
#endif /* HAL_PWM;_H_INCLUDED */

View File

@ -1,193 +0,0 @@
/**
* \file
*
* \brief PWM related functionality declaration.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#ifndef _HPL_PWM_H_INCLUDED
#define _HPL_PWM_H_INCLUDED
/**
* \addtogroup HPL PWM
*
* \section hpl_pwm_rev Revision History
* - v1.0.0 Initial Release
*
*@{
*/
#include <compiler.h>
#include "hpl_irq.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* \brief PWM callback types
*/
enum _pwm_callback_type { PWM_DEVICE_PERIOD_CB, PWM_DEVICE_ERROR_CB };
/**
* \brief PWM pulse-width period
*/
typedef uint32_t pwm_period_t;
/**
* \brief PWM device structure
*
* The PWM device structure forward declaration.
*/
struct _pwm_device;
/**
* \brief PWM interrupt callbacks
*/
struct _pwm_callback {
void (*pwm_period_cb)(struct _pwm_device *device);
void (*pwm_error_cb)(struct _pwm_device *device);
};
/**
* \brief PWM descriptor device structure
*/
struct _pwm_device {
struct _pwm_callback callback;
struct _irq_descriptor irq;
void * hw;
};
/**
* \brief PWM functions, pointers to low-level functions
*/
struct _pwm_hpl_interface {
int32_t (*init)(struct _pwm_device *const device, void *const hw);
void (*deinit)(struct _pwm_device *const device);
void (*start_pwm)(struct _pwm_device *const device);
void (*stop_pwm)(struct _pwm_device *const device);
void (*set_pwm_param)(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle);
bool (*is_pwm_enabled)(const struct _pwm_device *const device);
pwm_period_t (*pwm_get_period)(const struct _pwm_device *const device);
uint32_t (*pwm_get_duty)(const struct _pwm_device *const device);
void (*set_irq_state)(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable);
};
/**
* \brief Initialize TC
*
* This function does low level TC configuration.
*
* \param[in] device The pointer to PWM device instance
* \param[in] hw The pointer to hardware instance
*
* \return Initialization status.
*/
int32_t _pwm_init(struct _pwm_device *const device, void *const hw);
/**
* \brief Deinitialize TC
*
* \param[in] device The pointer to PWM device instance
*/
void _pwm_deinit(struct _pwm_device *const device);
/**
* \brief Retrieve offset of the given tc hardware instance
*
* \param[in] device The pointer to PWM device instance
*
* \return The offset of the given tc hardware instance
*/
uint8_t _pwm_get_hardware_offset(const struct _pwm_device *const device);
/**
* \brief Start hardware pwm
*
* \param[in] device The pointer to PWM device instance
*/
void _pwm_enable(struct _pwm_device *const device);
/**
* \brief Stop hardware pwm
*
* \param[in] device The pointer to PWM device instance
*/
void _pwm_disable(struct _pwm_device *const device);
/**
* \brief Set pwm parameter
*
* \param[in] device The pointer to PWM device instance
* \param[in] period Total period of one PWM cycle.
* \param[in] duty_cycle Period of PWM first half during one cycle.
*/
void _pwm_set_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle);
/**
* \brief Check if pwm is working
*
* \param[in] device The pointer to PWM device instance
*
* \return Check status.
* \retval true The given pwm is working
* \retval false The given pwm is not working
*/
bool _pwm_is_enabled(const struct _pwm_device *const device);
/**
* \brief Get pwm waveform period value
*
* \param[in] device The pointer to PWM device instance
*
* \return Period value.
*/
pwm_period_t _pwm_get_period(const struct _pwm_device *const device);
/**
* \brief Get pwm waveform duty cycle value
*
* \param[in] device The pointer to PWM device instance
*
* \return Duty cycle value
*/
uint32_t _pwm_get_duty(const struct _pwm_device *const device);
/**
* \brief Enable/disable PWM interrupt
*
* param[in] device The pointer to PWM device instance
* param[in] type The type of interrupt to disable/enable if applicable
* param[in] disable Enable or disable
*/
void _pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* _HPL_PWM_H_INCLUDED */

View File

@ -1,160 +0,0 @@
/**
* \file
*
* \brief Timer related functionality declaration.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#ifndef _HPL_TIMER_H_INCLUDED
#define _HPL_TIMER_H_INCLUDED
/**
* \addtogroup HPL Timer
*
* \section hpl_timer_rev Revision History
* - v1.0.0 Initial Release
*
*@{
*/
#include <compiler.h>
#include <hpl_irq.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \brief Timer device structure
*
* The Timer device structure forward declaration.
*/
struct _timer_device;
/**
* \brief Timer interrupt callbacks
*/
struct _timer_callbacks {
void (*period_expired)(struct _timer_device *device);
};
/**
* \brief Timer device structure
*/
struct _timer_device {
struct _timer_callbacks timer_cb;
struct _irq_descriptor irq;
void * hw;
};
/**
* \brief Timer functions, pointers to low-level functions
*/
struct _timer_hpl_interface {
int32_t (*init)(struct _timer_device *const device, void *const hw);
void (*deinit)(struct _timer_device *const device);
void (*start_timer)(struct _timer_device *const device);
void (*stop_timer)(struct _timer_device *const device);
void (*set_timer_period)(struct _timer_device *const device, const uint32_t clock_cycles);
uint32_t (*get_period)(const struct _timer_device *const device);
bool (*is_timer_started)(const struct _timer_device *const device);
void (*set_timer_irq)(struct _timer_device *const device);
};
/**
* \brief Initialize TCC
*
* This function does low level TCC configuration.
*
* \param[in] device The pointer to timer device instance
* \param[in] hw The pointer to hardware instance
*
* \return Initialization status.
*/
int32_t _timer_init(struct _timer_device *const device, void *const hw);
/**
* \brief Deinitialize TCC
*
* \param[in] device The pointer to timer device instance
*/
void _timer_deinit(struct _timer_device *const device);
/**
* \brief Start hardware timer
*
* \param[in] device The pointer to timer device instance
*/
void _timer_start(struct _timer_device *const device);
/**
* \brief Stop hardware timer
*
* \param[in] device The pointer to timer device instance
*/
void _timer_stop(struct _timer_device *const device);
/**
* \brief Set timer period
*
* \param[in] device The pointer to timer device instance
*/
void _timer_set_period(struct _timer_device *const device, const uint32_t clock_cycles);
/**
* \brief Retrieve timer period
*
* \param[in] device The pointer to timer device instance
*
* \return Timer period
*/
uint32_t _timer_get_period(const struct _timer_device *const device);
/**
* \brief Check if timer is running
*
* \param[in] device The pointer to timer device instance
*
* \return Check status.
* \retval true The given timer is running
* \retval false The given timer is not running
*/
bool _timer_is_started(const struct _timer_device *const device);
/**
* \brief Set timer IRQ
*
* \param[in] device The pointer to timer device instance
*/
void _timer_set_irq(struct _timer_device *const device);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif /* _HPL_TIMER_H_INCLUDED */

View File

@ -1,159 +0,0 @@
/**
* \file
*
* \brief PWM functionality implementation.
*
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_pwm.h"
#include <utils_assert.h>
#include <utils.h>
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
static void pwm_period_expired(struct _pwm_device *device);
static void pwm_detect_fault(struct _pwm_device *device);
/**
* \brief Initialize pwm
*/
int32_t pwm_init(struct pwm_descriptor *const descr, void *const hw, struct _pwm_hpl_interface *const func)
{
ASSERT(descr && hw);
_pwm_init(&descr->device, hw);
descr->device.callback.pwm_period_cb = pwm_period_expired;
descr->device.callback.pwm_error_cb = pwm_detect_fault;
return ERR_NONE;
}
/**
* \brief Deinitialize pwm
*/
int32_t pwm_deinit(struct pwm_descriptor *const descr)
{
ASSERT(descr);
_pwm_deinit(&descr->device);
return ERR_NONE;
}
/**
* \brief Start pwm
*/
int32_t pwm_enable(struct pwm_descriptor *const descr)
{
ASSERT(descr);
if (_pwm_is_enabled(&descr->device)) {
return ERR_DENIED;
}
_pwm_enable(&descr->device);
return ERR_NONE;
}
/**
* \brief Stop pwm
*/
int32_t pwm_disable(struct pwm_descriptor *const descr)
{
ASSERT(descr);
if (!_pwm_is_enabled(&descr->device)) {
return ERR_DENIED;
}
_pwm_disable(&descr->device);
return ERR_NONE;
}
/**
* \brief Register PWM callback
*/
int32_t pwm_register_callback(struct pwm_descriptor *const descr, enum pwm_callback_type type, pwm_cb_t cb)
{
switch (type) {
case PWM_PERIOD_CB:
descr->pwm_cb.period = cb;
break;
case PWM_ERROR_CB:
descr->pwm_cb.error = cb;
break;
default:
return ERR_INVALID_ARG;
}
ASSERT(descr);
_pwm_set_irq_state(&descr->device, (enum _pwm_callback_type)type, NULL != cb);
return ERR_NONE;
}
/**
* \brief Change PWM parameter
*/
int32_t pwm_set_parameters(struct pwm_descriptor *const descr, const pwm_period_t period, const pwm_period_t duty_cycle)
{
ASSERT(descr);
_pwm_set_param(&descr->device, period, duty_cycle);
return ERR_NONE;
}
/**
* \brief Retrieve the current driver version
*/
uint32_t pwm_get_version(void)
{
return DRIVER_VERSION;
}
/**
* \internal Process interrupts caused by period experied
*/
static void pwm_period_expired(struct _pwm_device *device)
{
struct pwm_descriptor *const descr = CONTAINER_OF(device, struct pwm_descriptor, device);
if (descr->pwm_cb.period) {
descr->pwm_cb.period(descr);
}
}
/**
* \internal Process interrupts caused by pwm fault
*/
static void pwm_detect_fault(struct _pwm_device *device)
{
struct pwm_descriptor *const descr = CONTAINER_OF(device, struct pwm_descriptor, device);
if (descr->pwm_cb.error) {
descr->pwm_cb.error(descr);
}
}

View File

@ -1,361 +0,0 @@
/**
* \file
*
* \brief SAM TCC
*
* Copyright (c) 2014-2019 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include <compiler.h>
#include <hpl_pwm.h>
#include <hpl_tcc.h>
#include <hpl_tcc_config.h>
#include <hpl_timer.h>
#include <utils.h>
#include <utils_assert.h>
/**
* \brief TCC configuration type
*/
struct tcc_cfg {
void * hw; /*!< instance of TCC */
IRQn_Type irq;
hri_tcc_ctrla_reg_t ctrl_a;
hri_tcc_ctrlbset_reg_t ctrl_b;
hri_tcc_dbgctrl_reg_t dbg_ctrl;
hri_tcc_evctrl_reg_t event_ctrl;
hri_tcc_cc_reg_t cc0;
hri_tcc_cc_reg_t cc1;
hri_tcc_cc_reg_t cc2;
hri_tcc_cc_reg_t cc3;
hri_tcc_cc_reg_t cc4;
hri_tcc_cc_reg_t cc5;
hri_tcc_per_reg_t per;
};
/**
* \brief pwm configuration type
*/
struct tcc_pwm_cfg {
void * hw; /*!< instance of TCC */
IRQn_Type irq;
uint8_t sel_ch;
uint32_t period;
uint32_t duty_cycle;
uint32_t wave;
};
/**
* \internal Retrieve configuration
*
* \param[in] hw The pointer of TCC base address
*
* \return The configuration
*/
static struct tcc_cfg *_get_tcc_cfg(void *hw);
/**
* \brief Array of TCC configurations
*/
static struct tcc_cfg _cfgs[1] = {
{(void *)TCC1,
TCC1_0_IRQn,
CONF_TCC1_CTRLA,
CONF_TCC1_CTRLB,
CONF_TCC1_DBGCTRL,
CONF_TCC1_EVCTRL,
CONF_TCC1_CC0,
CONF_TCC1_CC1,
CONF_TCC1_CC2,
CONF_TCC1_CC3,
0,
0,
CONF_TCC1_PER},
};
/**
* \internal Retrieve configuration
*
* \param[in] hw The pointer of TCC base address
*
* \return The configuration
*/
static struct tcc_pwm_cfg *_get_tcc_pwm_cfg(void *hw);
/**
* \brief Array of PWM configurations
*/
static struct tcc_pwm_cfg _cfgs_pwm[1] = {
{(void *)TCC1,
TCC1_0_IRQn,
CONF_TCC1_SEL_CH,
CONF_TCC1_PER_REG,
CONF_TCC1_CCX_REG,
(CONF_TCC1_WAVEGEN << TCC_WAVE_WAVEGEN_Pos)},
};
/* Renamed access REG name PERB -> PERBUF */
#define hri_tcc_write_PERB_reg hri_tcc_write_PERBUF_reg
#define hri_tcc_read_PERB_reg hri_tcc_read_PERBUF_reg
/** Renamed access REG name CCB -> CCBUF */
#define hri_tcc_write_CCB_reg hri_tcc_write_CCBUF_reg
#define hri_tcc_read_CCB_reg hri_tcc_read_CCBUF_reg
static struct _pwm_device *_tcc1_dev = NULL;
/**
* \brief Init irq param with the given tcc hardware instance
*/
static void _tcc_init_irq_param(const void *const hw, void *dev)
{
if (hw == TCC1) {
_tcc1_dev = (struct _pwm_device *)dev;
}
}
/**
* \brief Initialize TCC for PWM mode
*/
int32_t _pwm_init(struct _pwm_device *const device, void *const hw)
{
struct tcc_cfg *cfg = _get_tcc_cfg(hw);
if (cfg == NULL) {
return ERR_NOT_FOUND;
}
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
if (cfg_pwm == NULL) {
return ERR_NOT_FOUND;
}
device->hw = hw;
if (!hri_tcc_is_syncing(hw, TCC_SYNCBUSY_SWRST)) {
if (hri_tcc_get_CTRLA_reg(hw, TCC_CTRLA_ENABLE)) {
hri_tcc_clear_CTRLA_ENABLE_bit(hw);
hri_tcc_wait_for_sync(hw, TCC_SYNCBUSY_ENABLE);
}
hri_tcc_write_CTRLA_reg(hw, TCC_CTRLA_SWRST);
}
hri_tcc_wait_for_sync(hw, TCC_SYNCBUSY_SWRST);
hri_tcc_write_CTRLA_reg(hw, cfg->ctrl_a);
hri_tcc_set_CTRLB_reg(hw, cfg->ctrl_b);
hri_tcc_write_DBGCTRL_reg(hw, cfg->dbg_ctrl);
hri_tcc_write_EVCTRL_reg(hw, cfg->event_ctrl);
hri_tcc_write_WAVE_reg(hw, cfg_pwm->wave);
hri_tcc_write_PER_reg(hw, cfg_pwm->period);
cfg->per = cfg_pwm->period;
switch (cfg_pwm->sel_ch) {
case 0:
cfg->cc0 = cfg_pwm->duty_cycle;
hri_tcc_write_CC_reg(hw, 0, cfg->cc0);
break;
case 1:
cfg->cc1 = cfg_pwm->duty_cycle;
hri_tcc_write_CC_reg(hw, 1, cfg->cc1);
break;
case 2:
cfg->cc2 = cfg_pwm->duty_cycle;
hri_tcc_write_CC_reg(hw, 2, cfg->cc2);
break;
case 3:
cfg->cc3 = cfg_pwm->duty_cycle;
hri_tcc_write_CC_reg(hw, 3, cfg->cc3);
break;
case 4:
cfg->cc4 = cfg_pwm->duty_cycle;
hri_tcc_write_CC_reg(hw, 4, cfg->cc4);
break;
case 5:
cfg->cc5 = cfg_pwm->duty_cycle;
hri_tcc_write_CC_reg(hw, 5, cfg->cc5);
break;
default:
return ERR_NO_RESOURCE;
break;
}
hri_tcc_clear_CTRLB_LUPD_bit(hw);
_tcc_init_irq_param(hw, (void *)device);
NVIC_DisableIRQ((IRQn_Type)cfg_pwm->irq);
NVIC_ClearPendingIRQ((IRQn_Type)cfg_pwm->irq);
NVIC_EnableIRQ((IRQn_Type)cfg_pwm->irq);
return ERR_NONE;
}
/**
* \brief De-initialize TCC for PWM mode
*/
void _pwm_deinit(struct _pwm_device *const device)
{
void *const hw = device->hw;
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
if (cfg_pwm != NULL) {
NVIC_DisableIRQ((IRQn_Type)cfg_pwm->irq);
hri_tcc_clear_CTRLA_ENABLE_bit(hw);
hri_tcc_set_CTRLA_SWRST_bit(hw);
}
}
/**
* \brief Start PWM
*/
void _pwm_enable(struct _pwm_device *const device)
{
hri_tcc_set_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Stop PWM
*/
void _pwm_disable(struct _pwm_device *const device)
{
hri_tcc_clear_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Set PWM parameter
*/
void _pwm_set_param(struct _pwm_device *const device, const pwm_period_t period, const pwm_period_t duty_cycle)
{
void *const hw = device->hw;
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
if (cfg_pwm != NULL) {
hri_tcc_write_PERB_reg(hw, period);
hri_tcc_write_CCB_reg(hw, cfg_pwm->sel_ch, duty_cycle);
;
}
}
/**
* \brief Get pwm waveform period value
*/
pwm_period_t _pwm_get_period(const struct _pwm_device *const device)
{
return (pwm_period_t)(hri_tcc_read_PERB_reg(device->hw));
}
/**
* \brief Get pwm waveform duty cycle
*/
uint32_t _pwm_get_duty(const struct _pwm_device *const device)
{
void *const hw = device->hw;
struct tcc_pwm_cfg *cfg_pwm = _get_tcc_pwm_cfg(hw);
if (cfg_pwm == NULL) {
return ERR_NOT_FOUND;
}
uint32_t per = hri_tcc_read_PERB_reg(hw);
uint32_t duty_cycle = hri_tcc_read_CCB_reg(hw, cfg_pwm->sel_ch);
return ((duty_cycle * 1000) / per);
}
/**
* \brief Check if PWM is running
*/
bool _pwm_is_enabled(const struct _pwm_device *const device)
{
return hri_tcc_get_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Enable/disable PWM interrupt
*/
void _pwm_set_irq_state(struct _pwm_device *const device, const enum _pwm_callback_type type, const bool disable)
{
ASSERT(device);
if (PWM_DEVICE_PERIOD_CB == type) {
hri_tcc_write_INTEN_OVF_bit(device->hw, disable);
} else if (PWM_DEVICE_ERROR_CB == type) {
hri_tcc_write_INTEN_ERR_bit(device->hw, disable);
}
}
/**
* \brief Retrieve timer helper functions
*/
struct _timer_hpl_interface *_tcc_get_timer(void)
{
return NULL;
}
/**
* \brief Retrieve pwm helper functions
*/
struct _pwm_hpl_interface *_tcc_get_pwm(void)
{
return NULL;
}
/**
* \internal TC interrupt handler for PWM
*
* \param[in] instance TC instance number
*/
static void tcc_pwm_interrupt_handler(struct _pwm_device *device)
{
void *const hw = device->hw;
if (hri_tcc_get_interrupt_OVF_bit(hw)) {
hri_tcc_clear_interrupt_OVF_bit(hw);
if (NULL != device->callback.pwm_period_cb) {
device->callback.pwm_period_cb(device);
}
}
if (hri_tcc_get_INTEN_ERR_bit(hw)) {
hri_tcc_clear_interrupt_ERR_bit(hw);
if (NULL != device->callback.pwm_error_cb) {
device->callback.pwm_error_cb(device);
}
}
}
/**
* \brief TCC interrupt handler
*/
void TCC1_0_Handler(void)
{
tcc_pwm_interrupt_handler(_tcc1_dev);
}
static struct tcc_cfg *_get_tcc_cfg(void *hw)
{
uint8_t i;
for (i = 0; i < ARRAY_SIZE(_cfgs); i++) {
if (_cfgs[i].hw == hw) {
return &(_cfgs[i]);
}
}
return NULL;
}
static struct tcc_pwm_cfg *_get_tcc_pwm_cfg(void *hw)
{
uint8_t i;
for (i = 0; i < ARRAY_SIZE(_cfgs_pwm); i++) {
if (_cfgs_pwm[i].hw == hw) {
return &(_cfgs_pwm[i]);
}
}
return NULL;
}

View File

@ -1,77 +0,0 @@
/**
* \file
*
* \brief SAM Timer/Counter for Control Applications
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*/
#ifndef _HPL_TCC_V101_BASE_H_INCLUDED
#define _HPL_TCC_V101_BASE_H_INCLUDED
#include <hpl_timer.h>
#include <hpl_pwm.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \addtogroup tcc_group TCC Low Level Driver Helpers
*
* \section tcc_helpers_rev Revision History
* - v0.0.0.1 Initial Commit
*
*@{
*/
/**
* \name HPL functions
*/
//@{
/**
* \brief Retrieve timer helper functions
*
* \return A pointer to set of timer helper functions
*/
struct _timer_hpl_interface *_tcc_get_timer(void);
/**
* \brief Retrieve pwm helper functions
*
* \return A pointer to set of pwm helper functions
*/
struct _pwm_hpl_interface *_tcc_get_pwm(void);
//@}
/**@}*/
#ifdef __cplusplus
}
#endif
#endif /* _HPL_TCC_V101_BASE_H_INCLUDED */

View File

@ -6356,7 +6356,7 @@ static inline void hri_tcc_write_PATT_reg(const void *const hw, hri_tcc_patt_reg
{
TCC_CRITICAL_SECTION_ENTER();
((Tcc *)hw)->PATT.reg = data;
hri_tcc_wait_for_sync(hw, TCC_SYNCBUSY_MASK);
hri_tcc_wait_for_sync(hw, TCC_SYNCBUSY_MASK);
TCC_CRITICAL_SECTION_LEAVE();
}

View File

@ -64,8 +64,8 @@ inline void CONTROLLER_StateMachine(void)
/* Blank */
case 6: /* PWM FREQ / 6.25 - 4kHz */
calculate_motor_speed();
//BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, Motor1.motor_setpoints.desired_speed);
BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, 2000);
BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, Motor1.motor_setpoints.desired_speed);
//BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, 2000);
default: /* PWM FREQ - 25kHz */
select_active_phase(&Motor1, Motor1.motor_status.currentHallPattern); /* Still measure current */
break;
@ -179,8 +179,6 @@ int main(void)
/* Initializes MCU, drivers and middleware */
//__disable_irq();
atmel_start_init();
BldcInitStruct(&Motor1);
BldcInitStruct(&Motor2);
BldcInitStruct(&Motor3);