nick/thesis_bldc_controller
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got some comms working, still stops working when motor runs

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This commit is contained in:
Nicolas Trimborn
2021-08-19 13:45:50 +02:00
parent 412654754c
commit 5d712c8003
8 changed files with 935 additions and 25 deletions
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15
2_Motor_Master/Motor_Master/Motor_Master/EtherCAT_SlaveDef.h
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@@ -208,6 +208,21 @@ static void update_setpoints(void)
Motor2.motor_setpoints.max_torque = *M2_Max_current;
Motor2.motor_setpoints.max_velocity = *M2_Max_velocity;
//*M3_Desired_pos = 1;
//*M3_Desired_speed = 2;
//*M3_Desired_current = 3;
//*M3_Max_current = 4;
//*M3_Max_current = 5;
//*M3_Max_velocity = 6;
//
//*M4_Desired_pos = 7;
//*M4_Desired_speed = 8;
//*M4_Desired_current = 9;
//*M4_Max_current = 10;
//*M4_Max_current = 11;
//*M4_Max_velocity = 12;
//volatile uint8_t a = *M1_Control_mode;
//volatile uint8_t b = *M1_Control_set;
//volatile int16_t c = *M1_Desired_pos;

15
2_Motor_Master/Motor_Master/Motor_Master/Ethercat_SlaveDef.h
View File

@@ -208,6 +208,21 @@ static void update_setpoints(void)
Motor2.motor_setpoints.max_torque = *M2_Max_current;
Motor2.motor_setpoints.max_velocity = *M2_Max_velocity;
//*M3_Desired_pos = 1;
//*M3_Desired_speed = 2;
//*M3_Desired_current = 3;
//*M3_Max_current = 4;
//*M3_Max_current = 5;
//*M3_Max_velocity = 6;
//
//*M4_Desired_pos = 7;
//*M4_Desired_speed = 8;
//*M4_Desired_current = 9;
//*M4_Max_current = 10;
//*M4_Max_current = 11;
//*M4_Max_velocity = 12;
//volatile uint8_t a = *M1_Control_mode;
//volatile uint8_t b = *M1_Control_set;
//volatile int16_t c = *M1_Desired_pos;

2
2_Motor_Master/Motor_Master/Motor_Master/bldc.c
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@@ -39,7 +39,7 @@ void motor_StateMachine(BLDCMotor_t* const motor)
break;
case MOTOR_OPEN_LOOP_STATE:
BLDC_runOpenLoop(motor, *M1_Desired_dc);
//calculate_motor_speed(motor);
calculate_motor_speed(motor);
motor->motor_state.previousstate = motor->motor_state.currentstate;
break;
case MOTOR_V_CTRL_STATE:

20
2_Motor_Master/Motor_Master/Motor_Master/configuration.h
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@@ -151,22 +151,6 @@ extern DmacDescriptor _descriptor_section[DMAC_CH_NUM];
extern DmacDescriptor _write_back_section[DMAC_CH_NUM];
struct SPI_slaveboard {
struct spi_m_dma_descriptor *SPI_Mn;
uint8_t state;
uint32_t SS_pin;
uint32_t *tx_buffer;
uint32_t *rx_buffer;
};
struct SPI_slaveboard Slave_1 = {
.SPI_Mn = &SPI_1_MSIF,
.state = 0,
.SS_pin = SPI1_CS,
.tx_buffer = &QSPI_tx_buffer[16],
.rx_buffer = &QSPI_rx_buffer[16],
};
#define DMAC_CHANNEL_CONF_SERCOM_1_RECEIVE 0u
#define DMAC_CHANNEL_CONF_SERCOM_1_TRANSMIT 1U
@@ -184,10 +168,10 @@ void init_spi_master_dma_descriptors()
{
_dma_set_source_address(DMAC_CHANNEL_CONF_SERCOM_1_RECEIVE,
(uint32_t *)&(((SercomSpi *)(SPI_1_MSIF.dev.prvt))->DATA.reg));
_dma_set_destination_address(DMAC_CHANNEL_CONF_SERCOM_1_RECEIVE, &Slave_1.rx_buffer[0]);
_dma_set_destination_address(DMAC_CHANNEL_CONF_SERCOM_1_RECEIVE, &QSPI_tx_buffer[16]);
_dma_set_data_amount(DMAC_CHANNEL_CONF_SERCOM_1_RECEIVE, MASTER_BUFFER_SIZE);
_dma_set_source_address(DMAC_CHANNEL_CONF_SERCOM_1_TRANSMIT, &Slave_1.tx_buffer[0]);
_dma_set_source_address(DMAC_CHANNEL_CONF_SERCOM_1_TRANSMIT, &QSPI_rx_buffer[16]);
_dma_set_destination_address(DMAC_CHANNEL_CONF_SERCOM_1_TRANSMIT,
(uint32_t *)&(((SercomSpi *)(SPI_1_MSIF.dev.prvt))->DATA.reg));
_dma_set_data_amount(DMAC_CHANNEL_CONF_SERCOM_1_TRANSMIT, MASTER_BUFFER_SIZE);

2
2_Motor_Master/Motor_Master/Motor_Master/main.c
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@@ -182,8 +182,6 @@ int main(void)
update_telemetry();
update_setpoints();
PORT->Group[1].OUTCLR.reg = (1<<GPIO_PIN(SPI1_CS));
//PORT->Group[1].OUTCLR.reg = (1<<SPI1_CS);
//gpio_set_pin_level(SPI1_CS, false);
_dma_enable_transaction(DMAC_CHANNEL_CONF_SERCOM_1_RECEIVE, false);
_dma_enable_transaction(DMAC_CHANNEL_CONF_SERCOM_1_TRANSMIT, false);
//spi_m_dma_transfer(&SPI_1_MSIF, (uint8_t*)Slave_1.tx_buffer, (uint8_t*)Slave_1.rx_buffer, MASTER_BUFFER_SIZE);