commit after measurement
This commit is contained in:
Nicolas Trimborn
parent
cf4f67c45d
commit
a49ab21870
Binary file not shown.
|
|
@ -321,7 +321,7 @@ drivers:
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|||
dmac_channel_7_settings: false
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||||
dmac_channel_8_settings: false
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||||
dmac_channel_9_settings: false
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||||
dmac_dbgrun: true
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||||
dmac_dbgrun: false
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||||
dmac_dstinc_0: true
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||||
dmac_dstinc_1: false
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||||
dmac_dstinc_10: false
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||||
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@ -860,7 +860,7 @@ drivers:
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|||
api: HAL:Driver:Event_system
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||||
configuration:
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evsys_channel_0: No channel output selected
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evsys_channel_1: No channel output selected
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evsys_channel_1: Channel 0
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evsys_channel_10: No channel output selected
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evsys_channel_11: No channel output selected
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evsys_channel_12: No channel output selected
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@ -1286,7 +1286,7 @@ drivers:
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$input_id: External Crystal Oscillator 8-48MHz (XOSC1)
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RESERVED_InputFreq: 12000000
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RESERVED_InputFreq_id: External Crystal Oscillator 8-48MHz (XOSC1)
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_$freq_output_Generic clock generator 0: 100000000
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_$freq_output_Generic clock generator 0: 120000000
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_$freq_output_Generic clock generator 1: 2000000
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_$freq_output_Generic clock generator 10: 12000000
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_$freq_output_Generic clock generator 11: 12000000
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@ -1428,11 +1428,11 @@ drivers:
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functionality: System
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api: HAL:HPL:MCLK
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configuration:
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$input: 100000000
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$input: 120000000
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$input_id: Generic clock generator 0
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RESERVED_InputFreq: 100000000
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RESERVED_InputFreq: 120000000
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RESERVED_InputFreq_id: Generic clock generator 0
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_$freq_output_CPU: 100000000
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_$freq_output_CPU: 120000000
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cpu_clock_source: Generic clock generator 0
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cpu_div: '1'
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enable_cpu_clock: true
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@ -1495,7 +1495,7 @@ drivers:
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RESERVED_InputFreq_id: Generic clock generator 1
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_$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000
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_$freq_output_Digital Phase Locked Loop (DPLL0): 47985664
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_$freq_output_Digital Phase Locked Loop (DPLL1): 100000000
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_$freq_output_Digital Phase Locked Loop (DPLL1): 120000000
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_$freq_output_External Crystal Oscillator 8-48MHz (XOSC0): 12000000
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_$freq_output_External Crystal Oscillator 8-48MHz (XOSC1): 12000000
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dfll_arch_bplckc: false
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@ -1546,7 +1546,7 @@ drivers:
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fdpll1_arch_wuf: false
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fdpll1_clock_dcofilter: 0
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fdpll1_clock_div: 0
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fdpll1_ldr: 49
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fdpll1_ldr: 59
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fdpll1_ldrfrac: 0
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fdpll1_ref_clock: Generic clock generator 1
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xosc0_arch_cfden: false
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@ -1646,11 +1646,11 @@ drivers:
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portb_input_event_enable_1: false
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portb_input_event_enable_2: false
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portb_input_event_enable_3: false
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portc_event_action_0: Toggle output register of pin on event
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portc_event_action_0: Output register of pin will be set to level of event
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portc_event_action_1: Output register of pin will be set to level of event
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portc_event_action_2: Output register of pin will be set to level of event
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portc_event_action_3: Output register of pin will be set to level of event
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portc_event_pin_identifier_0: 10
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portc_event_pin_identifier_0: 0
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portc_event_pin_identifier_1: 0
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portc_event_pin_identifier_2: 0
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portc_event_pin_identifier_3: 0
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@ -1658,11 +1658,11 @@ drivers:
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portc_input_event_enable_1: false
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portc_input_event_enable_2: false
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portc_input_event_enable_3: false
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portd_event_action_0: Toggle output register of pin on event
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portd_event_action_0: Output register of pin will be set to level of event
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portd_event_action_1: Output register of pin will be set to level of event
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portd_event_action_2: Output register of pin will be set to level of event
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portd_event_action_3: Output register of pin will be set to level of event
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portd_event_pin_identifier_0: 10
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portd_event_pin_identifier_0: 11
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portd_event_pin_identifier_1: 0
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portd_event_pin_identifier_2: 0
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portd_event_pin_identifier_3: 0
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@ -1697,7 +1697,7 @@ drivers:
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spi_master_arch_dord: MSB first
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spi_master_arch_ibon: In data stream
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spi_master_arch_runstdby: false
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spi_master_baud_rate: 6000000
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spi_master_baud_rate: 12000000
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spi_master_character_size: 8 bits
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spi_master_dma_rx_channel: 0
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spi_master_dma_tx_channel: 1
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@ -1797,7 +1797,7 @@ drivers:
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functionality: Timer
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api: Lite:TC:Timer
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configuration:
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cc_cc0: 25000
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cc_cc0: 30000
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cc_cc1: 0
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cc_control: true
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count_control: false
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@ -1900,7 +1900,7 @@ drivers:
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tcc_arch_tceinv1: false
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tcc_arch_trgeo: false
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tcc_arch_wave_duty_val: 500
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tcc_arch_wave_per_val: 40
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tcc_arch_wave_per_val: 48
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tcc_arch_wavegen: Dual-slope, interrupt/event at ZERO (DSBOTTOM)
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tcc_per: 10000
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tcc_prescaler: Divide by 2
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@ -2015,7 +2015,7 @@ drivers:
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tcc_arch_tceinv1: false
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tcc_arch_trgeo: false
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tcc_arch_wave_duty_val: 500
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tcc_arch_wave_per_val: 40
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tcc_arch_wave_per_val: 48
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tcc_arch_wavegen: Dual-slope, interrupt/event at ZERO (DSBOTTOM)
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tcc_per: 10000
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tcc_prescaler: Divide by 2
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@ -2171,6 +2171,12 @@ pads:
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mode: Peripheral IO
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user_label: M2_3
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configuration: null
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DEBUG_5:
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name: PD11
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definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PD11
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mode: Digital output
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user_label: DEBUG_5
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configuration: null
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M3_2:
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name: PC14
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definition: Atmel:SAME54_Drivers:0.0.1::SAME54P20A-AU::pad::PC14
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@ -20,10 +20,10 @@
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<OverrideVtor>false</OverrideVtor>
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<CacheFlash>true</CacheFlash>
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<ProgFlashFromRam>true</ProgFlashFromRam>
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<RamSnippetAddress />
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<RamSnippetAddress>0x20000000</RamSnippetAddress>
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<UncachedRange />
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<preserveEEPROM>true</preserveEEPROM>
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<OverrideVtorValue />
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<OverrideVtorValue>exception_table</OverrideVtorValue>
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<BootSegment>2</BootSegment>
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<ResetRule>0</ResetRule>
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<eraseonlaunchrule>0</eraseonlaunchrule>
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@ -148,9 +148,9 @@
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<AcmeProjectActionInfo Action="File" Source="hri/hri_usb_e54.h" IsConfig="false" Hash="I+Mpxa40hh4o1NE68Zi5Gg" />
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<AcmeProjectActionInfo Action="File" Source="hri/hri_wdt_e54.h" IsConfig="false" Hash="CfZas1TGXPKWyHJU+xHJ7A" />
|
||||
<AcmeProjectActionInfo Action="File" Source="main.c" IsConfig="false" Hash="k0AH7j+BrmdFhBPzCCMptA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="driver_init.c" IsConfig="false" Hash="2PHBzCfeTG/AT1J8zlz6Cg" />
|
||||
<AcmeProjectActionInfo Action="File" Source="driver_init.c" IsConfig="false" Hash="3R2ZxxR5jGnVcpHjVFUYfA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="driver_init.h" IsConfig="false" Hash="kvX4HyQhlWgUubWSbqV0nw" />
|
||||
<AcmeProjectActionInfo Action="File" Source="atmel_start_pins.h" IsConfig="false" Hash="HgMCzaF/v9sYxwI7oBvlfw" />
|
||||
<AcmeProjectActionInfo Action="File" Source="atmel_start_pins.h" IsConfig="false" Hash="vrctvqOXbYylwgq7/1q8FA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="examples/driver_examples.h" IsConfig="false" Hash="TkkzzVyvo+cx7KsAp9l52Q" />
|
||||
<AcmeProjectActionInfo Action="File" Source="examples/driver_examples.c" IsConfig="false" Hash="YYAdWL1s+Q+NEcezd0cOGw" />
|
||||
<AcmeProjectActionInfo Action="File" Source="hal/include/hal_adc_sync.h" IsConfig="false" Hash="ez1X5T9kpYwT+1+5x4Pxqg" />
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@ -194,7 +194,7 @@
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<AcmeProjectActionInfo Action="File" Source="hpl/port/hpl_gpio_base.h" IsConfig="false" Hash="tEjgvZ4kvfccSWnEgilG5Q" />
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||||
<AcmeProjectActionInfo Action="File" Source="hpl/ramecc/hpl_ramecc.c" IsConfig="false" Hash="pMdmwVWBg16VG8HOwA3DPw" />
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||||
<AcmeProjectActionInfo Action="File" Source="hpl/sercom/hpl_sercom.c" IsConfig="false" Hash="hcMq5dgdlyb9xXr1YOQnMQ" />
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<AcmeProjectActionInfo Action="File" Source="hpl/tc/tc_lite.c" IsConfig="false" Hash="uY4XeQhtAqGMZvw6U6EEVA" />
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||||
<AcmeProjectActionInfo Action="File" Source="hpl/tc/tc_lite.c" IsConfig="false" Hash="qleR5cq6VMXGgdNfHwblKQ" />
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||||
<AcmeProjectActionInfo Action="File" Source="hpl/tc/tc_lite.h" IsConfig="false" Hash="MH8wpmGdaXsDgVxVA/8iWw" />
|
||||
<AcmeProjectActionInfo Action="File" Source="hpl/tcc/hpl_tcc.c" IsConfig="false" Hash="DC3UZSTUv1CDjekNxClhVg" />
|
||||
<AcmeProjectActionInfo Action="File" Source="hpl/tcc/hpl_tcc.h" IsConfig="false" Hash="rdWkAK12qkOYV59tWwzy6A" />
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@ -203,18 +203,18 @@
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<AcmeProjectActionInfo Action="File" Source="config/hpl_adc_config.h" IsConfig="true" Hash="5zoRW/YUsZApmDgQt0R2iQ" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_ccl_config.h" IsConfig="true" Hash="d2ozzqBRrRzP7EQeYn4m3w" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_cmcc_config.h" IsConfig="true" Hash="bmtxQ8rLloaRtAo2HeXZRQ" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_dmac_config.h" IsConfig="true" Hash="Fgy1mDm2BRBY3IBfwL3mfg" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_dmac_config.h" IsConfig="true" Hash="wIKlQV88l6vxX7dxwJDVSA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_eic_config.h" IsConfig="true" Hash="6xqR/FfKqve2wjz45CZHjA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_evsys_config.h" IsConfig="true" Hash="B4UBkE0dQnjXdD5OC7x3WQ" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_evsys_config.h" IsConfig="true" Hash="RA0O4EZUJ0FIUpfboYgWmg" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_gclk_config.h" IsConfig="true" Hash="XcRDNsb7d6ZuAa9h2WTYEw" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_mclk_config.h" IsConfig="true" Hash="pxBzoQXTG66x4dbzVzxteg" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_osc32kctrl_config.h" IsConfig="true" Hash="HgvzEqDUH4jq/syjj/+G+Q" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_oscctrl_config.h" IsConfig="true" Hash="Xe5v62bijwZLOPLD+rPcrA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_oscctrl_config.h" IsConfig="true" Hash="Uje5LXAS+nQpGryt9t0fYA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_pdec_config.h" IsConfig="true" Hash="TQEBQwc7hx8I+kxqBkjXSg" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_port_config.h" IsConfig="true" Hash="lz3FE+9jWhub2Z5CsHWovQ" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_sercom_config.h" IsConfig="true" Hash="WUXQgarVBcGAlxKxYn1jjA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_tcc_config.h" IsConfig="true" Hash="wNzdbwRT/WSrvrPDOGRR1Q" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/peripheral_clk_config.h" IsConfig="true" Hash="2uHUNbHBWWR974H4mXVMgQ" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_port_config.h" IsConfig="true" Hash="+QickSFIeQGw1S4gRJf7eQ" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_sercom_config.h" IsConfig="true" Hash="KyG6ML6P1JThH07zZRJsfA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/hpl_tcc_config.h" IsConfig="true" Hash="PQ9gbUhtc6tMkR4hmC+WNA" />
|
||||
<AcmeProjectActionInfo Action="File" Source="config/peripheral_clk_config.h" IsConfig="true" Hash="oL/wk7kL4CjZUUoAijGNwg" />
|
||||
</AcmeActionInfos>
|
||||
<NonsecureFilesInfo />
|
||||
</AcmeProjectConfig>
|
||||
|
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@ -278,6 +278,7 @@
|
|||
<ListValues>
|
||||
<Value>C:\Users\Nick-XMG\Documents\github\bldc_control_thesis\atmel\BLDC_Controller_SAME54\BLDC_E54\BLDC_E54\cmsis</Value>
|
||||
<Value>%24(ProjectDir)\Device_Startup</Value>
|
||||
<Value>C:\Users\Nick-XMG\Documents\github\bldc_control_thesis\bldc_firmware_thesis\BLDC_E54\BLDC_E54\cmsis</Value>
|
||||
</ListValues>
|
||||
</armgcc.linker.libraries.LibrarySearchPaths>
|
||||
<armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
|
||||
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@ -356,8 +357,8 @@
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<armgcc.compiler.symbols.DefSymbols>
|
||||
<ListValues>
|
||||
<Value>DEBUG</Value>
|
||||
<Value>ARM_MATH_CM4</Value>
|
||||
<Value>__FPU_PRESENT=1</Value>
|
||||
<Value>ARM_MATH_CM4=true</Value>
|
||||
<Value>__FPU_PRESENT=1U</Value>
|
||||
</ListValues>
|
||||
</armgcc.compiler.symbols.DefSymbols>
|
||||
<armgcc.compiler.directories.IncludePaths>
|
||||
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@ -390,28 +391,25 @@
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|||
<Value>%24(PackRepoDir)\atmel\SAME54_DFP\1.1.134\include</Value>
|
||||
</ListValues>
|
||||
</armgcc.compiler.directories.IncludePaths>
|
||||
<armgcc.compiler.optimization.level>Optimize debugging experience (-Og)</armgcc.compiler.optimization.level>
|
||||
<armgcc.compiler.optimization.level>Optimize (-O1)</armgcc.compiler.optimization.level>
|
||||
<armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>True</armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection>
|
||||
<armgcc.compiler.optimization.DebugLevel>Maximum (-g3)</armgcc.compiler.optimization.DebugLevel>
|
||||
<armgcc.compiler.warnings.AllWarnings>True</armgcc.compiler.warnings.AllWarnings>
|
||||
<armgcc.compiler.warnings.Pedantic>True</armgcc.compiler.warnings.Pedantic>
|
||||
<armgcc.compiler.miscellaneous.OtherFlags>-std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16</armgcc.compiler.miscellaneous.OtherFlags>
|
||||
<armgcc.linker.general.UseNewlibNano>True</armgcc.linker.general.UseNewlibNano>
|
||||
<armgcc.linker.libraries.Libraries>
|
||||
<ListValues>
|
||||
<Value>libm</Value>
|
||||
<Value>libarm_cortexM4lf_math.a</Value>
|
||||
</ListValues>
|
||||
</armgcc.linker.libraries.Libraries>
|
||||
<armgcc.linker.libraries.LibrarySearchPaths>
|
||||
<ListValues>
|
||||
<Value>C:\Users\Nick-XMG\Documents\github\bldc_control_thesis\atmel\BLDC_Controller_SAME54\BLDC_E54\BLDC_E54\cmsis</Value>
|
||||
<Value>%24(ProjectDir)\Device_Startup</Value>
|
||||
</ListValues>
|
||||
</armgcc.linker.libraries.LibrarySearchPaths>
|
||||
<armgcc.linker.optimization.GarbageCollectUnusedSections>True</armgcc.linker.optimization.GarbageCollectUnusedSections>
|
||||
<armgcc.linker.memorysettings.ExternalRAM />
|
||||
<armgcc.linker.miscellaneous.LinkerFlags>-Tsame54p20a_flash.ld -mfloat-abi=hard -mfpu=fpv4-sp-d16 -larm_cortexM4lf_math</armgcc.linker.miscellaneous.LinkerFlags>
|
||||
<armgcc.linker.miscellaneous.LinkerFlags>-Tsame54p20a_flash.ld -mfloat-abi=hard -mfpu=fpv4-sp-d16</armgcc.linker.miscellaneous.LinkerFlags>
|
||||
<armgcc.assembler.general.IncludePaths>
|
||||
<ListValues>
|
||||
<Value>%24(PackRepoDir)\arm\CMSIS\5.4.0\CMSIS\Core\Include\</Value>
|
||||
|
|
@ -478,9 +476,6 @@
|
|||
</ToolchainSettings>
|
||||
</PropertyGroup>
|
||||
<ItemGroup>
|
||||
<Compile Include="arm_math.h">
|
||||
<SubType>compile</SubType>
|
||||
</Compile>
|
||||
<Compile Include="atmel_start.c">
|
||||
<SubType>compile</SubType>
|
||||
</Compile>
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@
|
|||
// <i> Indicates whether Debug Run is enabled or not
|
||||
// <id> dmac_dbgrun
|
||||
#ifndef CONF_DMAC_DBGRUN
|
||||
#define CONF_DMAC_DBGRUN 1
|
||||
#define CONF_DMAC_DBGRUN 0
|
||||
#endif
|
||||
|
||||
// <e> Channel 0 settings
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||||
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|
|
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@ -5880,7 +5880,7 @@
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// <id> evsys_channel_1
|
||||
// <i> Indicates which channel is chosen for user
|
||||
#ifndef CONF_CHANNEL_1
|
||||
#define CONF_CHANNEL_1 0
|
||||
#define CONF_CHANNEL_1 1
|
||||
#endif
|
||||
|
||||
// <o> Channel selection for PORT event 1
|
||||
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|
|
|||
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@ -568,7 +568,7 @@
|
|||
// <i> Value of LDR is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
|
||||
// <id> fdpll1_ldr
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||||
#ifndef CONF_FDPLL1_LDR
|
||||
#define CONF_FDPLL1_LDR 0x31
|
||||
#define CONF_FDPLL1_LDR 0x3b
|
||||
#endif
|
||||
|
||||
// <o> Clock Divider <0x0-0x7FF>
|
||||
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|
|
|||
|
|
@ -79,7 +79,7 @@
|
|||
// <i> These bits define the I/O pin from port C on which the event action will be performed
|
||||
// <id> portc_event_pin_identifier_0
|
||||
#ifndef CONF_PORTC_EVCTRL_PID_0
|
||||
#define CONF_PORTC_EVCTRL_PID_0 0xa
|
||||
#define CONF_PORTC_EVCTRL_PID_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 0 Action
|
||||
|
|
@ -90,7 +90,7 @@
|
|||
// <i> These bits define the event action the PORT C will perform on event input 0
|
||||
// <id> portc_event_action_0
|
||||
#ifndef CONF_PORTC_EVCTRL_EVACT_0
|
||||
#define CONF_PORTC_EVCTRL_EVACT_0 3
|
||||
#define CONF_PORTC_EVCTRL_EVACT_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
|
@ -107,7 +107,7 @@
|
|||
// <i> These bits define the I/O pin from port D on which the event action will be performed
|
||||
// <id> portd_event_pin_identifier_0
|
||||
#ifndef CONF_PORTD_EVCTRL_PID_0
|
||||
#define CONF_PORTD_EVCTRL_PID_0 0xa
|
||||
#define CONF_PORTD_EVCTRL_PID_0 0xb
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 0 Action
|
||||
|
|
@ -118,7 +118,7 @@
|
|||
// <i> These bits define the event action the PORT D will perform on event input 0
|
||||
// <id> portd_event_action_0
|
||||
#ifndef CONF_PORTD_EVCTRL_EVACT_0
|
||||
#define CONF_PORTD_EVCTRL_EVACT_0 3
|
||||
#define CONF_PORTD_EVCTRL_EVACT_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
|
|
|||
|
|
@ -59,7 +59,7 @@
|
|||
// <i> The SPI data transfer rate
|
||||
// <id> spi_master_baud_rate
|
||||
#ifndef CONF_SERCOM_5_SPI_BAUD
|
||||
#define CONF_SERCOM_5_SPI_BAUD 6000000
|
||||
#define CONF_SERCOM_5_SPI_BAUD 12000000
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
// <i> The unit of this value is us.
|
||||
// <id> tcc_arch_wave_per_val
|
||||
#ifndef CONF_TCC0_WAVE_PER_VAL
|
||||
#define CONF_TCC0_WAVE_PER_VAL 0x28
|
||||
#define CONF_TCC0_WAVE_PER_VAL 0x30
|
||||
#endif
|
||||
|
||||
// <o> TCC0 Waveform Duty Value (0.1%) <0x00-0x03E8>
|
||||
|
|
@ -621,7 +621,7 @@
|
|||
// <i> The unit of this value is us.
|
||||
// <id> tcc_arch_wave_per_val
|
||||
#ifndef CONF_TCC1_WAVE_PER_VAL
|
||||
#define CONF_TCC1_WAVE_PER_VAL 0x28
|
||||
#define CONF_TCC1_WAVE_PER_VAL 0x30
|
||||
#endif
|
||||
|
||||
// <o> TCC1 Waveform Duty Value (0.1%) <0x00-0x03E8>
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@
|
|||
* \brief ADC0's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_ADC0_FREQUENCY
|
||||
#define CONF_GCLK_ADC0_FREQUENCY 100000000
|
||||
#define CONF_GCLK_ADC0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> CCL Clock Source
|
||||
|
|
@ -81,7 +81,7 @@
|
|||
* \brief CCL's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_CCL_FREQUENCY
|
||||
#define CONF_GCLK_CCL_FREQUENCY 100000000
|
||||
#define CONF_GCLK_CCL_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EIC Clock Source
|
||||
|
|
@ -121,7 +121,7 @@
|
|||
* \brief EIC's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_EIC_FREQUENCY
|
||||
#define CONF_GCLK_EIC_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EIC_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 0 Clock Source
|
||||
|
|
@ -162,7 +162,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 1 Clock Source
|
||||
|
|
@ -203,7 +203,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 2 Clock Source
|
||||
|
|
@ -244,7 +244,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 3 Clock Source
|
||||
|
|
@ -285,7 +285,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 4 Clock Source
|
||||
|
|
@ -326,7 +326,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 5 Clock Source
|
||||
|
|
@ -367,7 +367,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 6 Clock Source
|
||||
|
|
@ -408,7 +408,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 7 Clock Source
|
||||
|
|
@ -449,7 +449,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 8 Clock Source
|
||||
|
|
@ -490,7 +490,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 9 Clock Source
|
||||
|
|
@ -531,7 +531,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 10 Clock Source
|
||||
|
|
@ -572,7 +572,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 11 Clock Source
|
||||
|
|
@ -613,7 +613,7 @@
|
|||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 100000000
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -621,7 +621,7 @@
|
|||
* \brief CPU's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_CPU_FREQUENCY
|
||||
#define CONF_CPU_FREQUENCY 100000000
|
||||
#define CONF_CPU_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> PDEC Clock Source
|
||||
|
|
@ -661,7 +661,7 @@
|
|||
* \brief PDEC's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_PDEC_FREQUENCY
|
||||
#define CONF_GCLK_PDEC_FREQUENCY 100000000
|
||||
#define CONF_GCLK_PDEC_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> Core Clock Source
|
||||
|
|
@ -733,7 +733,7 @@
|
|||
* \brief SERCOM5's Core Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_SERCOM5_CORE_FREQUENCY
|
||||
#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 100000000
|
||||
#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -781,7 +781,7 @@
|
|||
* \brief TC0's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TC0_FREQUENCY
|
||||
#define CONF_GCLK_TC0_FREQUENCY 100000000
|
||||
#define CONF_GCLK_TC0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> TC Clock Source
|
||||
|
|
@ -821,7 +821,7 @@
|
|||
* \brief TC7's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TC7_FREQUENCY
|
||||
#define CONF_GCLK_TC7_FREQUENCY 100000000
|
||||
#define CONF_GCLK_TC7_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> TCC Clock Source
|
||||
|
|
@ -861,7 +861,7 @@
|
|||
* \brief TCC0's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TCC0_FREQUENCY
|
||||
#define CONF_GCLK_TCC0_FREQUENCY 100000000
|
||||
#define CONF_GCLK_TCC0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> TCC Clock Source
|
||||
|
|
@ -901,7 +901,7 @@
|
|||
* \brief TCC1's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TCC1_FREQUENCY
|
||||
#define CONF_GCLK_TCC1_FREQUENCY 100000000
|
||||
#define CONF_GCLK_TCC1_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
|
|
|||
|
|
@ -308,8 +308,7 @@ ADDITIONAL_DEPENDENCIES:=
|
|||
|
||||
OUTPUT_FILE_DEP:= ./makedep.mk
|
||||
|
||||
LIB_DEP+= \
|
||||
C:/Users/Nick-XMG/Documents/github/bldc_control_thesis/atmel/BLDC_Controller_SAME54/BLDC_E54/BLDC_E54/cmsis/libarm_cortexM4lf_math.a
|
||||
LIB_DEP+=
|
||||
|
||||
LINKER_SCRIPT_DEP+= \
|
||||
../Device_Startup/same54p20a_flash.ld \
|
||||
|
|
@ -320,301 +319,301 @@ LINKER_SCRIPT_DEP+= \
|
|||
./atmel_start.o: .././atmel_start.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
./bldc.o: .././bldc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
Device_Startup/startup_same54.o: ../Device_Startup/startup_same54.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
Device_Startup/system_same54.o: ../Device_Startup/system_same54.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
./driver_init.o: .././driver_init.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
ethercat/ethercat_e54.o: ../ethercat/ethercat_e54.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
examples/driver_examples.o: ../examples/driver_examples.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_adc_sync.o: ../hal/src/hal_adc_sync.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_atomic.o: ../hal/src/hal_atomic.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_cache.o: ../hal/src/hal_cache.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_delay.o: ../hal/src/hal_delay.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_evsys.o: ../hal/src/hal_evsys.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_ext_irq.o: ../hal/src/hal_ext_irq.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_gpio.o: ../hal/src/hal_gpio.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_init.o: ../hal/src/hal_init.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_io.o: ../hal/src/hal_io.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_pdec_async.o: ../hal/src/hal_pdec_async.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_pwm.o: ../hal/src/hal_pwm.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_sleep.o: ../hal/src/hal_sleep.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/src/hal_spi_m_dma.o: ../hal/src/hal_spi_m_dma.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/utils/src/utils_assert.o: ../hal/utils/src/utils_assert.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/utils/src/utils_event.o: ../hal/utils/src/utils_event.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/utils/src/utils_list.o: ../hal/utils/src/utils_list.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hal/utils/src/utils_syscalls.o: ../hal/utils/src/utils_syscalls.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/adc/hpl_adc.o: ../hpl/adc/hpl_adc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/ccl/hpl_ccl.o: ../hpl/ccl/hpl_ccl.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/cmcc/hpl_cmcc.o: ../hpl/cmcc/hpl_cmcc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/core/hpl_core_m4.o: ../hpl/core/hpl_core_m4.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/core/hpl_init.o: ../hpl/core/hpl_init.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/dmac/hpl_dmac.o: ../hpl/dmac/hpl_dmac.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/eic/hpl_eic.o: ../hpl/eic/hpl_eic.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/evsys/hpl_evsys.o: ../hpl/evsys/hpl_evsys.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/gclk/hpl_gclk.o: ../hpl/gclk/hpl_gclk.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/mclk/hpl_mclk.o: ../hpl/mclk/hpl_mclk.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/osc32kctrl/hpl_osc32kctrl.o: ../hpl/osc32kctrl/hpl_osc32kctrl.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/oscctrl/hpl_oscctrl.o: ../hpl/oscctrl/hpl_oscctrl.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/pdec/hpl_pdec.o: ../hpl/pdec/hpl_pdec.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/pm/hpl_pm.o: ../hpl/pm/hpl_pm.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/ramecc/hpl_ramecc.o: ../hpl/ramecc/hpl_ramecc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/sercom/hpl_sercom.o: ../hpl/sercom/hpl_sercom.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/tcc/hpl_tcc.o: ../hpl/tcc/hpl_tcc.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
hpl/tc/tc_lite.o: ../hpl/tc/tc_lite.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
./main.o: .././main.c
|
||||
@echo Building file: $<
|
||||
@echo Invoking: ARM/GNU C Compiler : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4 -D__FPU_PRESENT=1 -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -Og -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -x c -mthumb -D__SAME54P20A__ -DDEBUG -DARM_MATH_CM4=true -D__FPU_PRESENT=1U -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include" -I"../Config" -I".." -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/adc" -I"../hpl/ccl" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/eic" -I"../hpl/evsys" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pdec" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/tc" -I"../hpl/tcc" -I"../hri" -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include" -O1 -ffunction-sections -mlong-calls -g3 -Wall -pedantic -mcpu=cortex-m4 -c -std=gnu99 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
|
||||
@echo Finished building: $<
|
||||
|
||||
|
||||
|
|
@ -644,7 +643,7 @@ all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES)
|
|||
$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP)
|
||||
@echo Building target: $@
|
||||
@echo Invoking: ARM/GNU Linker : 6.3.1
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -mthumb -Wl,-Map="BLDC_E54.map" --specs=nano.specs -Wl,--start-group -lm -larm_cortexM4lf_math -Wl,--end-group -L"C:\Users\Nick-XMG\DOCUME~1\github\BLDC_C~1\atmel\BLDC_C~3\BLDC_E54\BLDC_E54\cmsis" -L"..\\Device_Startup" -Wl,--gc-sections -mcpu=cortex-m4 -Tsame54p20a_flash.ld -mfloat-abi=hard -mfpu=fpv4-sp-d16 -larm_cortexM4lf_math
|
||||
$(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -mthumb -Wl,-Map="BLDC_E54.map" -Wl,--start-group -lm -Wl,--end-group -L"..\\Device_Startup" -Wl,--gc-sections -mcpu=cortex-m4 -Tsame54p20a_flash.ld -mfloat-abi=hard -mfpu=fpv4-sp-d16
|
||||
@echo Finished building target: $@
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objcopy.exe" -O binary "BLDC_E54.elf" "BLDC_E54.bin"
|
||||
"C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\arm\arm-gnu-toolchain\bin\arm-none-eabi-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature "BLDC_E54.elf" "BLDC_E54.hex"
|
||||
|
|
|
|||
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|
|
@ -150,7 +150,8 @@ main.d main.o: .././main.c ../atmel_start.h ../driver_init.h \
|
|||
../hal/include/hpl_spi.h ../hal/include/hpl_spi_dma.h \
|
||||
../hal/include/hpl_dma.h ../hpl/tc/tc_lite.h ../hal/include/hal_pwm.h \
|
||||
../hal/include/hpl_pwm.h ../hal/include/hpl_irq.h ../hpl/tcc/hpl_tcc.h \
|
||||
../hal/include/hpl_timer.h ../arm_math.h \
|
||||
../hal/include/hpl_timer.h .././interrupt_handlers.h .././atmel_start.h \
|
||||
.././pins.h .././bldc.h .././arm_math.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\string.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\_ansi.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\newlib.h \
|
||||
|
|
@ -165,9 +166,8 @@ main.d main.o: .././main.c ../atmel_start.h ../driver_init.h \
|
|||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\xlocale.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\sys\string.h \
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\math.h \
|
||||
.././interrupt_handlers.h .././atmel_start.h .././pins.h .././bldc.h \
|
||||
.././arm_math.h .././control.h .././utilities.h .././motor_params.h \
|
||||
.././statemachine.h .././ethercat/ethercat_e54.h .././configuration.h \
|
||||
.././control.h .././utilities.h .././motor_params.h .././statemachine.h \
|
||||
.././ethercat/ethercat_e54.h .././configuration.h \
|
||||
.././ethercat/ethercat_slave_def.h .././ethercat/ethercat_e54.h
|
||||
|
||||
../atmel_start.h:
|
||||
|
|
@ -568,7 +568,15 @@ C:\Program\ Files\ (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include
|
|||
|
||||
../hal/include/hpl_timer.h:
|
||||
|
||||
../arm_math.h:
|
||||
.././interrupt_handlers.h:
|
||||
|
||||
.././atmel_start.h:
|
||||
|
||||
.././pins.h:
|
||||
|
||||
.././bldc.h:
|
||||
|
||||
.././arm_math.h:
|
||||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\string.h:
|
||||
|
||||
|
|
@ -598,16 +606,6 @@ c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-no
|
|||
|
||||
c:\program\ files\ (x86)\atmel\studio\7.0\toolchain\arm\arm-gnu-toolchain\arm-none-eabi\include\math.h:
|
||||
|
||||
.././interrupt_handlers.h:
|
||||
|
||||
.././atmel_start.h:
|
||||
|
||||
.././pins.h:
|
||||
|
||||
.././bldc.h:
|
||||
|
||||
.././arm_math.h:
|
||||
|
||||
.././control.h:
|
||||
|
||||
.././utilities.h:
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -415,7 +415,7 @@ extern "C"
|
|||
/**
|
||||
* @brief 16-bit fractional data type in 1.15 format.
|
||||
*/
|
||||
typedef int16_t q15_t;
|
||||
typedef int16_t q15_t;
|
||||
|
||||
/**
|
||||
* @brief 32-bit fractional data type in 1.31 format.
|
||||
|
|
|
|||
|
|
@ -62,5 +62,6 @@
|
|||
#define M2_1 GPIO(GPIO_PORTD, 8)
|
||||
#define M2_2 GPIO(GPIO_PORTD, 9)
|
||||
#define M2_3 GPIO(GPIO_PORTD, 10)
|
||||
#define DEBUG_5 GPIO(GPIO_PORTD, 11)
|
||||
|
||||
#endif // ATMEL_START_PINS_H_INCLUDED
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
// Direction":
|
||||
// CW -> Always positive current
|
||||
// CCW -> Always negative current
|
||||
void select_active_phase(volatile BLDCMotor_t *Motor, volatile uint8_t hall_state)
|
||||
void select_active_phase(BLDCMotor_t *Motor, const uint8_t hall_state)
|
||||
{
|
||||
volatile float32_t phase_current = 0;
|
||||
switch(hall_state)
|
||||
|
|
@ -137,15 +137,15 @@ void BldcInitStruct(BLDCMotor_t *motor)
|
|||
|
||||
void BldcInitFunctions()
|
||||
{
|
||||
Motor1.ReadHall = readM1Hall;
|
||||
Motor2.ReadHall = readM2Hall;
|
||||
Motor3.ReadHall = readM3Hall;
|
||||
Motor1.DisableMotor = DisableM1GateDrivers;
|
||||
Motor2.DisableMotor = DisableM2GateDrivers;
|
||||
Motor3.DisableMotor = DisableM3GateDrivers;
|
||||
Motor1.SetDutyCycle = SetM1DutyCycle;
|
||||
Motor2.SetDutyCycle = SetM2DutyCycle;
|
||||
Motor3.SetDutyCycle = SetM3DutyCycle;
|
||||
//Motor1.ReadHall = readM1Hall;
|
||||
//Motor2.ReadHall = readM2Hall;
|
||||
//Motor3.ReadHall = readM3Hall;
|
||||
//Motor1.DisableMotor = DisableM1GateDrivers;
|
||||
//Motor2.DisableMotor = DisableM2GateDrivers;
|
||||
//Motor3.DisableMotor = DisableM3GateDrivers;
|
||||
//Motor1.SetDutyCycle = SetM1DutyCycle;
|
||||
//Motor2.SetDutyCycle = SetM2DutyCycle;
|
||||
//Motor3.SetDutyCycle = SetM3DutyCycle;
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
|
|
@ -232,37 +232,71 @@ void read_zero_current_offset_value(BLDCMotor_t *motor)
|
|||
// Hall Reading Functions
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
uint8_t readM1Hall(void)
|
||||
inline uint8_t readM1Hall(void)
|
||||
{
|
||||
volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
volatile uint8_t motor_read = 0;
|
||||
motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
|
||||
return ((a << 2) |
|
||||
(b << 1) |
|
||||
(c << 0));
|
||||
return motor_read;
|
||||
|
||||
//return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
//(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
//(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
//
|
||||
//volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
//volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
//volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
//
|
||||
//return ((a << 2) |
|
||||
//(b << 1) |
|
||||
//(c << 0));
|
||||
}
|
||||
|
||||
uint8_t readM2Hall(void)
|
||||
inline uint8_t readM2Hall(void)
|
||||
{
|
||||
volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
volatile uint8_t motor_read = 0;
|
||||
motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
|
||||
return ((a << 2) |
|
||||
(b << 1) |
|
||||
(c << 0));
|
||||
return motor_read;
|
||||
//
|
||||
//return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
//(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
//(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
|
||||
|
||||
//volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
//volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
//volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
//
|
||||
//return ((a << 2) |
|
||||
//(b << 1) |
|
||||
//(c << 0));
|
||||
}
|
||||
|
||||
uint8_t readM3Hall(void)
|
||||
inline uint8_t readM3Hall(void)
|
||||
{
|
||||
volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
volatile uint8_t motor_read = 0;
|
||||
motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
|
||||
return ((a << 2) |
|
||||
(b << 1) |
|
||||
(c << 0));
|
||||
return motor_read;
|
||||
//
|
||||
//return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
//(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
//(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
|
||||
//volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
//volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
//volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
//
|
||||
//return ((a << 2) |
|
||||
//(b << 1) |
|
||||
//(c << 0));
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -285,12 +319,12 @@ void DisableM3GateDrivers(BLDCMotor_t *motor)
|
|||
|
||||
}
|
||||
|
||||
void SetM1DutyCycle(uint16_t duty)
|
||||
inline void SetM1DutyCycle(const uint16_t duty)
|
||||
{
|
||||
TCC1->CCBUF[1].reg = duty;
|
||||
}
|
||||
|
||||
void SetM2DutyCycle(uint16_t duty)
|
||||
inline void SetM2DutyCycle(const uint16_t duty)
|
||||
{
|
||||
TCC0->CCBUF[0].reg = duty;
|
||||
TCC0->CCBUF[1].reg = duty;
|
||||
|
|
@ -298,7 +332,7 @@ void SetM2DutyCycle(uint16_t duty)
|
|||
TCC0->CCBUF[3].reg = duty;
|
||||
}
|
||||
|
||||
void SetM3DutyCycle(uint16_t duty)
|
||||
inline void SetM3DutyCycle(const uint16_t duty)
|
||||
{
|
||||
TCC0->CCBUF[4].reg = duty;
|
||||
TCC0->CCBUF[5].reg = duty;
|
||||
|
|
@ -322,56 +356,61 @@ void exec_commutation(void)
|
|||
// ----------------------------------------------------------------------
|
||||
// Read Motor Hall Sensors
|
||||
// ----------------------------------------------------------------------
|
||||
Motor1.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
Motor2.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
Motor3.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
Motor1.motor_status.currentHallPattern = readM1Hall();
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//Motor1.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
//Motor2.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
//Motor3.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
// ----------------------------------------------------------------------
|
||||
// Multi Motor Register Masking
|
||||
// ----------------------------------------------------------------------
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
volatile uint16_t temp_M1 = COMMUTATION_PATTERN_M1[Motor1.motor_status.currentHallPattern + Motor1.motor_setpoints.directionOffset];
|
||||
volatile uint16_t temp_M2 = COMMUTATION_PATTERN_M2[Motor2.motor_status.currentHallPattern + Motor2.motor_setpoints.directionOffset];
|
||||
volatile uint16_t temp_M3_tcc1_des = COMMUTATION_PATTERN_M1[Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset] & m3_TCC1_mask;
|
||||
volatile uint16_t temp_M3_tcc0_des = COMMUTATION_PATTERN_M2[Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset] & m3_TCC0_mask;
|
||||
|
||||
//volatile uint16_t temp_M2 = COMMUTATION_PATTERN_M2[Motor2.motor_status.currentHallPattern + Motor2.motor_setpoints.directionOffset];
|
||||
//volatile uint16_t temp_M3_tcc1_des = COMMUTATION_PATTERN_M1[Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset] & m3_TCC1_mask;
|
||||
//volatile uint16_t temp_M3_tcc0_des = COMMUTATION_PATTERN_M2[Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset] & m3_TCC0_mask;
|
||||
/* Zero target bits */
|
||||
temp_M1 &= m3_TCC1_inv_mask;
|
||||
temp_M2 &= m3_TCC0_inv_mask;
|
||||
//temp_M1 &= m3_TCC1_inv_mask;
|
||||
//temp_M2 &= m3_TCC0_inv_mask;
|
||||
/* Set Desired bits */
|
||||
temp_M1 |= temp_M3_tcc1_des;
|
||||
temp_M2 |= temp_M3_tcc0_des;
|
||||
//temp_M1 |= temp_M3_tcc1_des;
|
||||
//temp_M2 |= temp_M3_tcc0_des;
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Set Pattern Buffers
|
||||
// ----------------------------------------------------------------------
|
||||
TCC0->PATTBUF.reg = (uint16_t)temp_M2;
|
||||
//TCC0->PATTBUF.reg = (uint16_t)temp_M2;
|
||||
TCC1->PATTBUF.reg = (uint16_t)temp_M1;
|
||||
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
// ----------------------------------------------------------------------
|
||||
// Set Remaining GPIO lines responsible for M3 Commutation
|
||||
// ----------------------------------------------------------------------
|
||||
///* GPIO En Pin Setting for M3 */
|
||||
switch(Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset)
|
||||
{
|
||||
// REG_PORT_OUTSET0 = Port A
|
||||
// REG_PORT_OUTSET1 = Port B
|
||||
case 1: case 6: case 9: case 14:
|
||||
REG_PORT_OUTCLR0 = (1 << GPIO_PIN(M3_3));
|
||||
REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4))|(1 << GPIO_PIN(M3_5));
|
||||
break;
|
||||
case 2: case 5: case 10: case 13:
|
||||
REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
|
||||
REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4));
|
||||
REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_5));
|
||||
break;
|
||||
case 3: case 4: case 11: case 12:
|
||||
REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
|
||||
REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_4));
|
||||
REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_5));
|
||||
break;
|
||||
default:
|
||||
/*hall error - should not get here */
|
||||
break;
|
||||
}
|
||||
//switch(Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset)
|
||||
//{
|
||||
//// REG_PORT_OUTSET0 = Port A
|
||||
//// REG_PORT_OUTSET1 = Port B
|
||||
//case 1: case 6: case 9: case 14:
|
||||
//REG_PORT_OUTCLR0 = (1 << GPIO_PIN(M3_3));
|
||||
//REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4))|(1 << GPIO_PIN(M3_5));
|
||||
//break;
|
||||
//case 2: case 5: case 10: case 13:
|
||||
//REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
|
||||
//REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4));
|
||||
//REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_5));
|
||||
//break;
|
||||
//case 3: case 4: case 11: case 12:
|
||||
//REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
|
||||
//REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_4));
|
||||
//REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_5));
|
||||
//break;
|
||||
//default:
|
||||
///*hall error - should not get here */
|
||||
//break;
|
||||
//}
|
||||
|
||||
|
||||
// TCC1->PATTBUF.reg = COMMUTATION_PATTERN_M1[(Motor1.motor_status.currentHallPattern +
|
||||
|
|
@ -379,24 +418,25 @@ void exec_commutation(void)
|
|||
// ----------------------------------------------------------------------
|
||||
// Set Calculated Duty Cycles
|
||||
// ----------------------------------------------------------------------
|
||||
Motor1.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
Motor2.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
Motor3.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//Motor1.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
SetM1DutyCycle(Motor1.motor_status.duty_cycle);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//Motor2.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
//Motor3.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
|
||||
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
Motor1.motor_status.cur_comm_step = MOTOR_COMMUTATION_STEPS[Motor1.motor_status.currentHallPattern];
|
||||
volatile int8_t step_change = Motor1.motor_status.cur_comm_step - Motor1.motor_status.prev_comm_step;
|
||||
volatile int8_t step_change1 = Motor1.motor_status.cur_comm_step - Motor1.motor_status.prev_comm_step;
|
||||
|
||||
switch(step_change)
|
||||
switch(step_change1)
|
||||
{
|
||||
case 1:
|
||||
case -5:
|
||||
case 1: case -5:
|
||||
Motor1.motor_status.Num_Steps = Motor1.motor_status.Num_Steps+1;
|
||||
Motor1.motor_status.actualDirection = CW;
|
||||
Motor1.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
//Motor1.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
break;
|
||||
case -1:
|
||||
case 5:
|
||||
case -1: case 5:
|
||||
Motor1.motor_status.Num_Steps = Motor1.motor_status.Num_Steps-1;
|
||||
Motor1.motor_status.actualDirection = CCW;
|
||||
//Motor1.motor_setpoints.directionOffset = DIRECTION_CCW_OFFSET;
|
||||
|
|
@ -406,6 +446,48 @@ void exec_commutation(void)
|
|||
break;
|
||||
}
|
||||
Motor1.motor_status.prev_comm_step = Motor1.motor_status.cur_comm_step;
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
|
||||
//Motor2.motor_status.cur_comm_step = MOTOR_COMMUTATION_STEPS[Motor1.motor_status.currentHallPattern];
|
||||
//volatile int8_t step_change2 = Motor2.motor_status.cur_comm_step - Motor2.motor_status.prev_comm_step;
|
||||
//
|
||||
//switch(step_change2)
|
||||
//{
|
||||
//case 1: case -5:
|
||||
//Motor2.motor_status.Num_Steps = Motor2.motor_status.Num_Steps+1;
|
||||
//Motor2.motor_status.actualDirection = CW;
|
||||
////Motor2.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
//break;
|
||||
//case -1: case 5:
|
||||
//Motor2.motor_status.Num_Steps = Motor2.motor_status.Num_Steps-1;
|
||||
//Motor2.motor_status.actualDirection = CCW;
|
||||
////Motor1.motor_setpoints.directionOffset = DIRECTION_CCW_OFFSET;
|
||||
//break;
|
||||
//default:
|
||||
//// do nothing
|
||||
//break;
|
||||
//}
|
||||
//
|
||||
//Motor3.motor_status.cur_comm_step = MOTOR_COMMUTATION_STEPS[Motor1.motor_status.currentHallPattern];
|
||||
//volatile int8_t step_change3 = Motor3.motor_status.cur_comm_step - Motor3.motor_status.prev_comm_step;
|
||||
//
|
||||
//switch(step_change3)
|
||||
//{
|
||||
//case 1: case -5:
|
||||
//Motor3.motor_status.Num_Steps = Motor3.motor_status.Num_Steps+1;
|
||||
//Motor3.motor_status.actualDirection = CW;
|
||||
////Motor3.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
//break;
|
||||
//case -1: case 5:
|
||||
//Motor3.motor_status.Num_Steps = Motor3.motor_status.Num_Steps-1;
|
||||
//Motor3.motor_status.actualDirection = CCW;
|
||||
////Motor1.motor_setpoints.directionOffset = DIRECTION_CCW_OFFSET;
|
||||
//break;
|
||||
//default:
|
||||
//// do nothing
|
||||
//break;
|
||||
//}
|
||||
|
||||
//calculate_motor_speed();
|
||||
//toc(DEBUG_3);
|
||||
//toc(DEBUG_4);
|
||||
|
|
@ -414,6 +496,7 @@ void exec_commutation(void)
|
|||
|
||||
void calculate_motor_speed(void)
|
||||
{
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
volatile uint32_t temp_rpm = 0;
|
||||
hri_tccount32_read_CC_reg(TC0, 0); /* Read CC0 but throw away)*/
|
||||
volatile uint32_t period_after_capture = hri_tccount32_read_CC_reg(TC0, 1);
|
||||
|
|
@ -422,33 +505,48 @@ void calculate_motor_speed(void)
|
|||
} else {
|
||||
//uint32_t test = (SPEEDFACTOR, period_after_capture);
|
||||
//temp_rpm = SPEEDFACTOR / period_after_capture;
|
||||
uint32_t muti = DEVICE_SPEEDTC_FREQUENCY_Hz*60;
|
||||
temp_rpm = (muti) / (period_after_capture*MOTOR_COMUTATION_STATES);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
temp_rpm = HZ_TO_RPM / (period_after_capture*MOTOR_COMUTATION_STATES);
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
}
|
||||
|
||||
#ifdef AVERAGE_SPEED_MEASURE
|
||||
// To avoid noise an average is realized on 8 samples
|
||||
speed_average += temp_rpm;
|
||||
if(count >= n_SAMPLE)
|
||||
{
|
||||
count = 1;
|
||||
Motor1.motor_status.calc_rpm = (speed_average >> 3); // divide by 32
|
||||
speed_average = 0;
|
||||
//*Spare_byte1 = motorState.actualDirection;
|
||||
if(Motor1.motor_status.actualDirection == CCW) /* Changed from CCW */
|
||||
{
|
||||
//*motor_speed = -1* Motor1.calc_rpm;
|
||||
Motor1.motor_status.calc_rpm = -1* Motor1.motor_status.calc_rpm;
|
||||
} else {
|
||||
//*motor_speed = Motor1.calc_rpm;
|
||||
Motor1.motor_status.calc_rpm = Motor1.motor_status.calc_rpm;
|
||||
}
|
||||
return;
|
||||
}
|
||||
else count++;
|
||||
#else
|
||||
Motor1.motor_status.calc_rpm = (int16_t)temp_rpm;
|
||||
#endif
|
||||
if(Motor1.motor_status.actualDirection == CCW) /* Changed from CCW */
|
||||
{
|
||||
//*motor_speed = -1* Motor1.calc_rpm;
|
||||
temp_rpm = -1 * temp_rpm;
|
||||
} else {
|
||||
//*motor_speed = Motor1.calc_rpm;
|
||||
temp_rpm = temp_rpm;
|
||||
}
|
||||
|
||||
Motor1.motor_status.calc_rpm = (int16_t)temp_rpm;
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
|
||||
//#ifdef AVERAGE_SPEED_MEASURE
|
||||
//// To avoid noise an average is realized on 8 samples
|
||||
//speed_average += temp_rpm;
|
||||
//if(count >= n_SAMPLE)
|
||||
//{
|
||||
//count = 1;
|
||||
//Motor1.motor_status.calc_rpm = (speed_average >> 3); // divide by 32
|
||||
////Motor1.motor_status.calc_rpm = (speed_average); // divide by 32
|
||||
//speed_average = 0;
|
||||
////*Spare_byte1 = motorState.actualDirection;
|
||||
//if(Motor1.motor_status.actualDirection == CCW) /* Changed from CCW */
|
||||
//{
|
||||
////*motor_speed = -1* Motor1.calc_rpm;
|
||||
//Motor1.motor_status.calc_rpm = -1* Motor1.motor_status.calc_rpm;
|
||||
//} else {
|
||||
////*motor_speed = Motor1.calc_rpm;
|
||||
//Motor1.motor_status.calc_rpm = Motor1.motor_status.calc_rpm;
|
||||
//}
|
||||
//return;
|
||||
//}
|
||||
//else count++;
|
||||
//#else
|
||||
//Motor1.motor_status.calc_rpm = (int16_t)temp_rpm;
|
||||
//#endif
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
}
|
||||
|
||||
void DisableMotor(BLDCMotor_t *motor)
|
||||
|
|
@ -460,7 +558,7 @@ void DisableMotor(BLDCMotor_t *motor)
|
|||
//------------------------------------------------------------------------------
|
||||
// pi current control
|
||||
//------------------------------------------------------------------------------
|
||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, volatile float curfbk, volatile float curRef)
|
||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, const float curfbk, const float curRef)
|
||||
{
|
||||
|
||||
motor->controllers.Pi_Idc.Fbk_pu = f_clamp(curfbk, -DEVICE_SHUNT_CURRENT_A, DEVICE_SHUNT_CURRENT_A); // Clamped to max current sensor readingspeedfbk;
|
||||
|
|
@ -481,8 +579,7 @@ void BLDC_runCurrentCntl(BLDCMotor_t *motor, volatile float curfbk, volatile flo
|
|||
}
|
||||
|
||||
volatile float duty_pu = f_abs((motor->controllers.Pi_Idc.Out_pu * motor->VoneByDcBus_pu));
|
||||
volatile uint32_t duty_cycle = f_clamp(duty_pu * (float32_t)MAX_PWM, 0.0f, (float32_t)MAX_PWM);
|
||||
motor->motor_status.duty_cycle = (uint16_t)duty_cycle;
|
||||
motor->motor_status.duty_cycle = (uint16_t)f_clamp(duty_pu * (float32_t)MAX_PWM, 0.0f, (float32_t)MAX_PWM);
|
||||
// Remove Low duty cycle values
|
||||
//if(duty_cycle < 80.0) motor->duty_cycle = (uint16_t)0;
|
||||
//else motor->duty_cycle = (uint16_t)duty_cycle;
|
||||
|
|
@ -492,9 +589,9 @@ void BLDC_runCurrentCntl(BLDCMotor_t *motor, volatile float curfbk, volatile flo
|
|||
//// ------------------------------------------------------------------------------
|
||||
// Speed Control: Input in RPM units (int16_t)
|
||||
//------------------------------------------------------------------------------
|
||||
void BLDC_runSpeedCntl(BLDCMotor_t *motor, volatile float speedfbk, volatile float speedRef)
|
||||
void BLDC_runSpeedCntl(BLDCMotor_t *motor, const float speedfbk, const float speedRef)
|
||||
{
|
||||
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
motor->controllers.Pid_Speed.Fbk_pu = speedfbk;
|
||||
motor->controllers.Pid_Speed.Ref_pu = f_clamp(speedRef, -MOTOR_MAX_SPD_RPM, MOTOR_MAX_SPD_RPM); // Convert Speed Ref to Q16 Format
|
||||
|
||||
|
|
@ -524,13 +621,13 @@ void BLDC_runSpeedCntl(BLDCMotor_t *motor, volatile float speedfbk, volatile flo
|
|||
PID_run_parallel(&motor->controllers.Pid_Speed);
|
||||
motor->controllers.Pi_Idc.Ref_pu = motor->controllers.Pid_Speed.Out_pu;
|
||||
}
|
||||
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
}
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
// Position Control:Input in Hall step units (int16_t)
|
||||
//------------------------------------------------------------------------------
|
||||
void BLDC_runPosCntl(BLDCMotor_t *motor, int16_t posfbk, int16_t posRef)
|
||||
void BLDC_runPosCntl(BLDCMotor_t *motor, const int16_t posfbk, const int16_t posRef)
|
||||
{
|
||||
/* Output Pu in RPM */
|
||||
motor->controllers.Pi_Pos.OutMax_pu = MOTOR_MAX_SPD_RPM;
|
||||
|
|
|
|||
|
|
@ -27,17 +27,19 @@
|
|||
#define ADC_RESOLUTION (12)
|
||||
#define ADC_MAX_COUNTS (1<<ADC_RESOLUTION)
|
||||
#define ADC_LSB_SIZE (ADC_VOLTAGE_REFERENCE/ADC_MAX_COUNTS)
|
||||
#define LSB_TO_PU (ADC_LSB_SIZE * ONEON_CURRENT_SENSOR_SENSITIVITY)
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Define the control and PWM frequencies:
|
||||
// ----------------------------------------------------------------------
|
||||
// 16kHz is the maximum frequency according to the calculation duration in the mode run and spin.
|
||||
#define DEVICE_MCU_FREQUENCY_Hz (100000000U)
|
||||
#define DEVICE_MCU_FREQUENCY_Hz (120000000U)
|
||||
#define DEVICE_SPEEDTC_DIV (4U)
|
||||
#define DEVICE_SPEEDTC_FREQUENCY_Hz (100000000U/DEVICE_SPEEDTC_DIV)
|
||||
#define DEVICE_SPEEDTC_FREQUENCY_Hz (DEVICE_MCU_FREQUENCY_Hz/DEVICE_SPEEDTC_DIV)
|
||||
#define DEVICE_PWM_FREQUENCY_kHz (25.0f)
|
||||
#define DEVICE_ISR_FREQUENCY_kHz DEVICE_PWM_FREQUENCY_kHz
|
||||
#define DEVICE_ISR_PERIOD_Sec (0.001f/DEVICE_ISR_FREQUENCY_kHz)
|
||||
#define HZ_TO_RPM (DEVICE_SPEEDTC_FREQUENCY_Hz * 60)
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
|
|
@ -153,8 +155,9 @@ volatile BLDCMotor_t Motor2;
|
|||
volatile BLDCMotor_t Motor3;
|
||||
|
||||
|
||||
static uint32_t adc_seq_regs[6] = {0x1802, 0x1803, 0x1802, 0x1803, 0x1802, 0x1803};
|
||||
static volatile uint16_t adc_res[6] = {0};
|
||||
//static uint32_t adc_seq_regs[6] = {0x1802, 0x1803, 0x1802, 0x1803, 0x1802, 0x1803};
|
||||
static uint32_t adc_seq_regs[2] = {0x1802, 0x1803};
|
||||
static volatile uint16_t adc_res[2] = {0};
|
||||
static volatile bool adc_dma_done = 0;
|
||||
|
||||
struct _dma_resource *adc_sram_dma_resource;
|
||||
|
|
@ -168,11 +171,11 @@ void BldcInitFunctions(void);
|
|||
|
||||
|
||||
|
||||
void select_active_phase(BLDCMotor_t *Motor, uint8_t hall_state);
|
||||
void select_active_phase(BLDCMotor_t *Motor, const uint8_t hall_state);
|
||||
void read_zero_current_offset_value(BLDCMotor_t *Motor);
|
||||
//int32_t adc_sync_read_channel(struct adc_async_descriptor *const descr, const uint8_t channel, uint8_t *const buffer, const uint16_t length);
|
||||
//static uint16_t adc_read(struct adc_async_descriptor *const descr, const uint8_t channel);
|
||||
void exec_commutation(void);
|
||||
inline void exec_commutation(void);
|
||||
uint8_t get_dir_hall_code(void);
|
||||
uint8_t get_hall_state(void);
|
||||
|
||||
|
|
@ -180,22 +183,22 @@ uint8_t HALLPatternGet(void);
|
|||
uint8_t PDEC_HALLPatternGet(void);
|
||||
void calculate_motor_speed(void);
|
||||
void DisableMotor(BLDCMotor_t *motor);
|
||||
void BLDC_runSpeedCntl(BLDCMotor_t *motor, volatile float speedfbk, volatile float speedRef);
|
||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, volatile float curfbk, volatile float curRef);
|
||||
void BLDC_runSpeedCntl(BLDCMotor_t *motor, const float speedfbk, const float speedRef);
|
||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, const float curfbk, const float curRef);
|
||||
void BLDC_runPosCntl(BLDCMotor_t *motor, int16_t posfbk, int16_t posRef);
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Functions used with function pointers
|
||||
// ----------------------------------------------------------------------
|
||||
uint8_t readM1Hall(void);
|
||||
uint8_t readM2Hall(void);
|
||||
uint8_t readM3Hall(void);
|
||||
inline uint8_t readM1Hall(void);
|
||||
inline uint8_t readM2Hall(void);
|
||||
inline uint8_t readM3Hall(void);
|
||||
void DisableM1GateDrivers(BLDCMotor_t *motor);
|
||||
void DisableM2GateDrivers(BLDCMotor_t *motor);
|
||||
void DisableM3GateDrivers(BLDCMotor_t *motor);
|
||||
void SetM1DutyCycle(uint16_t duty);
|
||||
void SetM2DutyCycle(uint16_t duty);
|
||||
void SetM3DutyCycle(uint16_t duty);
|
||||
inline void SetM1DutyCycle(const uint16_t duty);
|
||||
inline void SetM2DutyCycle(const uint16_t duty);
|
||||
inline void SetM3DutyCycle(const uint16_t duty);
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// all controller objects, variables and helpers:
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ inline void configure_tcc_pwm(void)
|
|||
|
||||
/* TCC0 */
|
||||
hri_tcc_set_WEXCTRL_OTMX_bf(TCC0, 0);
|
||||
hri_tcc_write_PER_reg(TCC0,1000);
|
||||
hri_tcc_write_PER_reg(TCC0,1200);
|
||||
|
||||
hri_tcc_set_WAVE_POL0_bit(TCC0);
|
||||
hri_tcc_set_WAVE_POL1_bit(TCC0);
|
||||
|
|
@ -69,7 +69,7 @@ inline void configure_tcc_pwm(void)
|
|||
hri_tcc_write_CC_CC_bf(TCC1, 2, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC1, 3, 0);
|
||||
//hri_tcc_write_CC_CC_bf(TCC1, 0, 0);
|
||||
hri_tcc_write_PER_reg(TCC1,1000);
|
||||
hri_tcc_write_PER_reg(TCC1,1200);
|
||||
//pwm_set_parameters(&TCC_PWM, 1000, 250);
|
||||
|
||||
hri_tcc_set_WAVE_POL0_bit(TCC1);
|
||||
|
|
@ -129,7 +129,7 @@ inline void adc_dmac_sequence_init()
|
|||
* next descriptor address, data count and Enable the DMAC Channel */
|
||||
_dma_set_source_address(DMAC_CHANNEL_ADC_SEQ, (const void *)adc_seq_regs);
|
||||
_dma_set_destination_address(DMAC_CHANNEL_ADC_SEQ, (const void *)&ADC0->DSEQDATA.reg);
|
||||
_dma_set_data_amount(DMAC_CHANNEL_ADC_SEQ, 6);
|
||||
_dma_set_data_amount(DMAC_CHANNEL_ADC_SEQ, 2);
|
||||
_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SEQ, DMAC_CHANNEL_ADC_SEQ);
|
||||
_dma_enable_transaction(DMAC_CHANNEL_ADC_SEQ, false);
|
||||
//_dma_get_channel_resource(&adc_dmac_sequence_resource, DMAC_CHANNEL_ADC_SEQ);
|
||||
|
|
@ -147,7 +147,7 @@ inline void adc_sram_dmac_init()
|
|||
* next descriptor address, data count and Enable the DMAC Channel */
|
||||
_dma_set_source_address(DMAC_CHANNEL_ADC_SRAM, (const void *)&ADC0->RESULT.reg);
|
||||
_dma_set_destination_address(DMAC_CHANNEL_ADC_SRAM, (const void *)adc_res);
|
||||
_dma_set_data_amount(DMAC_CHANNEL_ADC_SRAM, 6);
|
||||
_dma_set_data_amount(DMAC_CHANNEL_ADC_SRAM, 2);
|
||||
_dma_set_irq_state(DMAC_CHANNEL_ADC_SRAM, DMA_TRANSFER_COMPLETE_CB, true);
|
||||
_dma_get_channel_resource(&adc_sram_dma_resource, DMAC_CHANNEL_ADC_SRAM);
|
||||
adc_sram_dma_resource[0].dma_cb.transfer_done = adc_sram_dma_callback;
|
||||
|
|
|
|||
|
|
@ -173,7 +173,7 @@ static inline void PID_run_series(volatile PID_t *pPid_obj)
|
|||
// Compute the proportional term
|
||||
Up = obj->Kp * obj->error;
|
||||
|
||||
if(obj->Ki>0.0){
|
||||
if(obj->Ki>0.0f){
|
||||
// Compute the integral term in parallel form and saturate
|
||||
obj->Ui = f_clamp((obj->Ui + (obj->Ki * Up)), obj->OutMin_pu, obj->OutMax_pu);
|
||||
}
|
||||
|
|
@ -198,7 +198,7 @@ static inline void PID_run_parallel(volatile PID_t *pPid_obj)
|
|||
// Compute the proportional term
|
||||
Up = obj->Kp * obj->error;
|
||||
|
||||
if(obj->Ki>0.0){
|
||||
if(obj->Ki>0.0f){
|
||||
// Compute the integral term in parallel form and saturate
|
||||
obj->Ui = f_clamp((obj->Ui + (obj->Ki * obj->error)), obj->OutMin_pu, obj->OutMax_pu);
|
||||
}
|
||||
|
|
@ -215,8 +215,8 @@ static inline void PID_run_parallel(volatile PID_t *pPid_obj)
|
|||
// Calculate Current Parameters
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
static inline float PI_calcKp(float32_t Ls_H, float32_t deviceCurrent_A, float32_t deviceVoltage_V,
|
||||
float deviceCtrlPeriode_Sec)
|
||||
static inline float PI_calcKp(const float32_t Ls_H, const float32_t deviceCurrent_A, const float32_t deviceVoltage_V,
|
||||
const float deviceCtrlPeriode_Sec)
|
||||
{
|
||||
// calculation is based on "Betragsoptimum"
|
||||
// Kp = Ls/(2*tau)
|
||||
|
|
@ -236,10 +236,10 @@ float deviceCtrlPeriode_Sec)
|
|||
return Kp;
|
||||
}
|
||||
|
||||
static inline float PI_calcKi(float Rs_Ohm, float Ls_H, float deviceCtrlPeriode_Sec)
|
||||
static inline float PI_calcKi(const float Rs_Ohm, const float Ls_H, const float deviceCtrlPeriode_Sec)
|
||||
{
|
||||
// calculation is based on "TI - MotorWare's documentation"
|
||||
float RsByLs = (float)(Rs_Ohm / Ls_H);
|
||||
float RsByLs = (float32_t)(Rs_Ohm / Ls_H);
|
||||
float Ki = RsByLs * deviceCtrlPeriode_Sec;
|
||||
//fix16_t Ki = 0;
|
||||
return Ki;
|
||||
|
|
|
|||
|
|
@ -417,6 +417,20 @@ void system_init(void)
|
|||
|
||||
gpio_set_pin_function(DEBUG_4, GPIO_PIN_FUNCTION_OFF);
|
||||
|
||||
// GPIO on PD11
|
||||
|
||||
gpio_set_pin_level(DEBUG_5,
|
||||
// <y> Initial level
|
||||
// <id> pad_initial_level
|
||||
// <false"> Low
|
||||
// <true"> High
|
||||
false);
|
||||
|
||||
// Set pin direction to output
|
||||
gpio_set_pin_direction(DEBUG_5, GPIO_DIRECTION_OUT);
|
||||
|
||||
gpio_set_pin_function(DEBUG_5, GPIO_PIN_FUNCTION_OFF);
|
||||
|
||||
ADC_0_init();
|
||||
|
||||
DIGITAL_GLUE_LOGIC_0_init();
|
||||
|
|
|
|||
|
|
@ -16,6 +16,8 @@
|
|||
#include "ethercat_slave_def.h"
|
||||
#include "bldc.h"
|
||||
#include "statemachine.h"
|
||||
#include <string.h>
|
||||
|
||||
|
||||
#define DEBUG_1_PORT PORT_PC01
|
||||
#define DEBUG_2_PORT PORT_PC03
|
||||
|
|
@ -52,7 +54,7 @@ void update_setpoints(void)
|
|||
{
|
||||
inline float32_t convert_int_to_PU(volatile int16_t input)
|
||||
{
|
||||
return ((float32_t)input/1000.0);
|
||||
return ((float32_t)input/1000.0f);
|
||||
}
|
||||
//Motor1.des_mode = 0;
|
||||
//Motor1.set = 0;
|
||||
|
|
@ -83,9 +85,15 @@ extern void One_ms_cycle_callback(void)
|
|||
tx_ethercat = true;
|
||||
if(tx_ethercat_done){
|
||||
volatile int i=0;
|
||||
for (i=0;i<ram_rd_start;i++){
|
||||
ram_buffer[ram_real_wr_start+i] = ram_buffer[ram_wr_start+i];
|
||||
}
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
|
||||
//memcpy();
|
||||
memcpy(&ram_buffer[ram_real_wr_start], &ram_buffer[ram_wr_start], ram_rd_start);
|
||||
|
||||
//for (i=0;i<ram_rd_start;i++){
|
||||
//ram_buffer[ram_real_wr_start+i] = ram_buffer[ram_wr_start+i];
|
||||
//}
|
||||
//DMAC->CHID.reg = DMAC_CHID_ID(dma_LAN9252_rx.channel_id);
|
||||
//DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
|
||||
//DMAC->CHID.reg = DMAC_CHID_ID(dma_LAN9252_tx.channel_id);
|
||||
|
|
@ -101,6 +109,8 @@ extern void One_ms_cycle_callback(void)
|
|||
//DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
|
||||
//DMAC->CHID.reg = DMAC_CHID_ID(dma_LAN9252_tx.channel_id);
//hri_dmacchannel_write_CHCTRLB_CMD_bf(&DMAC->Channel[1], DMAC_CHCTRLB_CMD_RESUME_Val); //RX Channel
gpio_set_pin_level(ECAT_SPI_CS_PIN, false); // SPI_Slave Select LOW
_dma_enable_transaction(0,false);
//DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
|
||||
//hri_dmacchannel_write_CHCTRLB_CMD_bf(&DMAC->Channel[0], DMAC_CHCTRLB_CMD_RESUME_Val); //TX Channel
_dma_enable_transaction(1,false);
tx_ethercat_done = false;
}
|
||||
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -144,7 +144,7 @@ int8_t TC_ECAT_init()
|
|||
|
||||
// hri_tc_write_DBGCTRL_reg(TC7,0); /* Run in debug: 0 */
|
||||
|
||||
hri_tccount32_write_CC_reg(TC7, 0, 0x61a8); /* Compare/Capture Value: 0x61a8 */
|
||||
hri_tccount32_write_CC_reg(TC7, 0, 0x7530); /* Compare/Capture Value: 0x7530 */
|
||||
|
||||
// hri_tccount32_write_CC_reg(TC7, 1 ,0x0); /* Compare/Capture Value: 0x0 */
|
||||
|
||||
|
|
|
|||
|
|
@ -15,8 +15,8 @@
|
|||
#include "statemachine.h"
|
||||
|
||||
#define DEBUG_1_PORT PORT_PC01
|
||||
#define DEBUG_2_PORT PORT_PC03
|
||||
#define DEBUG_3_PORT PORT_PC02
|
||||
#define DEBUG_2_PORT PORT_PC02
|
||||
#define DEBUG_3_PORT PORT_PC03
|
||||
#define DEBUG_4_PORT PORT_PC30
|
||||
|
||||
|
||||
|
|
@ -29,7 +29,10 @@ void TC7_Handler(void)
|
|||
TC7->COUNT16.INTFLAG.bit.OVF = 0x01;
|
||||
//One_ms_cycle_callback();
|
||||
//gpio_toggle_pin_level(DEBUG_1);
|
||||
One_ms_cycle_callback();
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
One_ms_cycle_callback();
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
//Motor1.timerflags.motor_telemetry_flag = true;
|
||||
|
||||
}
|
||||
|
|
@ -95,6 +98,7 @@ void TC0_Handler(void)
|
|||
// ----------------------------------------------------------------------
|
||||
static void pwm_cb(const struct pwm_descriptor *const descr)
|
||||
{
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
Motor1.timerflags.pwm_cycle_tic = true;
|
||||
}
|
||||
|
||||
|
|
@ -107,10 +111,9 @@ static void HW_current_limit_detect_callback(void)
|
|||
|
||||
void adc_sram_dma_callback(struct _dma_resource *adc_dma_res)
|
||||
{
|
||||
inline void filter_convert_to_pu(int16_t *phase, float32_t *phase_filtered_pu)
|
||||
{
|
||||
*phase_filtered_pu = (float32_t)(*phase * ADC_LSB_SIZE * ONEON_CURRENT_SENSOR_SENSITIVITY);
|
||||
}
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
|
||||
volatile int16_t phase_A_current_raw;
|
||||
volatile int16_t phase_B_current_raw;
|
||||
|
|
@ -119,29 +122,30 @@ void adc_sram_dma_callback(struct _dma_resource *adc_dma_res)
|
|||
phase_A_current_raw = (adc_res[0] - Motor1.Voffset_lsb.A);
|
||||
phase_B_current_raw = (adc_res[1] - Motor1.Voffset_lsb.B)*-1;
|
||||
// Covert from LSB to PU (A) and filter out small readings
|
||||
filter_convert_to_pu(&phase_A_current_raw, &Motor1.Iphase_pu.A);
|
||||
filter_convert_to_pu(&phase_B_current_raw, &Motor1.Iphase_pu.B);
|
||||
Motor1.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
|
||||
Motor1.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
|
||||
// i_c = -i_a - i_b because i_a + i_b + i_c = 0
|
||||
Motor1.Iphase_pu.C = -Motor1.Iphase_pu.A - Motor1.Iphase_pu.B;
|
||||
|
||||
/* Motor 2 */
|
||||
phase_A_current_raw = (adc_res[0] - Motor2.Voffset_lsb.A);
|
||||
phase_B_current_raw = (adc_res[1] - Motor2.Voffset_lsb.B)*-1;
|
||||
filter_convert_to_pu(&phase_A_current_raw, &Motor2.Iphase_pu.A);
|
||||
filter_convert_to_pu(&phase_B_current_raw, &Motor2.Iphase_pu.B);
|
||||
// i_c = -i_a - i_b because i_a + i_b + i_c = 0
|
||||
Motor2.Iphase_pu.C = -Motor2.Iphase_pu.A - Motor2.Iphase_pu.B;
|
||||
|
||||
/* Motor 3 */
|
||||
phase_A_current_raw = (adc_res[0] - Motor3.Voffset_lsb.A);
|
||||
phase_B_current_raw = (adc_res[1] - Motor3.Voffset_lsb.B)*-1;
|
||||
filter_convert_to_pu(&phase_A_current_raw, &Motor3.Iphase_pu.A);
|
||||
filter_convert_to_pu(&phase_B_current_raw, &Motor3.Iphase_pu.B);
|
||||
// i_c = -i_a - i_b because i_a + i_b + i_c = 0
|
||||
Motor3.Iphase_pu.C = -Motor3.Iphase_pu.A - Motor3.Iphase_pu.B;
|
||||
//phase_A_current_raw = (adc_res[2] - Motor2.Voffset_lsb.A);
|
||||
//phase_B_current_raw = (adc_res[3] - Motor2.Voffset_lsb.B)*-1;
|
||||
//Motor2.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
|
||||
//Motor2.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
|
||||
//// i_c = -i_a - i_b because i_a + i_b + i_c = 0
|
||||
//Motor2.Iphase_pu.C = -Motor2.Iphase_pu.A - Motor2.Iphase_pu.B;
|
||||
//
|
||||
///* Motor 3 */
|
||||
//phase_A_current_raw = (adc_res[4] - Motor3.Voffset_lsb.A);
|
||||
//phase_B_current_raw = (adc_res[5] - Motor3.Voffset_lsb.B)*-1;
|
||||
//Motor3.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
|
||||
//Motor3.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
|
||||
//// i_c = -i_a - i_b because i_a + i_b + i_c = 0
|
||||
//Motor3.Iphase_pu.C = -Motor3.Iphase_pu.A - Motor3.Iphase_pu.B;
|
||||
|
||||
// Set Current Loop Flag
|
||||
Motor1.timerflags.current_loop_tic = true;
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
}
|
||||
|
||||
#endif /* INTERRUPT_HANDLERS_H_ */
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
#include <atmel_start.h>
|
||||
#include <hal_gpio.h>
|
||||
#include <hal_delay.h>
|
||||
#include <arm_math.h>
|
||||
//#include <arm_math.h>
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Header Files
|
||||
|
|
@ -63,7 +63,9 @@ inline void CONTROLLER_StateMachine(void)
|
|||
Motor1.timerflags.motor_telemetry_flag = true;
|
||||
/* Blank */
|
||||
case 6: /* PWM FREQ / 6.25 - 4kHz */
|
||||
|
||||
calculate_motor_speed();
|
||||
|
||||
BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, Motor1.motor_setpoints.desired_speed);
|
||||
//BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, 3000);
|
||||
default: /* PWM FREQ - 25kHz */
|
||||
|
|
@ -101,37 +103,49 @@ inline void CONTROLLER_StateMachine(void)
|
|||
case 0: /* PWM FREQ / 25 - 1kHz */
|
||||
Motor1.timerflags.motor_telemetry_flag = true; // Update telemetry flag
|
||||
//tic(DEBUG_4);
|
||||
BLDC_runPosCntl(&Motor1, Motor1.motor_status.Num_Steps, Motor1.motor_setpoints.desired_position);
|
||||
BLDC_runPosCntl(&Motor2, Motor1.motor_status.Num_Steps, Motor1.motor_setpoints.desired_position);
|
||||
BLDC_runPosCntl(&Motor3, Motor1.motor_status.Num_Steps, Motor1.motor_setpoints.desired_position);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
BLDC_runPosCntl(&Motor1, Motor1.motor_status.Num_Steps, Motor1.motor_setpoints.desired_position);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//BLDC_runPosCntl(&Motor2, Motor1.motor_status.Num_Steps, Motor1.motor_setpoints.desired_position);
|
||||
//BLDC_runPosCntl(&Motor3, Motor1.motor_status.Num_Steps, Motor1.motor_setpoints.desired_position);
|
||||
//toc(DEBUG_4);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
|
||||
case 5: case 10: case 15: case 20:/* PWM FREQ / 5 - 5kHz */
|
||||
//tic(DEBUG_3);
|
||||
//tic(DEBUG_4);
|
||||
//tic(DEBUG_2);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
calculate_motor_speed();
|
||||
calculate_motor_speed();
|
||||
calculate_motor_speed();
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//calculate_motor_speed();
|
||||
//calculate_motor_speed();
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//toc(DEBUG_2);
|
||||
//tic(DEBUG_3);
|
||||
BLDC_runSpeedCntl(&Motor1, Motor1.motor_status.calc_rpm, Motor1.controllers.Pid_Speed.Ref_pu);
|
||||
BLDC_runSpeedCntl(&Motor2, Motor1.motor_status.calc_rpm, Motor1.controllers.Pid_Speed.Ref_pu);
|
||||
BLDC_runSpeedCntl(&Motor3, Motor1.motor_status.calc_rpm, Motor1.controllers.Pid_Speed.Ref_pu);
|
||||
//BLDC_runSpeedCntl(&Motor2, Motor1.motor_status.calc_rpm, Motor1.controllers.Pid_Speed.Ref_pu);
|
||||
//BLDC_runSpeedCntl(&Motor3, Motor1.motor_status.calc_rpm, Motor1.controllers.Pid_Speed.Ref_pu);
|
||||
//toc(DEBUG_3);
|
||||
//toc(DEBUG_4);
|
||||
//toc(DEBUG_3);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
default: /* PWM FREQ - 25kHz */
|
||||
//tic(DEBUG_2);
|
||||
//tic(DEBUG_3);
|
||||
|
||||
select_active_phase(&Motor1, Motor1.motor_status.currentHallPattern);
|
||||
select_active_phase(&Motor2, Motor2.motor_status.currentHallPattern);
|
||||
select_active_phase(&Motor3, Motor3.motor_status.currentHallPattern);
|
||||
////toc(DEBUG_2);
|
||||
////tic(DEBUG_3);
|
||||
//select_active_phase(&Motor2, Motor2.motor_status.currentHallPattern);
|
||||
//select_active_phase(&Motor3, Motor3.motor_status.currentHallPattern);
|
||||
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
BLDC_runCurrentCntl(&Motor1, Motor1.Iphase_pu.Bus, Motor1.controllers.Pi_Idc.Ref_pu);
|
||||
BLDC_runCurrentCntl(&Motor2, Motor1.Iphase_pu.Bus, Motor1.controllers.Pi_Idc.Ref_pu);
|
||||
BLDC_runCurrentCntl(&Motor3, Motor1.Iphase_pu.Bus, Motor1.controllers.Pi_Idc.Ref_pu);
|
||||
//toc(DEBUG_3);
|
||||
//BLDC_runCurrentCntl(&Motor2, Motor1.Iphase_pu.Bus, Motor1.controllers.Pi_Idc.Ref_pu);
|
||||
//BLDC_runCurrentCntl(&Motor3, Motor1.Iphase_pu.Bus, Motor1.controllers.Pi_Idc.Ref_pu);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//toc(DEBUG_2);
|
||||
break;
|
||||
} // end switch(regulation_loop_count)
|
||||
|
|
@ -177,8 +191,15 @@ inline void CONTROLLER_StateMachine(void)
|
|||
default: break;
|
||||
} // End switch(applicationStatus.currentstate)
|
||||
//gpio_set_pin_level(DRV_RST, true);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
|
||||
exec_commutation();
|
||||
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
|
||||
} // inline void CONTROLLER_StateMachine(void)
|
||||
|
||||
void enable_NVIC_IRQ(void)
|
||||
|
|
@ -192,6 +213,21 @@ void enable_NVIC_IRQ(void)
|
|||
}
|
||||
|
||||
|
||||
#define NOF 64
|
||||
volatile uint32_t samples[NOF];
|
||||
volatile float Fsamples[NOF];
|
||||
float fZeroCurrent = 8.0;
|
||||
|
||||
static void ProcessSamples(void) {
|
||||
volatile int i;
|
||||
tic_port(DEBUG_2_PORT);
|
||||
//Fsamples[i] = samples[i]*3.3/4096.0 - fZeroCurrent;
|
||||
for (i=0; i < NOF; i++) {
|
||||
Fsamples[i] = samples[i]*3.3f/4096.0f - fZeroCurrent;
|
||||
}
|
||||
toc_port(DEBUG_2_PORT);
|
||||
}
|
||||
|
||||
|
||||
int main(void)
|
||||
{
|
||||
|
|
@ -218,22 +254,33 @@ int main(void)
|
|||
configure_TC_CCL_SPEED();
|
||||
|
||||
ext_irq_register(nDRV_RESET, HW_current_limit_detect_callback);
|
||||
enable_NVIC_IRQ();
|
||||
//enable_NVIC_IRQ();
|
||||
|
||||
/* Replace with your application code */
|
||||
while (1) {
|
||||
if(Motor1.timerflags.motor_telemetry_flag) {
|
||||
Motor1.timerflags.motor_telemetry_flag = false;
|
||||
update_setpoints();
|
||||
update_telemetry();
|
||||
}
|
||||
|
||||
if(Motor1.timerflags.current_loop_tic) {
|
||||
Motor1.timerflags.current_loop_tic = false;
|
||||
tic_port(DEBUG_1_PORT);
|
||||
CONTROLLER_StateMachine();
|
||||
toc_port(DEBUG_1_PORT);
|
||||
}
|
||||
ProcessSamples();
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//if(Motor1.timerflags.motor_telemetry_flag) {
|
||||
////tic_port(DEBUG_2_PORT);
|
||||
//Motor1.timerflags.motor_telemetry_flag = false;
|
||||
//update_setpoints();
|
||||
////toc_port(DEBUG_2_PORT);
|
||||
////tic_port(DEBUG_3_PORT);
|
||||
//update_telemetry();
|
||||
////toc_port(DEBUG_3_PORT);
|
||||
//}
|
||||
//
|
||||
//if(Motor1.timerflags.current_loop_tic) {
|
||||
//Motor1.timerflags.current_loop_tic = false;
|
||||
//tic_port(DEBUG_1_PORT);
|
||||
//CONTROLLER_StateMachine();
|
||||
//toc_port(DEBUG_1_PORT);
|
||||
//}
|
||||
|
||||
//do {
|
||||
//delay_ms(10);
|
||||
|
|
|
|||
|
|
@ -63,6 +63,7 @@
|
|||
#define AVERAGE_SPEED_MEASURE
|
||||
#define COUNTEQUIVTO25RPM 892857142
|
||||
#define n_SAMPLE 8
|
||||
//#define n_SAMPLE 1
|
||||
static uint32_t speed_average = 0;
|
||||
static uint8_t count = 1;
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
|
@ -0,0 +1,22 @@
|
|||
|
||||
Microsoft Visual Studio Solution File, Format Version 12.00
|
||||
# Atmel Studio Solution File, Format Version 11.00
|
||||
VisualStudioVersion = 14.0.23107.0
|
||||
MinimumVisualStudioVersion = 10.0.40219.1
|
||||
Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "BLCD_E54v2", "BLCD_E54v2\BLCD_E54v2.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}"
|
||||
EndProject
|
||||
Global
|
||||
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
||||
Debug|ARM = Debug|ARM
|
||||
Release|ARM = Release|ARM
|
||||
EndGlobalSection
|
||||
GlobalSection(ProjectConfigurationPlatforms) = postSolution
|
||||
{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.ActiveCfg = Debug|ARM
|
||||
{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.Build.0 = Debug|ARM
|
||||
{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.ActiveCfg = Release|ARM
|
||||
{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.Build.0 = Release|ARM
|
||||
EndGlobalSection
|
||||
GlobalSection(SolutionProperties) = preSolution
|
||||
HideSolutionNode = FALSE
|
||||
EndGlobalSection
|
||||
EndGlobal
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
<environment>
|
||||
<configurations/>
|
||||
<device-packs>
|
||||
<device-pack device="ATSAME54P20A" name="SAME54_DFP" vendor="Atmel" version="1.1.134"/>
|
||||
</device-packs>
|
||||
</environment>
|
||||
|
|
@ -0,0 +1,231 @@
|
|||
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.0" xs:noNamespaceSchemaLocation="PACK.xsd">
|
||||
<vendor>Atmel</vendor>
|
||||
<name>My Project</name>
|
||||
<description>Project generated by Atmel Start</description>
|
||||
<url>http://start.atmel.com/</url>
|
||||
<releases>
|
||||
<release version="1.0.1">Initial version</release>
|
||||
</releases>
|
||||
<taxonomy>
|
||||
<description Cclass="AtmelStart" generator="AtmelStart">Configuration Files generated by Atmel Start</description>
|
||||
</taxonomy>
|
||||
<generators>
|
||||
<generator id="AtmelStart">
|
||||
<description>Atmel Start</description>
|
||||
<select Dname="ATSAME54P20A" Dvendor="Atmel:3"/>
|
||||
<command>http://start.atmel.com/</command>
|
||||
<files>
|
||||
<file category="generator" name="atmel_start_config.atstart"/>
|
||||
<file attr="template" category="other" name="AtmelStart.env_conf" select="Environment configuration"/>
|
||||
</files>
|
||||
</generator>
|
||||
</generators>
|
||||
<conditions>
|
||||
<condition id="CMSIS Device Startup">
|
||||
<description>Dependency on CMSIS core and Device Startup components</description>
|
||||
<require Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.2"/>
|
||||
<require Cclass="Device" Cgroup="Startup" Cversion="1.1.0"/>
|
||||
</condition>
|
||||
<condition id="ARMCC, GCC, IAR">
|
||||
<require Dname="ATSAME54P20A"/>
|
||||
<accept Tcompiler="ARMCC"/>
|
||||
<accept Tcompiler="GCC"/>
|
||||
<accept Tcompiler="IAR"/>
|
||||
</condition>
|
||||
<condition id="GCC">
|
||||
<require Dname="ATSAME54P20A"/>
|
||||
<accept Tcompiler="GCC"/>
|
||||
</condition>
|
||||
</conditions>
|
||||
<components generator="AtmelStart">
|
||||
<component Cclass="AtmelStart" Cgroup="Framework" Cversion="1.0.0" condition="CMSIS Device Startup">
|
||||
<description>Atmel Start Framework</description>
|
||||
<RTE_Components_h>#define ATMEL_START</RTE_Components_h>
|
||||
<files>
|
||||
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/adc_sync.rst"/>
|
||||
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/custom_logic.rst"/>
|
||||
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/evsys.rst"/>
|
||||
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/pwm.rst"/>
|
||||
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/spi_master_dma.rst"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_atomic.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_cache.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_custom_logic.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_delay.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_evsys.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_gpio.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_init.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_io.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_sleep.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_spi_m_dma.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_dma.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_cmcc.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_core.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_custom_logic.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_delay.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_dma.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_evsys.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_gpio.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_i2c_m_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_i2c_m_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_i2c_s_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_i2c_s_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_init.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_irq.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_ramecc.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_sleep.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_dma.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_atomic.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_cache.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_delay.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_evsys.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_gpio.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_init.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_io.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_sleep.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/compiler.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/err_codes.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/events.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_assert.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_event.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_increment_macro.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_list.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_repeat_macro.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_assert.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_event.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_list.c"/>
|
||||
<file category="source" condition="GCC" name="hal/utils/src/utils_syscalls.c"/>
|
||||
<file category="doc" condition="ARMCC, GCC, IAR" name="hpl/doc_lite/tc.rst"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_ac_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_adc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_aes_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_can_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_ccl_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_cmcc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_dac_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_dmac_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_dsu_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_eic_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_evsys_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_freqm_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_gclk_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_gmac_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_hmatrixb_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_i2s_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_icm_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_mclk_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_nvmctrl_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_osc32kctrl_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_oscctrl_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_pac_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_pcc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_pdec_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_pm_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_port_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_qspi_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_ramecc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_rstc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_rtc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_sdhc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_sercom_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_supc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_tc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_tcc_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_trng_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_usb_e54.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_wdt_e54.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="main.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="driver_init.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="driver_init.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="atmel_start_pins.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="examples/driver_examples.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="examples/driver_examples.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_adc_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_pwm.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_missing_features.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_pwm.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_reset.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_dma.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_sync.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_timer.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_async.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_sync.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_adc_sync.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_pwm.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_spi_m_dma.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/parts.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/adc/hpl_adc.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/adc/hpl_adc_base.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/ccl/hpl_ccl.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/cmcc/hpl_cmcc.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/core/hpl_core_m4.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/core/hpl_core_port.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/core/hpl_init.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/dmac/hpl_dmac.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/evsys/hpl_evsys.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/gclk/hpl_gclk.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/gclk/hpl_gclk_base.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/mclk/hpl_mclk.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/osc32kctrl/hpl_osc32kctrl.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/oscctrl/hpl_oscctrl.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/pm/hpl_pm.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/pm/hpl_pm_base.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/port/hpl_gpio_base.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/ramecc/hpl_ramecc.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/sercom/hpl_sercom.c"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/tc/tc_lite.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/tc/tc_lite.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/tcc/hpl_tcc.c"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/tcc/hpl_tcc.h"/>
|
||||
<file category="header" condition="ARMCC, GCC, IAR" name="atmel_start.h"/>
|
||||
<file category="source" condition="ARMCC, GCC, IAR" name="atmel_start.c"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_adc_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_ccl_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_cmcc_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_dmac_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_evsys_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_gclk_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_mclk_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_osc32kctrl_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_oscctrl_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_port_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_sercom_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_tcc_config.h"/>
|
||||
<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/peripheral_clk_config.h"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name=""/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="config"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="examples"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hal/include"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hal/utils/include"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/adc"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/ccl"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/cmcc"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/core"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/dmac"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/evsys"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/gclk"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/mclk"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/osc32kctrl"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/oscctrl"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/pm"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/port"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/ramecc"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/sercom"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/tc"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hpl/tcc"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name="hri"/>
|
||||
<file category="include" condition="ARMCC, GCC, IAR" name=""/>
|
||||
</files>
|
||||
</component>
|
||||
</components>
|
||||
</package>
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,169 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Store xmlns:i="http://www.w3.org/2001/XMLSchema-instance" xmlns="AtmelPackComponentManagement">
|
||||
<ProjectComponents>
|
||||
<ProjectComponent z:Id="i1" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/">
|
||||
<CApiVersion></CApiVersion>
|
||||
<CBundle></CBundle>
|
||||
<CClass>CMSIS</CClass>
|
||||
<CGroup>CORE</CGroup>
|
||||
<CSub></CSub>
|
||||
<CVariant></CVariant>
|
||||
<CVendor>ARM</CVendor>
|
||||
<CVersion>5.1.2</CVersion>
|
||||
<DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>
|
||||
<DependentComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays" />
|
||||
<Description></Description>
|
||||
<Files xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:anyType i:type="FileInfo">
|
||||
<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Documentation\Core\html\index.html</AbsolutePath>
|
||||
<Attribute></Attribute>
|
||||
<Category>doc</Category>
|
||||
<Condition></Condition>
|
||||
<FileContentHash i:nil="true" />
|
||||
<FileVersion></FileVersion>
|
||||
<Name>CMSIS/Documentation/Core/html/index.html</Name>
|
||||
<SelectString></SelectString>
|
||||
<SourcePath></SourcePath>
|
||||
</d4p1:anyType>
|
||||
<d4p1:anyType i:type="FileInfo">
|
||||
<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\arm\CMSIS\5.4.0\CMSIS\Core\Include\</AbsolutePath>
|
||||
<Attribute></Attribute>
|
||||
<Category>include</Category>
|
||||
<Condition></Condition>
|
||||
<FileContentHash i:nil="true" />
|
||||
<FileVersion></FileVersion>
|
||||
<Name>CMSIS/Core/Include/</Name>
|
||||
<SelectString></SelectString>
|
||||
<SourcePath></SourcePath>
|
||||
</d4p1:anyType>
|
||||
</Files>
|
||||
<PackName>CMSIS</PackName>
|
||||
<PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/arm/CMSIS/5.4.0/ARM.CMSIS.pdsc</PackPath>
|
||||
<PackVersion>5.4.0</PackVersion>
|
||||
<PresentInProject>true</PresentInProject>
|
||||
<ReferenceConditionId>ARMv6_7_8-M Device</ReferenceConditionId>
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</RteComponents>
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||||
<Status>Resolved</Status>
|
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<VersionMode>Fixed</VersionMode>
|
||||
<IsComponentInAtProject>true</IsComponentInAtProject>
|
||||
</ProjectComponent>
|
||||
<ProjectComponent z:Id="i2" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/">
|
||||
<CApiVersion></CApiVersion>
|
||||
<CBundle></CBundle>
|
||||
<CClass>Device</CClass>
|
||||
<CGroup>Startup</CGroup>
|
||||
<CSub></CSub>
|
||||
<CVariant></CVariant>
|
||||
<CVendor>Atmel</CVendor>
|
||||
<CVersion>1.1.0</CVersion>
|
||||
<DefaultRepoPath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs</DefaultRepoPath>
|
||||
<DependentComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:anyType z:Ref="i1" />
|
||||
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|
||||
<Description></Description>
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||||
<Files xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
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||||
<d4p1:anyType i:type="FileInfo">
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||||
<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include</AbsolutePath>
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||||
<Attribute></Attribute>
|
||||
<Category>include</Category>
|
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<Condition>C</Condition>
|
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<FileContentHash i:nil="true" />
|
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<FileVersion></FileVersion>
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<Name>include</Name>
|
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<SelectString></SelectString>
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<SourcePath></SourcePath>
|
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</d4p1:anyType>
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||||
<d4p1:anyType i:type="FileInfo">
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<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\include\sam.h</AbsolutePath>
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<Attribute></Attribute>
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<Category>header</Category>
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<Condition>C</Condition>
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<FileContentHash>8A8bci0EePdi0b+8Lluv4A==</FileContentHash>
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<FileVersion></FileVersion>
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<Name>include/sam.h</Name>
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||||
<SelectString></SelectString>
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||||
<SourcePath></SourcePath>
|
||||
</d4p1:anyType>
|
||||
<d4p1:anyType i:type="FileInfo">
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||||
<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\templates\main.c</AbsolutePath>
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||||
<Attribute>template</Attribute>
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<Category>source</Category>
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<Condition>C Exe</Condition>
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<FileContentHash>SJgCZe88oMZvgSxZz+Ly/A==</FileContentHash>
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<FileVersion></FileVersion>
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<Name>templates/main.c</Name>
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||||
<SelectString>Main file (.c)</SelectString>
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||||
<SourcePath></SourcePath>
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</d4p1:anyType>
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||||
<d4p1:anyType i:type="FileInfo">
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<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\templates\main.cpp</AbsolutePath>
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<Attribute>template</Attribute>
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<Category>source</Category>
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<Condition>C Exe</Condition>
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<FileContentHash>Wwcf/gxegRQ10+cCzYcFIw==</FileContentHash>
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<FileVersion></FileVersion>
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<Name>templates/main.cpp</Name>
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<SelectString>Main file (.cpp)</SelectString>
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<SourcePath></SourcePath>
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||||
</d4p1:anyType>
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||||
<d4p1:anyType i:type="FileInfo">
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<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\gcc\system_same54.c</AbsolutePath>
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<Attribute>config</Attribute>
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<Category>source</Category>
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<Condition>GCC Exe</Condition>
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<FileContentHash>13EKFJ9ZysfwBWEbJglN5Q==</FileContentHash>
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<FileVersion></FileVersion>
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<Name>gcc/system_same54.c</Name>
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||||
<SelectString></SelectString>
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||||
<SourcePath></SourcePath>
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||||
</d4p1:anyType>
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||||
<d4p1:anyType i:type="FileInfo">
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<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\gcc\gcc\startup_same54.c</AbsolutePath>
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||||
<Attribute>config</Attribute>
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<Category>source</Category>
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<Condition>GCC Exe</Condition>
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||||
<FileContentHash>hvyBThCuEBmDbH8Yhxa2Jw==</FileContentHash>
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||||
<FileVersion></FileVersion>
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<Name>gcc/gcc/startup_same54.c</Name>
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||||
<SelectString></SelectString>
|
||||
<SourcePath></SourcePath>
|
||||
</d4p1:anyType>
|
||||
<d4p1:anyType i:type="FileInfo">
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||||
<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\gcc\gcc\same54p20a_flash.ld</AbsolutePath>
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||||
<Attribute>config</Attribute>
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<Category>linkerScript</Category>
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<FileContentHash>KxZPrZpayTyit24vDXKm8w==</FileContentHash>
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<AbsolutePath>C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\SAME54_DFP\1.1.134\gcc\gcc\same54p20a_sram.ld</AbsolutePath>
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<Category>other</Category>
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<FileContentHash>+7n8kxIwTIMsWzB2gEYtIg==</FileContentHash>
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<Name>gcc/gcc/same54p20a_sram.ld</Name>
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||||
<SelectString></SelectString>
|
||||
<SourcePath></SourcePath>
|
||||
</d4p1:anyType>
|
||||
</Files>
|
||||
<PackName>SAME54_DFP</PackName>
|
||||
<PackPath>C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/SAME54_DFP/1.1.134/Atmel.SAME54_DFP.pdsc</PackPath>
|
||||
<PackVersion>1.1.134</PackVersion>
|
||||
<PresentInProject>true</PresentInProject>
|
||||
<ReferenceConditionId>ATSAME54P20A</ReferenceConditionId>
|
||||
<RteComponents xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:string></d4p1:string>
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||||
</RteComponents>
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<Status>Resolved</Status>
|
||||
<VersionMode>Fixed</VersionMode>
|
||||
<IsComponentInAtProject>true</IsComponentInAtProject>
|
||||
</ProjectComponent>
|
||||
</ProjectComponents>
|
||||
</Store>
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,54 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Autogenerated API include file for the Atmel Configuration Management Engine (ACME)
|
||||
*
|
||||
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \acme_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \acme_license_stop
|
||||
*
|
||||
* Project: BLCD_E54v2
|
||||
* Target: ATSAME54P20A
|
||||
*
|
||||
**/
|
||||
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
#define ATMEL_START
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
|
|
@ -0,0 +1,302 @@
|
|||
/* Auto-generated config file hpl_adc_config.h */
|
||||
#ifndef HPL_ADC_CONFIG_H
|
||||
#define HPL_ADC_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
#ifndef CONF_ADC_0_ENABLE
|
||||
#define CONF_ADC_0_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <h> Basic Configuration
|
||||
|
||||
// <o> Conversion Result Resolution
|
||||
// <0x0=>12-bit
|
||||
// <0x1=>16-bit (averaging must be enabled)
|
||||
// <0x2=>10-bit
|
||||
// <0x3=>8-bit
|
||||
// <i> Defines the bit resolution for the ADC sample values (RESSEL)
|
||||
// <id> adc_resolution
|
||||
#ifndef CONF_ADC_0_RESSEL
|
||||
#define CONF_ADC_0_RESSEL 0x0
|
||||
#endif
|
||||
|
||||
// <o> Reference Selection
|
||||
// <0x0=>Internal bandgap reference
|
||||
// <0x2=>1/2 VDDANA (only for VDDANA > 2.0V)
|
||||
// <0x3=>VDDANA
|
||||
// <0x4=>External reference A
|
||||
// <0x5=>External reference B
|
||||
// <0x6=>External reference C
|
||||
// <i> Select the reference for the ADC (REFSEL)
|
||||
// <id> adc_reference
|
||||
#ifndef CONF_ADC_0_REFSEL
|
||||
#define CONF_ADC_0_REFSEL 0x3
|
||||
#endif
|
||||
|
||||
// <o> Prescaler configuration
|
||||
// <0x0=>Peripheral clock divided by 2
|
||||
// <0x1=>Peripheral clock divided by 4
|
||||
// <0x2=>Peripheral clock divided by 8
|
||||
// <0x3=>Peripheral clock divided by 16
|
||||
// <0x4=>Peripheral clock divided by 32
|
||||
// <0x5=>Peripheral clock divided by 64
|
||||
// <0x6=>Peripheral clock divided by 128
|
||||
// <0x7=>Peripheral clock divided by 256
|
||||
// <i> These bits define the ADC clock relative to the peripheral clock (PRESCALER)
|
||||
// <id> adc_prescaler
|
||||
#ifndef CONF_ADC_0_PRESCALER
|
||||
#define CONF_ADC_0_PRESCALER 0x2
|
||||
#endif
|
||||
|
||||
// <q> Free Running Mode
|
||||
// <i> When enabled, the ADC is in free running mode and a new conversion will be initiated when a previous conversion completes. (FREERUN)
|
||||
// <id> adc_freerunning_mode
|
||||
#ifndef CONF_ADC_0_FREERUN
|
||||
#define CONF_ADC_0_FREERUN 0
|
||||
#endif
|
||||
|
||||
// <q> Differential Mode
|
||||
// <i> In differential mode, the voltage difference between the MUXPOS and MUXNEG inputs will be converted by the ADC. (DIFFMODE)
|
||||
// <id> adc_differential_mode
|
||||
#ifndef CONF_ADC_0_DIFFMODE
|
||||
#define CONF_ADC_0_DIFFMODE 0
|
||||
#endif
|
||||
|
||||
// <o> Positive Mux Input Selection
|
||||
// <0x00=>ADC AIN0 pin
|
||||
// <0x01=>ADC AIN1 pin
|
||||
// <0x02=>ADC AIN2 pin
|
||||
// <0x03=>ADC AIN3 pin
|
||||
// <0x04=>ADC AIN4 pin
|
||||
// <0x05=>ADC AIN5 pin
|
||||
// <0x06=>ADC AIN6 pin
|
||||
// <0x07=>ADC AIN7 pin
|
||||
// <0x08=>ADC AIN8 pin
|
||||
// <0x09=>ADC AIN9 pin
|
||||
// <0x0A=>ADC AIN10 pin
|
||||
// <0x0B=>ADC AIN11 pin
|
||||
// <0x0C=>ADC AIN12 pin
|
||||
// <0x0D=>ADC AIN13 pin
|
||||
// <0x0E=>ADC AIN14 pin
|
||||
// <0x0F=>ADC AIN15 pin
|
||||
// <0x18=>1/4 scaled core supply
|
||||
// <0x19=>1/4 Scaled VBAT Supply
|
||||
// <0x1A=>1/4 scaled I/O supply
|
||||
// <0x1B=>Bandgap voltage
|
||||
// <0x1C=>Temperature reference (PTAT)
|
||||
// <0x1D=>Temperature reference (CTAT)
|
||||
// <0x1E=>DAC Output
|
||||
// <i> These bits define the Mux selection for the positive ADC input. (MUXPOS)
|
||||
// <id> adc_pinmux_positive
|
||||
#ifndef CONF_ADC_0_MUXPOS
|
||||
#define CONF_ADC_0_MUXPOS 0x2
|
||||
#endif
|
||||
|
||||
// <o> Negative Mux Input Selection
|
||||
// <0x00=>ADC AIN0 pin
|
||||
// <0x01=>ADC AIN1 pin
|
||||
// <0x02=>ADC AIN2 pin
|
||||
// <0x03=>ADC AIN3 pin
|
||||
// <0x04=>ADC AIN4 pin
|
||||
// <0x05=>ADC AIN5 pin
|
||||
// <0x06=>ADC AIN6 pin
|
||||
// <0x07=>ADC AIN7 pin
|
||||
// <0x18=>Internal ground
|
||||
// <i> These bits define the Mux selection for the negative ADC input. (MUXNEG)
|
||||
// <id> adc_pinmux_negative
|
||||
#ifndef CONF_ADC_0_MUXNEG
|
||||
#define CONF_ADC_0_MUXNEG 0x18
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// <e> Advanced Configuration
|
||||
// <id> adc_advanced_settings
|
||||
#ifndef CONF_ADC_0_ADVANCED
|
||||
#define CONF_ADC_0_ADVANCED 1
|
||||
#endif
|
||||
|
||||
// <q> Run in standby
|
||||
// <i> Indicates whether the ADC will continue running in standby sleep mode or not (RUNSTDBY)
|
||||
// <id> adc_arch_runstdby
|
||||
#ifndef CONF_ADC_0_RUNSTDBY
|
||||
#define CONF_ADC_0_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q>Debug Run
|
||||
// <i> If enabled, the ADC is running if the CPU is halted by an external debugger. (DBGRUN)
|
||||
// <id> adc_arch_dbgrun
|
||||
#ifndef CONF_ADC_0_DBGRUN
|
||||
#define CONF_ADC_0_DBGRUN 0
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Will keep the ADC peripheral running if requested by other peripherals (ONDEMAND)
|
||||
// <id> adc_arch_ondemand
|
||||
#ifndef CONF_ADC_0_ONDEMAND
|
||||
#define CONF_ADC_0_ONDEMAND 0
|
||||
#endif
|
||||
|
||||
// <q> Left-Adjusted Result
|
||||
// <i> When enabled, the ADC conversion result is left-adjusted in the RESULT register. The high byte of the 12-bit result will be present in the upper part of the result register. (LEFTADJ)
|
||||
// <id> adc_arch_leftadj
|
||||
#ifndef CONF_ADC_0_LEFTADJ
|
||||
#define CONF_ADC_0_LEFTADJ 0
|
||||
#endif
|
||||
|
||||
// <q> Reference Buffer Offset Compensation Enable
|
||||
// <i> The accuracy of the gain stage can be increased by enabling the reference buffer offset compensation. This will decrease the input impedance and thus increase the start-up time of the reference. (REFCOMP)
|
||||
// <id> adc_arch_refcomp
|
||||
#ifndef CONF_ADC_0_REFCOMP
|
||||
#define CONF_ADC_0_REFCOMP 0
|
||||
#endif
|
||||
|
||||
// <q>Comparator Offset Compensation Enable
|
||||
// <i> This bit indicates whether the Comparator Offset Compensation is enabled or not (OFFCOMP)
|
||||
// <id> adc_arch_offcomp
|
||||
#ifndef CONF_ADC_0_OFFCOMP
|
||||
#define CONF_ADC_0_OFFCOMP 0
|
||||
#endif
|
||||
|
||||
// <q> Digital Correction Logic Enabled
|
||||
// <i> When enabled, the ADC conversion result in the RESULT register is then corrected for gain and offset based on the values in the GAINCAL and OFFSETCAL registers. (CORREN)
|
||||
// <id> adc_arch_corren
|
||||
#ifndef CONF_ADC_0_CORREN
|
||||
#define CONF_ADC_0_CORREN 0
|
||||
#endif
|
||||
|
||||
// <o> Offset Correction Value <0-4095>
|
||||
// <i> If the digital correction logic is enabled (CTRLB.CORREN = 1), these bits define how the ADC conversion result is compensated for offset error before being written to the Result register. (OFFSETCORR)
|
||||
// <id> adc_arch_offsetcorr
|
||||
#ifndef CONF_ADC_0_OFFSETCORR
|
||||
#define CONF_ADC_0_OFFSETCORR 0
|
||||
#endif
|
||||
|
||||
// <o> Gain Correction Value <0-4095>
|
||||
// <i> If the digital correction logic is enabled (CTRLB.CORREN = 1), these bits define how the ADC conversion result is compensated for gain error before being written to the result register. (GAINCORR)
|
||||
// <id> adc_arch_gaincorr
|
||||
#ifndef CONF_ADC_0_GAINCORR
|
||||
#define CONF_ADC_0_GAINCORR 0
|
||||
#endif
|
||||
|
||||
// <o> Adjusting Result / Division Coefficient <0-7>
|
||||
// <i> These bits define the division coefficient in 2n steps. (ADJRES)
|
||||
// <id> adc_arch_adjres
|
||||
#ifndef CONF_ADC_0_ADJRES
|
||||
#define CONF_ADC_0_ADJRES 0x0
|
||||
#endif
|
||||
|
||||
// <o.0..10> Number of Samples to be Collected
|
||||
// <0x0=>1 sample
|
||||
// <0x1=>2 samples
|
||||
// <0x2=>4 samples
|
||||
// <0x3=>8 samples
|
||||
// <0x4=>16 samples
|
||||
// <0x5=>32 samples
|
||||
// <0x6=>64 samples
|
||||
// <0x7=>128 samples
|
||||
// <0x8=>256 samples
|
||||
// <0x9=>512 samples
|
||||
// <0xA=>1024 samples
|
||||
// <i> Define how many samples should be added together.The result will be available in the Result register (SAMPLENUM)
|
||||
// <id> adc_arch_samplenum
|
||||
#ifndef CONF_ADC_0_SAMPLENUM
|
||||
#define CONF_ADC_0_SAMPLENUM 0x0
|
||||
#endif
|
||||
|
||||
// <o> Sampling Time Length <0-63>
|
||||
// <i> These bits control the ADC sampling time in number of CLK_ADC cycles, depending of the prescaler value, thus controlling the ADC input impedance. (SAMPLEN)
|
||||
// <id> adc_arch_samplen
|
||||
#ifndef CONF_ADC_0_SAMPLEN
|
||||
#define CONF_ADC_0_SAMPLEN 3
|
||||
#endif
|
||||
|
||||
// <o> Window Monitor Mode
|
||||
// <0x0=>No window mode
|
||||
// <0x1=>Mode 1: RESULT above lower threshold
|
||||
// <0x2=>Mode 2: RESULT beneath upper threshold
|
||||
// <0x3=>Mode 3: RESULT inside lower and upper threshold
|
||||
// <0x4=>Mode 4: RESULT outside lower and upper threshold
|
||||
// <i> These bits enable and define the window monitor mode. (WINMODE)
|
||||
// <id> adc_arch_winmode
|
||||
#ifndef CONF_ADC_0_WINMODE
|
||||
#define CONF_ADC_0_WINMODE 0x0
|
||||
#endif
|
||||
|
||||
// <o> Window Monitor Lower Threshold <0-65535>
|
||||
// <i> If the window monitor is enabled, these bits define the lower threshold value. (WINLT)
|
||||
// <id> adc_arch_winlt
|
||||
#ifndef CONF_ADC_0_WINLT
|
||||
#define CONF_ADC_0_WINLT 0
|
||||
#endif
|
||||
|
||||
// <o> Window Monitor Upper Threshold <0-65535>
|
||||
// <i> If the window monitor is enabled, these bits define the lower threshold value. (WINUT)
|
||||
// <id> adc_arch_winut
|
||||
#ifndef CONF_ADC_0_WINUT
|
||||
#define CONF_ADC_0_WINUT 0
|
||||
#endif
|
||||
|
||||
// <o> Bitmask for positive input sequence <0-4294967295>
|
||||
// <i> Use this parameter to input the bitmask for positive input sequence control (refer to datasheet for the device).
|
||||
// <id> adc_arch_seqen
|
||||
#ifndef CONF_ADC_0_SEQEN
|
||||
#define CONF_ADC_0_SEQEN 0x0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <e> Event Control
|
||||
// <id> adc_arch_event_settings
|
||||
#ifndef CONF_ADC_0_EVENT_CONTROL
|
||||
#define CONF_ADC_0_EVENT_CONTROL 1
|
||||
#endif
|
||||
|
||||
// <q> Window Monitor Event Out
|
||||
// <i> Enables event output on window event (WINMONEO)
|
||||
// <id> adc_arch_winmoneo
|
||||
#ifndef CONF_ADC_0_WINMONEO
|
||||
#define CONF_ADC_0_WINMONEO 0
|
||||
#endif
|
||||
|
||||
// <q> Result Ready Event Out
|
||||
// <i> Enables event output on result ready event (RESRDEO)
|
||||
// <id> adc_arch_resrdyeo
|
||||
#ifndef CONF_ADC_0_RESRDYEO
|
||||
#define CONF_ADC_0_RESRDYEO 1
|
||||
#endif
|
||||
|
||||
// <q> Invert flush Event Signal
|
||||
// <i> Invert the flush event input signal (FLUSHINV)
|
||||
// <id> adc_arch_flushinv
|
||||
#ifndef CONF_ADC_0_FLUSHINV
|
||||
#define CONF_ADC_0_FLUSHINV 0
|
||||
#endif
|
||||
|
||||
// <q> Trigger Flush On Event
|
||||
// <i> Trigger an ADC pipeline flush on event (FLUSHEI)
|
||||
// <id> adc_arch_flushei
|
||||
#ifndef CONF_ADC_0_FLUSHEI
|
||||
#define CONF_ADC_0_FLUSHEI 0
|
||||
#endif
|
||||
|
||||
// <q> Invert Start Conversion Event Signal
|
||||
// <i> Invert the start conversion event input signal (STARTINV)
|
||||
// <id> adc_arch_startinv
|
||||
#ifndef CONF_ADC_0_STARTINV
|
||||
#define CONF_ADC_0_STARTINV 0
|
||||
#endif
|
||||
|
||||
// <q> Trigger Conversion On Event
|
||||
// <i> Trigger a conversion on event. (STARTEI)
|
||||
// <id> adc_arch_startei
|
||||
#ifndef CONF_ADC_0_STARTEI
|
||||
#define CONF_ADC_0_STARTEI 0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_ADC_CONFIG_H
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
/* Auto-generated config file hpl_ccl_config.h */
|
||||
#ifndef HPL_CCL_CONFIG_H
|
||||
#define HPL_CCL_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <o> Sequential Control Logic 0
|
||||
// <0x0=> Sequential logic is disabled
|
||||
// <0x1=> D flip flop
|
||||
// <0x2=> JK flip flop
|
||||
// <0x3=> D latch
|
||||
// <0x4=> RS latch
|
||||
// <i> Selects mode for sequential module 0
|
||||
// <id> ccl_arch_seqsel_0
|
||||
#ifndef CONF_CCL_SEQSEL_0
|
||||
#define CONF_CCL_SEQSEL_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> Sequential Control Logic 1
|
||||
// <0x0=> Sequential logic is disabled
|
||||
// <0x1=> D flip flop
|
||||
// <0x2=> JK flip flop
|
||||
// <0x3=> D latch
|
||||
// <0x4=> RS latch
|
||||
// <i> Selects mode for sequential module 1
|
||||
// <id> ccl_arch_seqsel_1
|
||||
#ifndef CONF_CCL_SEQSEL_1
|
||||
#define CONF_CCL_SEQSEL_1 0x0
|
||||
#endif
|
||||
|
||||
// <e> Lookup Table Control 0
|
||||
// <i> Enable and setup the lookup table module 0
|
||||
// <id> ccl_arch_lutctrl0
|
||||
#ifndef CONF_CCL_LUTCTRL_EN_0
|
||||
#define CONF_CCL_LUTCTRL_EN_0 1
|
||||
#endif
|
||||
|
||||
// <o> Truth Table <0x00-0xFF>
|
||||
// <i> Define the value of truth logic according to inputs IN[2:0]
|
||||
// <id> ccl_arch_truth_0
|
||||
#ifndef CONF_CCL_TRUTH_0
|
||||
#define CONF_CCL_TRUTH_0 0x96
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 0
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel0_0
|
||||
#ifndef CONF_CCL_INSEL0_0
|
||||
#define CONF_CCL_INSEL0_0 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 1
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel1_0
|
||||
#ifndef CONF_CCL_INSEL1_0
|
||||
#define CONF_CCL_INSEL1_0 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 2
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel2_0
|
||||
#ifndef CONF_CCL_INSEL2_0
|
||||
#define CONF_CCL_INSEL2_0 0x4
|
||||
#endif
|
||||
|
||||
// <q> Edge detector enable
|
||||
// <id> ccl_arch_edgesel_0
|
||||
#ifndef CONF_CCL_EDGESEL_0
|
||||
#define CONF_CCL_EDGESEL_0 0
|
||||
#endif
|
||||
|
||||
// <o> Output Filter
|
||||
// <0x0=> Disabled
|
||||
// <0x1=> Synchronizer Enabled
|
||||
// <0x2=> Filter Enabled
|
||||
// <id> ccl_arch_filtsel_0
|
||||
#ifndef CONF_CCL_FILTSEL_0
|
||||
#define CONF_CCL_FILTSEL_0 0x0
|
||||
#endif
|
||||
|
||||
// <h> Event settings 0
|
||||
|
||||
// <q> Event output enable
|
||||
// <id> ccl_arch_luteo_0
|
||||
#ifndef CONF_CCL_LUTEO_0
|
||||
#define CONF_CCL_LUTEO_0 1
|
||||
#endif
|
||||
|
||||
// <q> Event input enable
|
||||
// <id> ccl_arch_lutei_0
|
||||
#ifndef CONF_CCL_LUTEI_0
|
||||
#define CONF_CCL_LUTEI_0 0
|
||||
#endif
|
||||
|
||||
// <q> Event input invert
|
||||
// <id> ccl_arch_invei_0
|
||||
#ifndef CONF_CCL_INVEI_0
|
||||
#define CONF_CCL_INVEI_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <hidden> Persistance settings 0
|
||||
|
||||
// <s> Expression Persistance
|
||||
// <id> ccl_e_persistance_0
|
||||
#define EXPRESSION_PERSISTANCE_0 ""
|
||||
|
||||
// <s> Logic Persistance
|
||||
// <id> ccl_l_persistance_0
|
||||
#define LOGIC_PERSISTANCE_0 ""
|
||||
|
||||
// </hidden>
|
||||
|
||||
// <e> Lookup Table Control 1
|
||||
// <i> Enable and setup the lookup table module 1
|
||||
// <id> ccl_arch_lutctrl1
|
||||
#ifndef CONF_CCL_LUTCTRL_EN_1
|
||||
#define CONF_CCL_LUTCTRL_EN_1 0
|
||||
#endif
|
||||
|
||||
// <o> Truth Table <0x00-0xFF>
|
||||
// <i> Define the value of truth logic according to inputs IN[2:0]
|
||||
// <id> ccl_arch_truth_1
|
||||
#ifndef CONF_CCL_TRUTH_1
|
||||
#define CONF_CCL_TRUTH_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 0
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel0_1
|
||||
#ifndef CONF_CCL_INSEL0_1
|
||||
#define CONF_CCL_INSEL0_1 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 1
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel1_1
|
||||
#ifndef CONF_CCL_INSEL1_1
|
||||
#define CONF_CCL_INSEL1_1 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 2
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel2_1
|
||||
#ifndef CONF_CCL_INSEL2_1
|
||||
#define CONF_CCL_INSEL2_1 0x4
|
||||
#endif
|
||||
|
||||
// <q> Edge detector enable
|
||||
// <id> ccl_arch_edgesel_1
|
||||
#ifndef CONF_CCL_EDGESEL_1
|
||||
#define CONF_CCL_EDGESEL_1 0
|
||||
#endif
|
||||
|
||||
// <o> Output Filter
|
||||
// <0x0=> Disabled
|
||||
// <0x1=> Synchronizer Enabled
|
||||
// <0x2=> Filter Enabled
|
||||
// <id> ccl_arch_filtsel_1
|
||||
#ifndef CONF_CCL_FILTSEL_1
|
||||
#define CONF_CCL_FILTSEL_1 0x0
|
||||
#endif
|
||||
|
||||
// <h> Event settings 1
|
||||
|
||||
// <q> Event output enable
|
||||
// <id> ccl_arch_luteo_1
|
||||
#ifndef CONF_CCL_LUTEO_1
|
||||
#define CONF_CCL_LUTEO_1 0
|
||||
#endif
|
||||
|
||||
// <q> Event input enable
|
||||
// <id> ccl_arch_lutei_1
|
||||
#ifndef CONF_CCL_LUTEI_1
|
||||
#define CONF_CCL_LUTEI_1 0
|
||||
#endif
|
||||
|
||||
// <q> Event input invert
|
||||
// <id> ccl_arch_invei_1
|
||||
#ifndef CONF_CCL_INVEI_1
|
||||
#define CONF_CCL_INVEI_1 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <hidden> Persistance settings 1
|
||||
|
||||
// <s> Expression Persistance
|
||||
// <id> ccl_e_persistance_1
|
||||
#define EXPRESSION_PERSISTANCE_1 ""
|
||||
|
||||
// <s> Logic Persistance
|
||||
// <id> ccl_l_persistance_1
|
||||
#define LOGIC_PERSISTANCE_1 ""
|
||||
|
||||
// </hidden>
|
||||
|
||||
// <e> Lookup Table Control 2
|
||||
// <i> Enable and setup the lookup table module 2
|
||||
// <id> ccl_arch_lutctrl2
|
||||
#ifndef CONF_CCL_LUTCTRL_EN_2
|
||||
#define CONF_CCL_LUTCTRL_EN_2 0
|
||||
#endif
|
||||
|
||||
// <o> Truth Table <0x00-0xFF>
|
||||
// <i> Define the value of truth logic according to inputs IN[2:0]
|
||||
// <id> ccl_arch_truth_2
|
||||
#ifndef CONF_CCL_TRUTH_2
|
||||
#define CONF_CCL_TRUTH_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 0
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel0_2
|
||||
#ifndef CONF_CCL_INSEL0_2
|
||||
#define CONF_CCL_INSEL0_2 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 1
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel1_2
|
||||
#ifndef CONF_CCL_INSEL1_2
|
||||
#define CONF_CCL_INSEL1_2 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 2
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel2_2
|
||||
#ifndef CONF_CCL_INSEL2_2
|
||||
#define CONF_CCL_INSEL2_2 0x4
|
||||
#endif
|
||||
|
||||
// <q> Edge detector enable
|
||||
// <id> ccl_arch_edgesel_2
|
||||
#ifndef CONF_CCL_EDGESEL_2
|
||||
#define CONF_CCL_EDGESEL_2 0
|
||||
#endif
|
||||
|
||||
// <o> Output Filter
|
||||
// <0x0=> Disabled
|
||||
// <0x1=> Synchronizer Enabled
|
||||
// <0x2=> Filter Enabled
|
||||
// <id> ccl_arch_filtsel_2
|
||||
#ifndef CONF_CCL_FILTSEL_2
|
||||
#define CONF_CCL_FILTSEL_2 0x0
|
||||
#endif
|
||||
|
||||
// <h> Event settings 2
|
||||
|
||||
// <q> Event output enable
|
||||
// <id> ccl_arch_luteo_2
|
||||
#ifndef CONF_CCL_LUTEO_2
|
||||
#define CONF_CCL_LUTEO_2 0
|
||||
#endif
|
||||
|
||||
// <q> Event input enable
|
||||
// <id> ccl_arch_lutei_2
|
||||
#ifndef CONF_CCL_LUTEI_2
|
||||
#define CONF_CCL_LUTEI_2 0
|
||||
#endif
|
||||
|
||||
// <q> Event input invert
|
||||
// <id> ccl_arch_invei_2
|
||||
#ifndef CONF_CCL_INVEI_2
|
||||
#define CONF_CCL_INVEI_2 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <hidden> Persistance settings 2
|
||||
|
||||
// <s> Expression Persistance
|
||||
// <id> ccl_e_persistance_2
|
||||
#define EXPRESSION_PERSISTANCE_2 ""
|
||||
|
||||
// <s> Logic Persistance
|
||||
// <id> ccl_l_persistance_2
|
||||
#define LOGIC_PERSISTANCE_2 ""
|
||||
|
||||
// </hidden>
|
||||
|
||||
// <e> Lookup Table Control 3
|
||||
// <i> Enable and setup the lookup table module 3
|
||||
// <id> ccl_arch_lutctrl3
|
||||
#ifndef CONF_CCL_LUTCTRL_EN_3
|
||||
#define CONF_CCL_LUTCTRL_EN_3 0
|
||||
#endif
|
||||
|
||||
// <o> Truth Table <0x00-0xFF>
|
||||
// <i> Define the value of truth logic according to inputs IN[2:0]
|
||||
// <id> ccl_arch_truth_3
|
||||
#ifndef CONF_CCL_TRUTH_3
|
||||
#define CONF_CCL_TRUTH_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 0
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel0_3
|
||||
#ifndef CONF_CCL_INSEL0_3
|
||||
#define CONF_CCL_INSEL0_3 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 1
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel1_3
|
||||
#ifndef CONF_CCL_INSEL1_3
|
||||
#define CONF_CCL_INSEL1_3 0x4
|
||||
#endif
|
||||
|
||||
// <o> Input Source Selection 2
|
||||
// <0x0=> Masked input
|
||||
// <0x1=> Feedback input source
|
||||
// <0x2=> Linked LookUpTable input source
|
||||
// <0x3=> Event input source
|
||||
// <0x4=> IO pin input source
|
||||
// <0x5=> AC input source
|
||||
// <0x6=> TC input source
|
||||
// <0x7=> Alternative TC input source
|
||||
// <0x8=> TCC input source
|
||||
// <0x9=> SERCOM input source
|
||||
// <id> ccl_arch_insel2_3
|
||||
#ifndef CONF_CCL_INSEL2_3
|
||||
#define CONF_CCL_INSEL2_3 0x4
|
||||
#endif
|
||||
|
||||
// <q> Edge detector enable
|
||||
// <id> ccl_arch_edgesel_3
|
||||
#ifndef CONF_CCL_EDGESEL_3
|
||||
#define CONF_CCL_EDGESEL_3 0
|
||||
#endif
|
||||
|
||||
// <o> Output Filter
|
||||
// <0x0=> Disabled
|
||||
// <0x1=> Synchronizer Enabled
|
||||
// <0x2=> Filter Enabled
|
||||
// <id> ccl_arch_filtsel_3
|
||||
#ifndef CONF_CCL_FILTSEL_3
|
||||
#define CONF_CCL_FILTSEL_3 0x0
|
||||
#endif
|
||||
|
||||
// <h> Event settings 3
|
||||
|
||||
// <q> Event output enable
|
||||
// <id> ccl_arch_luteo_3
|
||||
#ifndef CONF_CCL_LUTEO_3
|
||||
#define CONF_CCL_LUTEO_3 0
|
||||
#endif
|
||||
|
||||
// <q> Event input enable
|
||||
// <id> ccl_arch_lutei_3
|
||||
#ifndef CONF_CCL_LUTEI_3
|
||||
#define CONF_CCL_LUTEI_3 0
|
||||
#endif
|
||||
|
||||
// <q> Event input invert
|
||||
// <id> ccl_arch_invei_3
|
||||
#ifndef CONF_CCL_INVEI_3
|
||||
#define CONF_CCL_INVEI_3 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <hidden> Persistance settings 3
|
||||
|
||||
// <s> Expression Persistance
|
||||
// <id> ccl_e_persistance_3
|
||||
#define EXPRESSION_PERSISTANCE_3 ""
|
||||
|
||||
// <s> Logic Persistance
|
||||
// <id> ccl_l_persistance_3
|
||||
#define LOGIC_PERSISTANCE_3 ""
|
||||
|
||||
// </hidden>
|
||||
|
||||
// <e> Advanced configurations
|
||||
// <id> ccl_arch_advanced_settings
|
||||
#ifndef CONF_CCL_ADVANCED
|
||||
#define CONF_CCL_ADVANCED 0
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <id> ccl_arch_runstdby
|
||||
#ifndef CONF_CCL_RUNSTDBY
|
||||
#define CONF_CCL_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_CCL_CONFIG_H
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
/* Auto-generated config file hpl_cmcc_config.h */
|
||||
#ifndef HPL_CMCC_CONFIG_H
|
||||
#define HPL_CMCC_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Basic Configuration
|
||||
|
||||
// <q> Cache enable
|
||||
//<i> Defines the cache should be enabled or not.
|
||||
// <id> cmcc_enable
|
||||
#ifndef CONF_CMCC_ENABLE
|
||||
#define CONF_CMCC_ENABLE 0x0
|
||||
#endif
|
||||
|
||||
// <o> Cache Size
|
||||
//<i> Defines the cache memory size to be configured.
|
||||
// <0x0=>1 KB
|
||||
// <0x1=>2 KB
|
||||
// <0x2=>4 KB
|
||||
// <id> cache_size
|
||||
#ifndef CONF_CMCC_CACHE_SIZE
|
||||
#define CONF_CMCC_CACHE_SIZE 0x2
|
||||
#endif
|
||||
|
||||
// <e> Advanced Configuration
|
||||
// <id> cmcc_advanced_configuration
|
||||
// <q> Data cache disable
|
||||
//<i> Defines the data cache should be disabled or not.
|
||||
// <id> cmcc_data_cache_disable
|
||||
#ifndef CONF_CMCC_DATA_CACHE_DISABLE
|
||||
#define CONF_CMCC_DATA_CACHE_DISABLE 0x0
|
||||
#endif
|
||||
|
||||
// <q> Instruction cache disable
|
||||
//<i> Defines the Instruction cache should be disabled or not.
|
||||
// <id> cmcc_inst_cache_disable
|
||||
#ifndef CONF_CMCC_INST_CACHE_DISABLE
|
||||
#define CONF_CMCC_INST_CACHE_DISABLE 0x0
|
||||
#endif
|
||||
|
||||
// <q> Clock Gating disable
|
||||
//<i> Defines the clock gating should be disabled or not.
|
||||
// <id> cmcc_clock_gating_disable
|
||||
#ifndef CONF_CMCC_CLK_GATING_DISABLE
|
||||
#define CONF_CMCC_CLK_GATING_DISABLE 0x0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_CMCC_CONFIG_H
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,920 @@
|
|||
/* Auto-generated config file hpl_gclk_config.h */
|
||||
#ifndef HPL_GCLK_CONFIG_H
|
||||
#define HPL_GCLK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <e> Generic clock generator 0 configuration
|
||||
// <i> Indicates whether generic clock 0 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_0
|
||||
#ifndef CONF_GCLK_GENERATOR_0_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_0_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 0 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 0
|
||||
// <id> gclk_gen_0_oscillator
|
||||
#ifndef CONF_GCLK_GEN_0_SOURCE
|
||||
#define CONF_GCLK_GEN_0_SOURCE GCLK_GENCTRL_SRC_DPLL1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_0_runstdby
|
||||
#ifndef CONF_GCLK_GEN_0_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_0_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_0_div_sel
|
||||
#ifndef CONF_GCLK_GEN_0_DIVSEL
|
||||
#define CONF_GCLK_GEN_0_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_0_oe
|
||||
#ifndef CONF_GCLK_GEN_0_OE
|
||||
#define CONF_GCLK_GEN_0_OE 1
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_0_oov
|
||||
#ifndef CONF_GCLK_GEN_0_OOV
|
||||
#define CONF_GCLK_GEN_0_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_0_idc
|
||||
#ifndef CONF_GCLK_GEN_0_IDC
|
||||
#define CONF_GCLK_GEN_0_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_0_enable
|
||||
#ifndef CONF_GCLK_GEN_0_GENEN
|
||||
#define CONF_GCLK_GEN_0_GENEN 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 0 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_0_div
|
||||
#ifndef CONF_GCLK_GEN_0_DIV
|
||||
#define CONF_GCLK_GEN_0_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 1 configuration
|
||||
// <i> Indicates whether generic clock 1 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_1
|
||||
#ifndef CONF_GCLK_GENERATOR_1_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_1_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 1 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 1
|
||||
// <id> gclk_gen_1_oscillator
|
||||
#ifndef CONF_GCLK_GEN_1_SOURCE
|
||||
#define CONF_GCLK_GEN_1_SOURCE GCLK_GENCTRL_SRC_DFLL
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_1_runstdby
|
||||
#ifndef CONF_GCLK_GEN_1_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_1_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_1_div_sel
|
||||
#ifndef CONF_GCLK_GEN_1_DIVSEL
|
||||
#define CONF_GCLK_GEN_1_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_1_oe
|
||||
#ifndef CONF_GCLK_GEN_1_OE
|
||||
#define CONF_GCLK_GEN_1_OE 1
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_1_oov
|
||||
#ifndef CONF_GCLK_GEN_1_OOV
|
||||
#define CONF_GCLK_GEN_1_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_1_idc
|
||||
#ifndef CONF_GCLK_GEN_1_IDC
|
||||
#define CONF_GCLK_GEN_1_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_1_enable
|
||||
#ifndef CONF_GCLK_GEN_1_GENEN
|
||||
#define CONF_GCLK_GEN_1_GENEN 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 1 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_1_div
|
||||
#ifndef CONF_GCLK_GEN_1_DIV
|
||||
#define CONF_GCLK_GEN_1_DIV 24
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 2 configuration
|
||||
// <i> Indicates whether generic clock 2 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_2
|
||||
#ifndef CONF_GCLK_GENERATOR_2_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_2_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 2 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 2
|
||||
// <id> gclk_gen_2_oscillator
|
||||
#ifndef CONF_GCLK_GEN_2_SOURCE
|
||||
#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_OSCULP32K
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_2_runstdby
|
||||
#ifndef CONF_GCLK_GEN_2_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_2_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_2_div_sel
|
||||
#ifndef CONF_GCLK_GEN_2_DIVSEL
|
||||
#define CONF_GCLK_GEN_2_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_2_oe
|
||||
#ifndef CONF_GCLK_GEN_2_OE
|
||||
#define CONF_GCLK_GEN_2_OE 1
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_2_oov
|
||||
#ifndef CONF_GCLK_GEN_2_OOV
|
||||
#define CONF_GCLK_GEN_2_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_2_idc
|
||||
#ifndef CONF_GCLK_GEN_2_IDC
|
||||
#define CONF_GCLK_GEN_2_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_2_enable
|
||||
#ifndef CONF_GCLK_GEN_2_GENEN
|
||||
#define CONF_GCLK_GEN_2_GENEN 1
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 2 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_2_div
|
||||
#ifndef CONF_GCLK_GEN_2_DIV
|
||||
#define CONF_GCLK_GEN_2_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 3 configuration
|
||||
// <i> Indicates whether generic clock 3 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_3
|
||||
#ifndef CONF_GCLK_GENERATOR_3_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_3_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 3 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 3
|
||||
// <id> gclk_gen_3_oscillator
|
||||
#ifndef CONF_GCLK_GEN_3_SOURCE
|
||||
#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_3_runstdby
|
||||
#ifndef CONF_GCLK_GEN_3_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_3_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_3_div_sel
|
||||
#ifndef CONF_GCLK_GEN_3_DIVSEL
|
||||
#define CONF_GCLK_GEN_3_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_3_oe
|
||||
#ifndef CONF_GCLK_GEN_3_OE
|
||||
#define CONF_GCLK_GEN_3_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_3_oov
|
||||
#ifndef CONF_GCLK_GEN_3_OOV
|
||||
#define CONF_GCLK_GEN_3_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_3_idc
|
||||
#ifndef CONF_GCLK_GEN_3_IDC
|
||||
#define CONF_GCLK_GEN_3_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_3_enable
|
||||
#ifndef CONF_GCLK_GEN_3_GENEN
|
||||
#define CONF_GCLK_GEN_3_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 3 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_3_div
|
||||
#ifndef CONF_GCLK_GEN_3_DIV
|
||||
#define CONF_GCLK_GEN_3_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 4 configuration
|
||||
// <i> Indicates whether generic clock 4 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_4
|
||||
#ifndef CONF_GCLK_GENERATOR_4_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_4_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 4 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 4
|
||||
// <id> gclk_gen_4_oscillator
|
||||
#ifndef CONF_GCLK_GEN_4_SOURCE
|
||||
#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_4_runstdby
|
||||
#ifndef CONF_GCLK_GEN_4_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_4_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_4_div_sel
|
||||
#ifndef CONF_GCLK_GEN_4_DIVSEL
|
||||
#define CONF_GCLK_GEN_4_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_4_oe
|
||||
#ifndef CONF_GCLK_GEN_4_OE
|
||||
#define CONF_GCLK_GEN_4_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_4_oov
|
||||
#ifndef CONF_GCLK_GEN_4_OOV
|
||||
#define CONF_GCLK_GEN_4_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_4_idc
|
||||
#ifndef CONF_GCLK_GEN_4_IDC
|
||||
#define CONF_GCLK_GEN_4_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_4_enable
|
||||
#ifndef CONF_GCLK_GEN_4_GENEN
|
||||
#define CONF_GCLK_GEN_4_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 4 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_4_div
|
||||
#ifndef CONF_GCLK_GEN_4_DIV
|
||||
#define CONF_GCLK_GEN_4_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 5 configuration
|
||||
// <i> Indicates whether generic clock 5 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_5
|
||||
#ifndef CONF_GCLK_GENERATOR_5_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_5_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 5 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 5
|
||||
// <id> gclk_gen_5_oscillator
|
||||
#ifndef CONF_GCLK_GEN_5_SOURCE
|
||||
#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_5_runstdby
|
||||
#ifndef CONF_GCLK_GEN_5_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_5_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_5_div_sel
|
||||
#ifndef CONF_GCLK_GEN_5_DIVSEL
|
||||
#define CONF_GCLK_GEN_5_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_5_oe
|
||||
#ifndef CONF_GCLK_GEN_5_OE
|
||||
#define CONF_GCLK_GEN_5_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_5_oov
|
||||
#ifndef CONF_GCLK_GEN_5_OOV
|
||||
#define CONF_GCLK_GEN_5_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_5_idc
|
||||
#ifndef CONF_GCLK_GEN_5_IDC
|
||||
#define CONF_GCLK_GEN_5_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_5_enable
|
||||
#ifndef CONF_GCLK_GEN_5_GENEN
|
||||
#define CONF_GCLK_GEN_5_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 5 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_5_div
|
||||
#ifndef CONF_GCLK_GEN_5_DIV
|
||||
#define CONF_GCLK_GEN_5_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 6 configuration
|
||||
// <i> Indicates whether generic clock 6 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_6
|
||||
#ifndef CONF_GCLK_GENERATOR_6_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_6_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 6 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 6
|
||||
// <id> gclk_gen_6_oscillator
|
||||
#ifndef CONF_GCLK_GEN_6_SOURCE
|
||||
#define CONF_GCLK_GEN_6_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_6_runstdby
|
||||
#ifndef CONF_GCLK_GEN_6_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_6_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_6_div_sel
|
||||
#ifndef CONF_GCLK_GEN_6_DIVSEL
|
||||
#define CONF_GCLK_GEN_6_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_6_oe
|
||||
#ifndef CONF_GCLK_GEN_6_OE
|
||||
#define CONF_GCLK_GEN_6_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_6_oov
|
||||
#ifndef CONF_GCLK_GEN_6_OOV
|
||||
#define CONF_GCLK_GEN_6_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_6_idc
|
||||
#ifndef CONF_GCLK_GEN_6_IDC
|
||||
#define CONF_GCLK_GEN_6_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_6_enable
|
||||
#ifndef CONF_GCLK_GEN_6_GENEN
|
||||
#define CONF_GCLK_GEN_6_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 6 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_6_div
|
||||
#ifndef CONF_GCLK_GEN_6_DIV
|
||||
#define CONF_GCLK_GEN_6_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 7 configuration
|
||||
// <i> Indicates whether generic clock 7 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_7
|
||||
#ifndef CONF_GCLK_GENERATOR_7_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_7_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 7 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 7
|
||||
// <id> gclk_gen_7_oscillator
|
||||
#ifndef CONF_GCLK_GEN_7_SOURCE
|
||||
#define CONF_GCLK_GEN_7_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_7_runstdby
|
||||
#ifndef CONF_GCLK_GEN_7_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_7_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_7_div_sel
|
||||
#ifndef CONF_GCLK_GEN_7_DIVSEL
|
||||
#define CONF_GCLK_GEN_7_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_7_oe
|
||||
#ifndef CONF_GCLK_GEN_7_OE
|
||||
#define CONF_GCLK_GEN_7_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_7_oov
|
||||
#ifndef CONF_GCLK_GEN_7_OOV
|
||||
#define CONF_GCLK_GEN_7_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_7_idc
|
||||
#ifndef CONF_GCLK_GEN_7_IDC
|
||||
#define CONF_GCLK_GEN_7_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_7_enable
|
||||
#ifndef CONF_GCLK_GEN_7_GENEN
|
||||
#define CONF_GCLK_GEN_7_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 7 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_7_div
|
||||
#ifndef CONF_GCLK_GEN_7_DIV
|
||||
#define CONF_GCLK_GEN_7_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 8 configuration
|
||||
// <i> Indicates whether generic clock 8 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_8
|
||||
#ifndef CONF_GCLK_GENERATOR_8_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_8_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 8 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 8
|
||||
// <id> gclk_gen_8_oscillator
|
||||
#ifndef CONF_GCLK_GEN_8_SOURCE
|
||||
#define CONF_GCLK_GEN_8_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_8_runstdby
|
||||
#ifndef CONF_GCLK_GEN_8_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_8_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_8_div_sel
|
||||
#ifndef CONF_GCLK_GEN_8_DIVSEL
|
||||
#define CONF_GCLK_GEN_8_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_8_oe
|
||||
#ifndef CONF_GCLK_GEN_8_OE
|
||||
#define CONF_GCLK_GEN_8_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_8_oov
|
||||
#ifndef CONF_GCLK_GEN_8_OOV
|
||||
#define CONF_GCLK_GEN_8_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_8_idc
|
||||
#ifndef CONF_GCLK_GEN_8_IDC
|
||||
#define CONF_GCLK_GEN_8_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_8_enable
|
||||
#ifndef CONF_GCLK_GEN_8_GENEN
|
||||
#define CONF_GCLK_GEN_8_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 8 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_8_div
|
||||
#ifndef CONF_GCLK_GEN_8_DIV
|
||||
#define CONF_GCLK_GEN_8_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 9 configuration
|
||||
// <i> Indicates whether generic clock 9 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_9
|
||||
#ifndef CONF_GCLK_GENERATOR_9_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_9_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 9 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 9
|
||||
// <id> gclk_gen_9_oscillator
|
||||
#ifndef CONF_GCLK_GEN_9_SOURCE
|
||||
#define CONF_GCLK_GEN_9_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_9_runstdby
|
||||
#ifndef CONF_GCLK_GEN_9_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_9_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_9_div_sel
|
||||
#ifndef CONF_GCLK_GEN_9_DIVSEL
|
||||
#define CONF_GCLK_GEN_9_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_9_oe
|
||||
#ifndef CONF_GCLK_GEN_9_OE
|
||||
#define CONF_GCLK_GEN_9_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_9_oov
|
||||
#ifndef CONF_GCLK_GEN_9_OOV
|
||||
#define CONF_GCLK_GEN_9_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_9_idc
|
||||
#ifndef CONF_GCLK_GEN_9_IDC
|
||||
#define CONF_GCLK_GEN_9_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_9_enable
|
||||
#ifndef CONF_GCLK_GEN_9_GENEN
|
||||
#define CONF_GCLK_GEN_9_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 9 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_9_div
|
||||
#ifndef CONF_GCLK_GEN_9_DIV
|
||||
#define CONF_GCLK_GEN_9_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 10 configuration
|
||||
// <i> Indicates whether generic clock 10 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_10
|
||||
#ifndef CONF_GCLK_GENERATOR_10_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_10_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 10 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 10
|
||||
// <id> gclk_gen_10_oscillator
|
||||
#ifndef CONF_GCLK_GEN_10_SOURCE
|
||||
#define CONF_GCLK_GEN_10_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_10_runstdby
|
||||
#ifndef CONF_GCLK_GEN_10_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_10_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_10_div_sel
|
||||
#ifndef CONF_GCLK_GEN_10_DIVSEL
|
||||
#define CONF_GCLK_GEN_10_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_10_oe
|
||||
#ifndef CONF_GCLK_GEN_10_OE
|
||||
#define CONF_GCLK_GEN_10_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_10_oov
|
||||
#ifndef CONF_GCLK_GEN_10_OOV
|
||||
#define CONF_GCLK_GEN_10_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_10_idc
|
||||
#ifndef CONF_GCLK_GEN_10_IDC
|
||||
#define CONF_GCLK_GEN_10_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_10_enable
|
||||
#ifndef CONF_GCLK_GEN_10_GENEN
|
||||
#define CONF_GCLK_GEN_10_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 10 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_10_div
|
||||
#ifndef CONF_GCLK_GEN_10_DIV
|
||||
#define CONF_GCLK_GEN_10_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> Generic clock generator 11 configuration
|
||||
// <i> Indicates whether generic clock 11 configuration is enabled or not
|
||||
// <id> enable_gclk_gen_11
|
||||
#ifndef CONF_GCLK_GENERATOR_11_CONFIG
|
||||
#define CONF_GCLK_GENERATOR_11_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> Generic Clock Generator Control
|
||||
// <y> Generic clock generator 11 source
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad
|
||||
// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M)
|
||||
// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0)
|
||||
// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1)
|
||||
// <i> This defines the clock source for generic clock generator 11
|
||||
// <id> gclk_gen_11_oscillator
|
||||
#ifndef CONF_GCLK_GEN_11_SOURCE
|
||||
#define CONF_GCLK_GEN_11_SOURCE GCLK_GENCTRL_SRC_XOSC1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> gclk_arch_gen_11_runstdby
|
||||
#ifndef CONF_GCLK_GEN_11_RUNSTDBY
|
||||
#define CONF_GCLK_GEN_11_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Divide Selection
|
||||
// <i> Indicates whether Divide Selection is enabled or not
|
||||
//<id> gclk_gen_11_div_sel
|
||||
#ifndef CONF_GCLK_GEN_11_DIVSEL
|
||||
#define CONF_GCLK_GEN_11_DIVSEL 0
|
||||
#endif
|
||||
|
||||
// <q> Output Enable
|
||||
// <i> Indicates whether Output Enable is enabled or not
|
||||
// <id> gclk_arch_gen_11_oe
|
||||
#ifndef CONF_GCLK_GEN_11_OE
|
||||
#define CONF_GCLK_GEN_11_OE 0
|
||||
#endif
|
||||
|
||||
// <q> Output Off Value
|
||||
// <i> Indicates whether Output Off Value is enabled or not
|
||||
// <id> gclk_arch_gen_11_oov
|
||||
#ifndef CONF_GCLK_GEN_11_OOV
|
||||
#define CONF_GCLK_GEN_11_OOV 0
|
||||
#endif
|
||||
|
||||
// <q> Improve Duty Cycle
|
||||
// <i> Indicates whether Improve Duty Cycle is enabled or not
|
||||
// <id> gclk_arch_gen_11_idc
|
||||
#ifndef CONF_GCLK_GEN_11_IDC
|
||||
#define CONF_GCLK_GEN_11_IDC 0
|
||||
#endif
|
||||
|
||||
// <q> Generic Clock Generator Enable
|
||||
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
|
||||
// <id> gclk_arch_gen_11_enable
|
||||
#ifndef CONF_GCLK_GEN_11_GENEN
|
||||
#define CONF_GCLK_GEN_11_GENEN 0
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
//<h> Generic Clock Generator Division
|
||||
//<o> Generic clock generator 11 division <0x0000-0xFFFF>
|
||||
// <id> gclk_gen_11_div
|
||||
#ifndef CONF_GCLK_GEN_11_DIV
|
||||
#define CONF_GCLK_GEN_11_DIV 1
|
||||
#endif
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_GCLK_CONFIG_H
|
||||
|
|
@ -0,0 +1,104 @@
|
|||
/* Auto-generated config file hpl_mclk_config.h */
|
||||
#ifndef HPL_MCLK_CONFIG_H
|
||||
#define HPL_MCLK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
#include <peripheral_clk_config.h>
|
||||
|
||||
// <e> System Configuration
|
||||
// <i> Indicates whether configuration for system is enabled or not
|
||||
// <id> enable_cpu_clock
|
||||
#ifndef CONF_SYSTEM_CONFIG
|
||||
#define CONF_SYSTEM_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <h> Basic settings
|
||||
// <y> CPU Clock source
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
// <i> This defines the clock source for the CPU
|
||||
// <id> cpu_clock_source
|
||||
#ifndef CONF_CPU_SRC
|
||||
#define CONF_CPU_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
// <y> CPU Clock Division Factor
|
||||
// <MCLK_CPUDIV_DIV_DIV1_Val"> 1
|
||||
// <MCLK_CPUDIV_DIV_DIV2_Val"> 2
|
||||
// <MCLK_CPUDIV_DIV_DIV4_Val"> 4
|
||||
// <MCLK_CPUDIV_DIV_DIV8_Val"> 8
|
||||
// <MCLK_CPUDIV_DIV_DIV16_Val"> 16
|
||||
// <MCLK_CPUDIV_DIV_DIV32_Val"> 32
|
||||
// <MCLK_CPUDIV_DIV_DIV64_Val"> 64
|
||||
// <MCLK_CPUDIV_DIV_DIV128_Val"> 128
|
||||
// <i> Prescalar for CPU clock
|
||||
// <id> cpu_div
|
||||
#ifndef CONF_MCLK_CPUDIV
|
||||
#define CONF_MCLK_CPUDIV MCLK_CPUDIV_DIV_DIV1_Val
|
||||
#endif
|
||||
// <y> Low Power Clock Division
|
||||
// <MCLK_LPDIV_LPDIV_DIV1_Val"> Divide by 1
|
||||
// <MCLK_LPDIV_LPDIV_DIV2_Val"> Divide by 2
|
||||
// <MCLK_LPDIV_LPDIV_DIV4_Val"> Divide by 4
|
||||
// <MCLK_LPDIV_LPDIV_DIV8_Val"> Divide by 8
|
||||
// <MCLK_LPDIV_LPDIV_DIV16_Val"> Divide by 16
|
||||
// <MCLK_LPDIV_LPDIV_DIV32_Val"> Divide by 32
|
||||
// <MCLK_LPDIV_LPDIV_DIV64_Val"> Divide by 64
|
||||
// <MCLK_LPDIV_LPDIV_DIV128_Val"> Divide by 128
|
||||
// <id> mclk_arch_lpdiv
|
||||
#ifndef CONF_MCLK_LPDIV
|
||||
#define CONF_MCLK_LPDIV MCLK_LPDIV_LPDIV_DIV4_Val
|
||||
#endif
|
||||
|
||||
// <y> Backup Clock Division
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV1_Val"> Divide by 1
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV2_Val"> Divide by 2
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV4_Val"> Divide by 4
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV8_Val"> Divide by 8
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV16_Val"> Divide by 16
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV32_Val"> Divide by 32
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV64_Val"> Divide by 64
|
||||
// <MCLK_BUPDIV_BUPDIV_DIV128_Val"> Divide by 128
|
||||
// <id> mclk_arch_bupdiv
|
||||
#ifndef CONF_MCLK_BUPDIV
|
||||
#define CONF_MCLK_BUPDIV MCLK_BUPDIV_BUPDIV_DIV8_Val
|
||||
#endif
|
||||
// <y> High-Speed Clock Division
|
||||
// <MCLK_HSDIV_DIV_DIV1_Val"> Divide by 1
|
||||
// <id> mclk_arch_hsdiv
|
||||
#ifndef CONF_MCLK_HSDIV
|
||||
#define CONF_MCLK_HSDIV MCLK_HSDIV_DIV_DIV1_Val
|
||||
#endif
|
||||
// </h>
|
||||
|
||||
// <h> NVM Settings
|
||||
// <o> NVM Wait States
|
||||
// <i> These bits select the number of wait states for a read operation.
|
||||
// <0=> 0
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
// <8=> 8
|
||||
// <9=> 9
|
||||
// <10=> 10
|
||||
// <11=> 11
|
||||
// <12=> 12
|
||||
// <13=> 13
|
||||
// <14=> 14
|
||||
// <15=> 15
|
||||
// <id> nvm_wait_states
|
||||
#ifndef CONF_NVM_WAIT_STATE
|
||||
#define CONF_NVM_WAIT_STATE 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_MCLK_CONFIG_H
|
||||
|
|
@ -0,0 +1,165 @@
|
|||
/* Auto-generated config file hpl_osc32kctrl_config.h */
|
||||
#ifndef HPL_OSC32KCTRL_CONFIG_H
|
||||
#define HPL_OSC32KCTRL_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <e> RTC Source configuration
|
||||
// <id> enable_rtc_source
|
||||
#ifndef CONF_RTCCTRL_CONFIG
|
||||
#define CONF_RTCCTRL_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> RTC source control
|
||||
// <y> RTC Clock Source Selection
|
||||
// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <i> This defines the clock source for RTC
|
||||
// <id> rtc_source_oscillator
|
||||
#ifndef CONF_RTCCTRL_SRC
|
||||
#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K
|
||||
#endif
|
||||
|
||||
// <q> Use 1 kHz output
|
||||
// <id> rtc_1khz_selection
|
||||
#ifndef CONF_RTCCTRL_1KHZ
|
||||
|
||||
#define CONF_RTCCTRL_1KHZ 0
|
||||
|
||||
#endif
|
||||
|
||||
#if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K
|
||||
#define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val)
|
||||
#elif CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_XOSC32K
|
||||
#define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val)
|
||||
#else
|
||||
#error unexpected CONF_RTCCTRL_SRC
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> 32kHz External Crystal Oscillator Configuration
|
||||
// <i> Indicates whether configuration for External 32K Osc is enabled or not
|
||||
// <id> enable_xosc32k
|
||||
#ifndef CONF_XOSC32K_CONFIG
|
||||
#define CONF_XOSC32K_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <h> 32kHz External Crystal Oscillator Control
|
||||
// <q> Oscillator enable
|
||||
// <i> Indicates whether 32kHz External Crystal Oscillator is enabled or not
|
||||
// <id> xosc32k_arch_enable
|
||||
#ifndef CONF_XOSC32K_ENABLE
|
||||
#define CONF_XOSC32K_ENABLE 0
|
||||
#endif
|
||||
|
||||
// <o> Start-Up Time
|
||||
// <0x0=>62592us
|
||||
// <0x1=>125092us
|
||||
// <0x2=>500092us
|
||||
// <0x3=>1000092us
|
||||
// <0x4=>2000092us
|
||||
// <0x5=>4000092us
|
||||
// <0x6=>8000092us
|
||||
// <id> xosc32k_arch_startup
|
||||
#ifndef CONF_XOSC32K_STARTUP
|
||||
#define CONF_XOSC32K_STARTUP 0x0
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Indicates whether On Demand Control is enabled or not
|
||||
// <id> xosc32k_arch_ondemand
|
||||
#ifndef CONF_XOSC32K_ONDEMAND
|
||||
#define CONF_XOSC32K_ONDEMAND 1
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> xosc32k_arch_runstdby
|
||||
#ifndef CONF_XOSC32K_RUNSTDBY
|
||||
#define CONF_XOSC32K_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> 1kHz Output Enable
|
||||
// <i> Indicates whether 1kHz Output is enabled or not
|
||||
// <id> xosc32k_arch_en1k
|
||||
#ifndef CONF_XOSC32K_EN1K
|
||||
#define CONF_XOSC32K_EN1K 0
|
||||
#endif
|
||||
|
||||
// <q> 32kHz Output Enable
|
||||
// <i> Indicates whether 32kHz Output is enabled or not
|
||||
// <id> xosc32k_arch_en32k
|
||||
#ifndef CONF_XOSC32K_EN32K
|
||||
#define CONF_XOSC32K_EN32K 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Switch Back
|
||||
// <i> Indicates whether Clock Switch Back is enabled or not
|
||||
// <id> xosc32k_arch_swben
|
||||
#ifndef CONF_XOSC32K_SWBEN
|
||||
#define CONF_XOSC32K_SWBEN 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Failure Detector
|
||||
// <i> Indicates whether Clock Failure Detector is enabled or not
|
||||
// <id> xosc32k_arch_cfden
|
||||
#ifndef CONF_XOSC32K_CFDEN
|
||||
#define CONF_XOSC32K_CFDEN 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Failure Detector Event Out
|
||||
// <i> Indicates whether Clock Failure Detector Event Out is enabled or not
|
||||
// <id> xosc32k_arch_cfdeo
|
||||
#ifndef CONF_XOSC32K_CFDEO
|
||||
#define CONF_XOSC32K_CFDEO 0
|
||||
#endif
|
||||
|
||||
// <q> Crystal connected to XIN32/XOUT32 Enable
|
||||
// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not
|
||||
// <id> xosc32k_arch_xtalen
|
||||
#ifndef CONF_XOSC32K_XTALEN
|
||||
#define CONF_XOSC32K_XTALEN 1
|
||||
#endif
|
||||
|
||||
// <o> Control Gain Mode
|
||||
// <0x0=>Low Power mode
|
||||
// <0x1=>Standard mode
|
||||
// <0x2=>High Speed mode
|
||||
// <id> xosc32k_arch_cgm
|
||||
#ifndef CONF_XOSC32K_CGM
|
||||
#define CONF_XOSC32K_CGM 0x1
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <e> 32kHz Ultra Low Power Internal Oscillator Configuration
|
||||
// <i> Indicates whether configuration for OSCULP32K is enabled or not
|
||||
// <id> enable_osculp32k
|
||||
#ifndef CONF_OSCULP32K_CONFIG
|
||||
#define CONF_OSCULP32K_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <h> 32kHz Ultra Low Power Internal Oscillator Control
|
||||
|
||||
// <q> Oscillator Calibration Control
|
||||
// <i> Indicates whether Oscillator Calibration is enabled or not
|
||||
// <id> osculp32k_calib_enable
|
||||
#ifndef CONF_OSCULP32K_CALIB_ENABLE
|
||||
#define CONF_OSCULP32K_CALIB_ENABLE 0
|
||||
#endif
|
||||
|
||||
// <o> Oscillator Calibration <0x0-0x3F>
|
||||
// <id> osculp32k_calib
|
||||
#ifndef CONF_OSCULP32K_CALIB
|
||||
#define CONF_OSCULP32K_CALIB 0x0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_OSC32KCTRL_CONFIG_H
|
||||
|
|
@ -0,0 +1,640 @@
|
|||
/* Auto-generated config file hpl_oscctrl_config.h */
|
||||
#ifndef HPL_OSCCTRL_CONFIG_H
|
||||
#define HPL_OSCCTRL_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <e> External Multipurpose Crystal Oscillator Configuration
|
||||
// <i> Indicates whether configuration for XOSC0 is enabled or not
|
||||
// <id> enable_xosc0
|
||||
#ifndef CONF_XOSC0_CONFIG
|
||||
#define CONF_XOSC0_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <o> Frequency <8000000-48000000>
|
||||
// <i> Oscillation frequency of the resonator connected to the External Multipurpose Crystal Oscillator.
|
||||
// <id> xosc0_frequency
|
||||
#ifndef CONF_XOSC_FREQUENCY
|
||||
#define CONF_XOSC0_FREQUENCY 12000000
|
||||
#endif
|
||||
|
||||
// <h> External Multipurpose Crystal Oscillator Control
|
||||
// <q> Oscillator enable
|
||||
// <i> Indicates whether External Multipurpose Crystal Oscillator is enabled or not
|
||||
// <id> xosc0_arch_enable
|
||||
#ifndef CONF_XOSC0_ENABLE
|
||||
#define CONF_XOSC0_ENABLE 0
|
||||
#endif
|
||||
|
||||
// <o> Start-Up Time
|
||||
// <0x0=>31us
|
||||
// <0x1=>61us
|
||||
// <0x2=>122us
|
||||
// <0x3=>244us
|
||||
// <0x4=>488us
|
||||
// <0x5=>977us
|
||||
// <0x6=>1953us
|
||||
// <0x7=>3906us
|
||||
// <0x8=>7813us
|
||||
// <0x9=>15625us
|
||||
// <0xA=>31250us
|
||||
// <0xB=>62500us
|
||||
// <0xC=>125000us
|
||||
// <0xD=>250000us
|
||||
// <0xE=>500000us
|
||||
// <0xF=>1000000us
|
||||
// <id> xosc0_arch_startup
|
||||
#ifndef CONF_XOSC0_STARTUP
|
||||
#define CONF_XOSC0_STARTUP 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Switch Back
|
||||
// <i> Indicates whether Clock Switch Back is enabled or not
|
||||
// <id> xosc0_arch_swben
|
||||
#ifndef CONF_XOSC0_SWBEN
|
||||
#define CONF_XOSC0_SWBEN 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Failure Detector
|
||||
// <i> Indicates whether Clock Failure Detector is enabled or not
|
||||
// <id> xosc0_arch_cfden
|
||||
#ifndef CONF_XOSC0_CFDEN
|
||||
#define CONF_XOSC0_CFDEN 0
|
||||
#endif
|
||||
|
||||
// <q> Automatic Loop Control Enable
|
||||
// <i> Indicates whether Automatic Loop Control is enabled or not
|
||||
// <id> xosc0_arch_enalc
|
||||
#ifndef CONF_XOSC0_ENALC
|
||||
#define CONF_XOSC0_ENALC 0
|
||||
#endif
|
||||
|
||||
// <q> Low Buffer Gain Enable
|
||||
// <i> Indicates whether Low Buffer Gain is enabled or not
|
||||
// <id> xosc0_arch_lowbufgain
|
||||
#ifndef CONF_XOSC0_LOWBUFGAIN
|
||||
#define CONF_XOSC0_LOWBUFGAIN 0
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Indicates whether On Demand Control is enabled or not
|
||||
// <id> xosc0_arch_ondemand
|
||||
#ifndef CONF_XOSC0_ONDEMAND
|
||||
#define CONF_XOSC0_ONDEMAND 0
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> xosc0_arch_runstdby
|
||||
#ifndef CONF_XOSC0_RUNSTDBY
|
||||
#define CONF_XOSC0_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Crystal connected to XIN/XOUT Enable
|
||||
// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not
|
||||
// <id> xosc0_arch_xtalen
|
||||
#ifndef CONF_XOSC0_XTALEN
|
||||
#define CONF_XOSC0_XTALEN 0
|
||||
#endif
|
||||
//</h>
|
||||
//</e>
|
||||
|
||||
#if CONF_XOSC0_FREQUENCY >= 32000000
|
||||
#define CONF_XOSC0_CFDPRESC 0x0
|
||||
#define CONF_XOSC0_IMULT 0x7
|
||||
#define CONF_XOSC0_IPTAT 0x3
|
||||
#elif CONF_XOSC0_FREQUENCY >= 24000000
|
||||
#define CONF_XOSC0_CFDPRESC 0x1
|
||||
#define CONF_XOSC0_IMULT 0x6
|
||||
#define CONF_XOSC0_IPTAT 0x3
|
||||
#elif CONF_XOSC0_FREQUENCY >= 16000000
|
||||
#define CONF_XOSC0_CFDPRESC 0x2
|
||||
#define CONF_XOSC0_IMULT 0x5
|
||||
#define CONF_XOSC0_IPTAT 0x3
|
||||
#elif CONF_XOSC0_FREQUENCY >= 8000000
|
||||
#define CONF_XOSC0_CFDPRESC 0x3
|
||||
#define CONF_XOSC0_IMULT 0x4
|
||||
#define CONF_XOSC0_IPTAT 0x3
|
||||
#endif
|
||||
|
||||
// <e> External Multipurpose Crystal Oscillator Configuration
|
||||
// <i> Indicates whether configuration for XOSC1 is enabled or not
|
||||
// <id> enable_xosc1
|
||||
#ifndef CONF_XOSC1_CONFIG
|
||||
#define CONF_XOSC1_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <o> Frequency <8000000-48000000>
|
||||
// <i> Oscillation frequency of the resonator connected to the External Multipurpose Crystal Oscillator.
|
||||
// <id> xosc1_frequency
|
||||
#ifndef CONF_XOSC_FREQUENCY
|
||||
#define CONF_XOSC1_FREQUENCY 12000000
|
||||
#endif
|
||||
|
||||
// <h> External Multipurpose Crystal Oscillator Control
|
||||
// <q> Oscillator enable
|
||||
// <i> Indicates whether External Multipurpose Crystal Oscillator is enabled or not
|
||||
// <id> xosc1_arch_enable
|
||||
#ifndef CONF_XOSC1_ENABLE
|
||||
#define CONF_XOSC1_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <o> Start-Up Time
|
||||
// <0x0=>31us
|
||||
// <0x1=>61us
|
||||
// <0x2=>122us
|
||||
// <0x3=>244us
|
||||
// <0x4=>488us
|
||||
// <0x5=>977us
|
||||
// <0x6=>1953us
|
||||
// <0x7=>3906us
|
||||
// <0x8=>7813us
|
||||
// <0x9=>15625us
|
||||
// <0xA=>31250us
|
||||
// <0xB=>62500us
|
||||
// <0xC=>125000us
|
||||
// <0xD=>250000us
|
||||
// <0xE=>500000us
|
||||
// <0xF=>1000000us
|
||||
// <id> xosc1_arch_startup
|
||||
#ifndef CONF_XOSC1_STARTUP
|
||||
#define CONF_XOSC1_STARTUP 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Switch Back
|
||||
// <i> Indicates whether Clock Switch Back is enabled or not
|
||||
// <id> xosc1_arch_swben
|
||||
#ifndef CONF_XOSC1_SWBEN
|
||||
#define CONF_XOSC1_SWBEN 0
|
||||
#endif
|
||||
|
||||
// <q> Clock Failure Detector
|
||||
// <i> Indicates whether Clock Failure Detector is enabled or not
|
||||
// <id> xosc1_arch_cfden
|
||||
#ifndef CONF_XOSC1_CFDEN
|
||||
#define CONF_XOSC1_CFDEN 0
|
||||
#endif
|
||||
|
||||
// <q> Automatic Loop Control Enable
|
||||
// <i> Indicates whether Automatic Loop Control is enabled or not
|
||||
// <id> xosc1_arch_enalc
|
||||
#ifndef CONF_XOSC1_ENALC
|
||||
#define CONF_XOSC1_ENALC 0
|
||||
#endif
|
||||
|
||||
// <q> Low Buffer Gain Enable
|
||||
// <i> Indicates whether Low Buffer Gain is enabled or not
|
||||
// <id> xosc1_arch_lowbufgain
|
||||
#ifndef CONF_XOSC1_LOWBUFGAIN
|
||||
#define CONF_XOSC1_LOWBUFGAIN 0
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Indicates whether On Demand Control is enabled or not
|
||||
// <id> xosc1_arch_ondemand
|
||||
#ifndef CONF_XOSC1_ONDEMAND
|
||||
#define CONF_XOSC1_ONDEMAND 0
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> xosc1_arch_runstdby
|
||||
#ifndef CONF_XOSC1_RUNSTDBY
|
||||
#define CONF_XOSC1_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> Crystal connected to XIN/XOUT Enable
|
||||
// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not
|
||||
// <id> xosc1_arch_xtalen
|
||||
#ifndef CONF_XOSC1_XTALEN
|
||||
#define CONF_XOSC1_XTALEN 1
|
||||
#endif
|
||||
//</h>
|
||||
//</e>
|
||||
|
||||
#if CONF_XOSC1_FREQUENCY >= 32000000
|
||||
#define CONF_XOSC1_CFDPRESC 0x0
|
||||
#define CONF_XOSC1_IMULT 0x7
|
||||
#define CONF_XOSC1_IPTAT 0x3
|
||||
#elif CONF_XOSC1_FREQUENCY >= 24000000
|
||||
#define CONF_XOSC1_CFDPRESC 0x1
|
||||
#define CONF_XOSC1_IMULT 0x6
|
||||
#define CONF_XOSC1_IPTAT 0x3
|
||||
#elif CONF_XOSC1_FREQUENCY >= 16000000
|
||||
#define CONF_XOSC1_CFDPRESC 0x2
|
||||
#define CONF_XOSC1_IMULT 0x5
|
||||
#define CONF_XOSC1_IPTAT 0x3
|
||||
#elif CONF_XOSC1_FREQUENCY >= 8000000
|
||||
#define CONF_XOSC1_CFDPRESC 0x3
|
||||
#define CONF_XOSC1_IMULT 0x4
|
||||
#define CONF_XOSC1_IPTAT 0x3
|
||||
#endif
|
||||
|
||||
// <e> DFLL Configuration
|
||||
// <i> Indicates whether configuration for DFLL is enabled or not
|
||||
// <id> enable_dfll
|
||||
#ifndef CONF_DFLL_CONFIG
|
||||
#define CONF_DFLL_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <y> Reference Clock Source
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
// <i> Select the clock source
|
||||
// <id> dfll_ref_clock
|
||||
#ifndef CONF_DFLL_GCLK
|
||||
#define CONF_DFLL_GCLK GCLK_PCHCTRL_GEN_GCLK2_Val
|
||||
#endif
|
||||
|
||||
// <h> Digital Frequency Locked Loop Control
|
||||
// <q> DFLL Enable
|
||||
// <i> Indicates whether DFLL is enabled or not
|
||||
// <id> dfll_arch_enable
|
||||
#ifndef CONF_DFLL_ENABLE
|
||||
#define CONF_DFLL_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Indicates whether On Demand Control is enabled or not
|
||||
// <id> dfll_arch_ondemand
|
||||
#ifndef CONF_DFLL_ONDEMAND
|
||||
#define CONF_DFLL_ONDEMAND 0
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> dfll_arch_runstdby
|
||||
#ifndef CONF_DFLL_RUNSTDBY
|
||||
#define CONF_DFLL_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <q> USB Clock Recovery Mode
|
||||
// <i> Indicates whether USB Clock Recovery Mode is enabled or not
|
||||
// <id> dfll_arch_usbcrm
|
||||
#ifndef CONF_DFLL_USBCRM
|
||||
#define CONF_DFLL_USBCRM 0
|
||||
#endif
|
||||
|
||||
// <q> Wait Lock
|
||||
// <i> Indicates whether Wait Lock is enabled or not
|
||||
// <id> dfll_arch_waitlock
|
||||
#ifndef CONF_DFLL_WAITLOCK
|
||||
#define CONF_DFLL_WAITLOCK 1
|
||||
#endif
|
||||
|
||||
// <q> Bypass Coarse Lock
|
||||
// <i> Indicates whether Bypass Coarse Lock is enabled or not
|
||||
// <id> dfll_arch_bplckc
|
||||
#ifndef CONF_DFLL_BPLCKC
|
||||
#define CONF_DFLL_BPLCKC 0
|
||||
#endif
|
||||
|
||||
// <q> Quick Lock Disable
|
||||
// <i> Indicates whether Quick Lock Disable is enabled or not
|
||||
// <id> dfll_arch_qldis
|
||||
#ifndef CONF_DFLL_QLDIS
|
||||
#define CONF_DFLL_QLDIS 0
|
||||
#endif
|
||||
|
||||
// <q> Chill Cycle Disable
|
||||
// <i> Indicates whether Chill Cycle Disable is enabled or not
|
||||
// <id> dfll_arch_ccdis
|
||||
#ifndef CONF_DFLL_CCDIS
|
||||
#define CONF_DFLL_CCDIS 0
|
||||
#endif
|
||||
|
||||
// <q> Lose Lock After Wake
|
||||
// <i> Indicates whether Lose Lock After Wake is enabled or not
|
||||
// <id> dfll_arch_llaw
|
||||
#ifndef CONF_DFLL_LLAW
|
||||
#define CONF_DFLL_LLAW 0
|
||||
#endif
|
||||
|
||||
// <q> Stable DFLL Frequency
|
||||
// <i> Indicates whether Stable DFLL Frequency is enabled or not
|
||||
// <id> dfll_arch_stable
|
||||
#ifndef CONF_DFLL_STABLE
|
||||
#define CONF_DFLL_STABLE 0
|
||||
#endif
|
||||
|
||||
// <o> Operating Mode Selection
|
||||
// <0=>Open Loop Mode
|
||||
// <1=>Closed Loop Mode
|
||||
// <id> dfll_mode
|
||||
#ifndef CONF_DFLL_MODE
|
||||
#define CONF_DFLL_MODE 0x0
|
||||
#endif
|
||||
|
||||
// <o> Coarse Maximum Step <0x0-0x1F>
|
||||
// <id> dfll_arch_cstep
|
||||
#ifndef CONF_DFLL_CSTEP
|
||||
#define CONF_DFLL_CSTEP 0x1
|
||||
#endif
|
||||
|
||||
// <o> Fine Maximum Step <0x0-0xFF>
|
||||
// <id> dfll_arch_fstep
|
||||
#ifndef CONF_DFLL_FSTEP
|
||||
#define CONF_DFLL_FSTEP 0x1
|
||||
#endif
|
||||
|
||||
// <o> DFLL Multiply Factor <0x0-0xFFFF>
|
||||
// <id> dfll_mul
|
||||
#ifndef CONF_DFLL_MUL
|
||||
#define CONF_DFLL_MUL 0x0
|
||||
#endif
|
||||
|
||||
// <e> DFLL Calibration Overwrite
|
||||
// <i> Indicates whether Overwrite Calibration value of DFLL
|
||||
// <id> dfll_arch_calibration
|
||||
#ifndef CONF_DFLL_OVERWRITE_CALIBRATION
|
||||
#define CONF_DFLL_OVERWRITE_CALIBRATION 0
|
||||
#endif
|
||||
|
||||
// <o> Coarse Value <0x0-0x3F>
|
||||
// <id> dfll_arch_coarse
|
||||
#ifndef CONF_DFLL_COARSE
|
||||
#define CONF_DFLL_COARSE (0x1f / 4)
|
||||
#endif
|
||||
|
||||
// <o> Fine Value <0x0-0xFF>
|
||||
// <id> dfll_arch_fine
|
||||
#ifndef CONF_DFLL_FINE
|
||||
#define CONF_DFLL_FINE (0x80)
|
||||
#endif
|
||||
|
||||
//</e>
|
||||
|
||||
//</h>
|
||||
|
||||
//</e>
|
||||
|
||||
// <e> FDPLL0 Configuration
|
||||
// <i> Indicates whether configuration for FDPLL0 is enabled or not
|
||||
// <id> enable_fdpll0
|
||||
#ifndef CONF_FDPLL0_CONFIG
|
||||
#define CONF_FDPLL0_CONFIG 0
|
||||
#endif
|
||||
|
||||
// <y> Reference Clock Source
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
// <i> Select the clock source.
|
||||
// <id> fdpll0_ref_clock
|
||||
#ifndef CONF_FDPLL0_GCLK
|
||||
#define CONF_FDPLL0_GCLK GCLK_GENCTRL_SRC_XOSC32K
|
||||
#endif
|
||||
|
||||
// <h> Digital Phase Locked Loop Control
|
||||
// <q> Enable
|
||||
// <i> Indicates whether Digital Phase Locked Loop is enabled or not
|
||||
// <id> fdpll0_arch_enable
|
||||
#ifndef CONF_FDPLL0_ENABLE
|
||||
#define CONF_FDPLL0_ENABLE 0
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Indicates whether On Demand Control is enabled or not
|
||||
// <id> fdpll0_arch_ondemand
|
||||
#ifndef CONF_FDPLL0_ONDEMAND
|
||||
#define CONF_FDPLL0_ONDEMAND 0
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> fdpll0_arch_runstdby
|
||||
#ifndef CONF_FDPLL0_RUNSTDBY
|
||||
#define CONF_FDPLL0_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <o> Loop Divider Ratio Fractional Part <0x0-0x1F>
|
||||
// <i> Value of LDRFRAC is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
|
||||
// <id> fdpll0_ldrfrac
|
||||
#ifndef CONF_FDPLL0_LDRFRAC
|
||||
#define CONF_FDPLL0_LDRFRAC 0xd
|
||||
#endif
|
||||
|
||||
// <o> Loop Divider Ratio Integer Part <0x0-0x1FFF>
|
||||
// <i> Value of LDR is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
|
||||
// <id> fdpll0_ldr
|
||||
#ifndef CONF_FDPLL0_LDR
|
||||
#define CONF_FDPLL0_LDR 0x5b7
|
||||
#endif
|
||||
|
||||
// <o> Clock Divider <0x0-0x7FF>
|
||||
// <i> This Clock divider is only for XOSC clock input to DPLL
|
||||
// <id> fdpll0_clock_div
|
||||
#ifndef CONF_FDPLL0_DIV
|
||||
#define CONF_FDPLL0_DIV 0x0
|
||||
#endif
|
||||
|
||||
// <q> DCO Filter Enable
|
||||
// <i> Indicates whether DCO Filter Enable is enabled or not
|
||||
// <id> fdpll0_arch_dcoen
|
||||
#ifndef CONF_FDPLL0_DCOEN
|
||||
#define CONF_FDPLL0_DCOEN 0
|
||||
#endif
|
||||
|
||||
// <o> Sigma-Delta DCO Filter Selection <0x0-0x7>
|
||||
// <id> fdpll0_clock_dcofilter
|
||||
#ifndef CONF_FDPLL0_DCOFILTER
|
||||
#define CONF_FDPLL0_DCOFILTER 0x0
|
||||
#endif
|
||||
|
||||
// <q> Lock Bypass
|
||||
// <i> Indicates whether Lock Bypass is enabled or not
|
||||
// <id> fdpll0_arch_lbypass
|
||||
#ifndef CONF_FDPLL0_LBYPASS
|
||||
#define CONF_FDPLL0_LBYPASS 0
|
||||
#endif
|
||||
|
||||
// <o> Lock Time
|
||||
// <0x0=>No time-out, automatic lock
|
||||
// <0x4=>The Time-out if no lock within 800 us
|
||||
// <0x5=>The Time-out if no lock within 900 us
|
||||
// <0x6=>The Time-out if no lock within 1 ms
|
||||
// <0x7=>The Time-out if no lock within 11 ms
|
||||
// <id> fdpll0_arch_ltime
|
||||
#ifndef CONF_FDPLL0_LTIME
|
||||
#define CONF_FDPLL0_LTIME 0x0
|
||||
#endif
|
||||
|
||||
// <o> Reference Clock Selection
|
||||
// <0x0=>GCLK clock reference
|
||||
// <0x1=>XOSC32K clock reference
|
||||
// <0x2=>XOSC0 clock reference
|
||||
// <0x3=>XOSC1 clock reference
|
||||
// <id> fdpll0_arch_refclk
|
||||
#ifndef CONF_FDPLL0_REFCLK
|
||||
#define CONF_FDPLL0_REFCLK 0x1
|
||||
#endif
|
||||
|
||||
// <q> Wake Up Fast
|
||||
// <i> Indicates whether Wake Up Fast is enabled or not
|
||||
// <id> fdpll0_arch_wuf
|
||||
#ifndef CONF_FDPLL0_WUF
|
||||
#define CONF_FDPLL0_WUF 0
|
||||
#endif
|
||||
|
||||
// <o> Proportional Integral Filter Selection <0x0-0xF>
|
||||
// <id> fdpll0_arch_filter
|
||||
#ifndef CONF_FDPLL0_FILTER
|
||||
#define CONF_FDPLL0_FILTER 0x0
|
||||
#endif
|
||||
|
||||
//</h>
|
||||
//</e>
|
||||
// <e> FDPLL1 Configuration
|
||||
// <i> Indicates whether configuration for FDPLL1 is enabled or not
|
||||
// <id> enable_fdpll1
|
||||
#ifndef CONF_FDPLL1_CONFIG
|
||||
#define CONF_FDPLL1_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <y> Reference Clock Source
|
||||
// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
|
||||
// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0)
|
||||
// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1)
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
// <i> Select the clock source.
|
||||
// <id> fdpll1_ref_clock
|
||||
#ifndef CONF_FDPLL1_GCLK
|
||||
#define CONF_FDPLL1_GCLK GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||
#endif
|
||||
|
||||
// <h> Digital Phase Locked Loop Control
|
||||
// <q> Enable
|
||||
// <i> Indicates whether Digital Phase Locked Loop is enabled or not
|
||||
// <id> fdpll1_arch_enable
|
||||
#ifndef CONF_FDPLL1_ENABLE
|
||||
#define CONF_FDPLL1_ENABLE 1
|
||||
#endif
|
||||
|
||||
// <q> On Demand Control
|
||||
// <i> Indicates whether On Demand Control is enabled or not
|
||||
// <id> fdpll1_arch_ondemand
|
||||
#ifndef CONF_FDPLL1_ONDEMAND
|
||||
#define CONF_FDPLL1_ONDEMAND 0
|
||||
#endif
|
||||
|
||||
// <q> Run in Standby
|
||||
// <i> Indicates whether Run in Standby is enabled or not
|
||||
// <id> fdpll1_arch_runstdby
|
||||
#ifndef CONF_FDPLL1_RUNSTDBY
|
||||
#define CONF_FDPLL1_RUNSTDBY 0
|
||||
#endif
|
||||
|
||||
// <o> Loop Divider Ratio Fractional Part <0x0-0x1F>
|
||||
// <i> Value of LDRFRAC is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
|
||||
// <id> fdpll1_ldrfrac
|
||||
#ifndef CONF_FDPLL1_LDRFRAC
|
||||
#define CONF_FDPLL1_LDRFRAC 0x0
|
||||
#endif
|
||||
|
||||
// <o> Loop Divider Ratio Integer Part <0x0-0x1FFF>
|
||||
// <i> Value of LDR is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
|
||||
// <id> fdpll1_ldr
|
||||
#ifndef CONF_FDPLL1_LDR
|
||||
#define CONF_FDPLL1_LDR 0x3b
|
||||
#endif
|
||||
|
||||
// <o> Clock Divider <0x0-0x7FF>
|
||||
// <i> This Clock divider is only for XOSC clock input to DPLL
|
||||
// <id> fdpll1_clock_div
|
||||
#ifndef CONF_FDPLL1_DIV
|
||||
#define CONF_FDPLL1_DIV 0x0
|
||||
#endif
|
||||
|
||||
// <q> DCO Filter Enable
|
||||
// <i> Indicates whether DCO Filter Enable is enabled or not
|
||||
// <id> fdpll1_arch_dcoen
|
||||
#ifndef CONF_FDPLL1_DCOEN
|
||||
#define CONF_FDPLL1_DCOEN 0
|
||||
#endif
|
||||
|
||||
// <o> Sigma-Delta DCO Filter Selection <0x0-0x7>
|
||||
// <id> fdpll1_clock_dcofilter
|
||||
#ifndef CONF_FDPLL1_DCOFILTER
|
||||
#define CONF_FDPLL1_DCOFILTER 0x0
|
||||
#endif
|
||||
|
||||
// <q> Lock Bypass
|
||||
// <i> Indicates whether Lock Bypass is enabled or not
|
||||
// <id> fdpll1_arch_lbypass
|
||||
#ifndef CONF_FDPLL1_LBYPASS
|
||||
#define CONF_FDPLL1_LBYPASS 0
|
||||
#endif
|
||||
|
||||
// <o> Lock Time
|
||||
// <0x0=>No time-out, automatic lock
|
||||
// <0x4=>The Time-out if no lock within 800 us
|
||||
// <0x5=>The Time-out if no lock within 900 us
|
||||
// <0x6=>The Time-out if no lock within 1 ms
|
||||
// <0x7=>The Time-out if no lock within 11 ms
|
||||
// <id> fdpll1_arch_ltime
|
||||
#ifndef CONF_FDPLL1_LTIME
|
||||
#define CONF_FDPLL1_LTIME 0x0
|
||||
#endif
|
||||
|
||||
// <o> Reference Clock Selection
|
||||
// <0x0=>GCLK clock reference
|
||||
// <0x1=>XOSC32K clock reference
|
||||
// <0x2=>XOSC0 clock reference
|
||||
// <0x3=>XOSC1 clock reference
|
||||
// <id> fdpll1_arch_refclk
|
||||
#ifndef CONF_FDPLL1_REFCLK
|
||||
#define CONF_FDPLL1_REFCLK 0x0
|
||||
#endif
|
||||
|
||||
// <q> Wake Up Fast
|
||||
// <i> Indicates whether Wake Up Fast is enabled or not
|
||||
// <id> fdpll1_arch_wuf
|
||||
#ifndef CONF_FDPLL1_WUF
|
||||
#define CONF_FDPLL1_WUF 0
|
||||
#endif
|
||||
|
||||
// <o> Proportional Integral Filter Selection <0x0-0xF>
|
||||
// <id> fdpll1_arch_filter
|
||||
#ifndef CONF_FDPLL1_FILTER
|
||||
#define CONF_FDPLL1_FILTER 0x0
|
||||
#endif
|
||||
|
||||
//</h>
|
||||
//</e>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_OSCCTRL_CONFIG_H
|
||||
|
|
@ -0,0 +1,522 @@
|
|||
/* Auto-generated config file hpl_port_config.h */
|
||||
#ifndef HPL_PORT_CONFIG_H
|
||||
#define HPL_PORT_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <e> PORT Input Event 0 configuration
|
||||
// <id> enable_port_input_event_0
|
||||
#ifndef CONF_PORT_EVCTRL_PORT_0
|
||||
#define CONF_PORT_EVCTRL_PORT_0 1
|
||||
#endif
|
||||
|
||||
// <h> PORT Input Event 0 configuration on PORT A
|
||||
|
||||
// <q> PORTA Input Event 0 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT A Input Event 0 configuration is enabled
|
||||
// <id> porta_input_event_enable_0
|
||||
#ifndef CONF_PORTA_EVCTRL_PORTEI_0
|
||||
#define CONF_PORTA_EVCTRL_PORTEI_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 0 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port A on which the event action will be performed
|
||||
// <id> porta_event_pin_identifier_0
|
||||
#ifndef CONF_PORTA_EVCTRL_PID_0
|
||||
#define CONF_PORTA_EVCTRL_PID_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 0 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT A will perform on event input 0
|
||||
// <id> porta_event_action_0
|
||||
#ifndef CONF_PORTA_EVCTRL_EVACT_0
|
||||
#define CONF_PORTA_EVCTRL_EVACT_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 0 configuration on PORT B
|
||||
|
||||
// <q> PORTB Input Event 0 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT B Input Event 0 configuration is enabled
|
||||
// <id> portb_input_event_enable_0
|
||||
#ifndef CONF_PORTB_EVCTRL_PORTEI_0
|
||||
#define CONF_PORTB_EVCTRL_PORTEI_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 0 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port B on which the event action will be performed
|
||||
// <id> portb_event_pin_identifier_0
|
||||
#ifndef CONF_PORTB_EVCTRL_PID_0
|
||||
#define CONF_PORTB_EVCTRL_PID_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 0 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT B will perform on event input 0
|
||||
// <id> portb_event_action_0
|
||||
#ifndef CONF_PORTB_EVCTRL_EVACT_0
|
||||
#define CONF_PORTB_EVCTRL_EVACT_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 0 configuration on PORT C
|
||||
|
||||
// <q> PORTC Input Event 0 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT C Input Event 0 configuration is enabled
|
||||
// <id> portc_input_event_enable_0
|
||||
#ifndef CONF_PORTC_EVCTRL_PORTEI_0
|
||||
#define CONF_PORTC_EVCTRL_PORTEI_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 0 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port C on which the event action will be performed
|
||||
// <id> portc_event_pin_identifier_0
|
||||
#ifndef CONF_PORTC_EVCTRL_PID_0
|
||||
#define CONF_PORTC_EVCTRL_PID_0 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 0 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT C will perform on event input 0
|
||||
// <id> portc_event_action_0
|
||||
#ifndef CONF_PORTC_EVCTRL_EVACT_0
|
||||
#define CONF_PORTC_EVCTRL_EVACT_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 0 configuration on PORT D
|
||||
|
||||
// <q> PORTD Input Event 0 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT D Input Event 0 configuration is enabled
|
||||
// <id> portd_input_event_enable_0
|
||||
#ifndef CONF_PORTD_EVCTRL_PORTEI_0
|
||||
#define CONF_PORTD_EVCTRL_PORTEI_0 0x1
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 0 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port D on which the event action will be performed
|
||||
// <id> portd_event_pin_identifier_0
|
||||
#ifndef CONF_PORTD_EVCTRL_PID_0
|
||||
#define CONF_PORTD_EVCTRL_PID_0 0xb
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 0 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT D will perform on event input 0
|
||||
// <id> portd_event_action_0
|
||||
#ifndef CONF_PORTD_EVCTRL_EVACT_0
|
||||
#define CONF_PORTD_EVCTRL_EVACT_0 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <e> PORT Input Event 1 configuration
|
||||
// <id> enable_port_input_event_1
|
||||
#ifndef CONF_PORT_EVCTRL_PORT_1
|
||||
#define CONF_PORT_EVCTRL_PORT_1 1
|
||||
#endif
|
||||
|
||||
// <h> PORT Input Event 1 configuration on PORT A
|
||||
|
||||
// <q> PORTA Input Event 1 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT A Input Event 1 configuration is enabled
|
||||
// <id> porta_input_event_enable_1
|
||||
#ifndef CONF_PORTA_EVCTRL_PORTEI_1
|
||||
#define CONF_PORTA_EVCTRL_PORTEI_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 1 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port A on which the event action will be performed
|
||||
// <id> porta_event_pin_identifier_1
|
||||
#ifndef CONF_PORTA_EVCTRL_PID_1
|
||||
#define CONF_PORTA_EVCTRL_PID_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 1 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT A will perform on event input 1
|
||||
// <id> porta_event_action_1
|
||||
#ifndef CONF_PORTA_EVCTRL_EVACT_1
|
||||
#define CONF_PORTA_EVCTRL_EVACT_1 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 1 configuration on PORT B
|
||||
|
||||
// <q> PORTB Input Event 1 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT B Input Event 1 configuration is enabled
|
||||
// <id> portb_input_event_enable_1
|
||||
#ifndef CONF_PORTB_EVCTRL_PORTEI_1
|
||||
#define CONF_PORTB_EVCTRL_PORTEI_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 1 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port B on which the event action will be performed
|
||||
// <id> portb_event_pin_identifier_1
|
||||
#ifndef CONF_PORTB_EVCTRL_PID_1
|
||||
#define CONF_PORTB_EVCTRL_PID_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 1 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT B will perform on event input 1
|
||||
// <id> portb_event_action_1
|
||||
#ifndef CONF_PORTB_EVCTRL_EVACT_1
|
||||
#define CONF_PORTB_EVCTRL_EVACT_1 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 1 configuration on PORT C
|
||||
|
||||
// <q> PORTC Input Event 1 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT C Input Event 1 configuration is enabled
|
||||
// <id> portc_input_event_enable_1
|
||||
#ifndef CONF_PORTC_EVCTRL_PORTEI_1
|
||||
#define CONF_PORTC_EVCTRL_PORTEI_1 0x1
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 1 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port C on which the event action will be performed
|
||||
// <id> portc_event_pin_identifier_1
|
||||
#ifndef CONF_PORTC_EVCTRL_PID_1
|
||||
#define CONF_PORTC_EVCTRL_PID_1 0x1
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 1 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT C will perform on event input 1
|
||||
// <id> portc_event_action_1
|
||||
#ifndef CONF_PORTC_EVCTRL_EVACT_1
|
||||
#define CONF_PORTC_EVCTRL_EVACT_1 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 1 configuration on PORT D
|
||||
|
||||
// <q> PORTD Input Event 1 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT D Input Event 1 configuration is enabled
|
||||
// <id> portd_input_event_enable_1
|
||||
#ifndef CONF_PORTD_EVCTRL_PORTEI_1
|
||||
#define CONF_PORTD_EVCTRL_PORTEI_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 1 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port D on which the event action will be performed
|
||||
// <id> portd_event_pin_identifier_1
|
||||
#ifndef CONF_PORTD_EVCTRL_PID_1
|
||||
#define CONF_PORTD_EVCTRL_PID_1 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 1 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT D will perform on event input 1
|
||||
// <id> portd_event_action_1
|
||||
#ifndef CONF_PORTD_EVCTRL_EVACT_1
|
||||
#define CONF_PORTD_EVCTRL_EVACT_1 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <e> PORT Input Event 2 configuration
|
||||
// <id> enable_port_input_event_2
|
||||
#ifndef CONF_PORT_EVCTRL_PORT_2
|
||||
#define CONF_PORT_EVCTRL_PORT_2 0
|
||||
#endif
|
||||
|
||||
// <h> PORT Input Event 2 configuration on PORT A
|
||||
|
||||
// <q> PORTA Input Event 2 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT A Input Event 2 configuration is enabled
|
||||
// <id> porta_input_event_enable_2
|
||||
#ifndef CONF_PORTA_EVCTRL_PORTEI_2
|
||||
#define CONF_PORTA_EVCTRL_PORTEI_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 2 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port A on which the event action will be performed
|
||||
// <id> porta_event_pin_identifier_2
|
||||
#ifndef CONF_PORTA_EVCTRL_PID_2
|
||||
#define CONF_PORTA_EVCTRL_PID_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 2 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT A will perform on event input 2
|
||||
// <id> porta_event_action_2
|
||||
#ifndef CONF_PORTA_EVCTRL_EVACT_2
|
||||
#define CONF_PORTA_EVCTRL_EVACT_2 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 2 configuration on PORT B
|
||||
|
||||
// <q> PORTB Input Event 2 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT B Input Event 2 configuration is enabled
|
||||
// <id> portb_input_event_enable_2
|
||||
#ifndef CONF_PORTB_EVCTRL_PORTEI_2
|
||||
#define CONF_PORTB_EVCTRL_PORTEI_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 2 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port B on which the event action will be performed
|
||||
// <id> portb_event_pin_identifier_2
|
||||
#ifndef CONF_PORTB_EVCTRL_PID_2
|
||||
#define CONF_PORTB_EVCTRL_PID_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 2 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT B will perform on event input 2
|
||||
// <id> portb_event_action_2
|
||||
#ifndef CONF_PORTB_EVCTRL_EVACT_2
|
||||
#define CONF_PORTB_EVCTRL_EVACT_2 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 2 configuration on PORT C
|
||||
|
||||
// <q> PORTC Input Event 2 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT C Input Event 2 configuration is enabled
|
||||
// <id> portc_input_event_enable_2
|
||||
#ifndef CONF_PORTC_EVCTRL_PORTEI_2
|
||||
#define CONF_PORTC_EVCTRL_PORTEI_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 2 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port C on which the event action will be performed
|
||||
// <id> portc_event_pin_identifier_2
|
||||
#ifndef CONF_PORTC_EVCTRL_PID_2
|
||||
#define CONF_PORTC_EVCTRL_PID_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 2 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT C will perform on event input 2
|
||||
// <id> portc_event_action_2
|
||||
#ifndef CONF_PORTC_EVCTRL_EVACT_2
|
||||
#define CONF_PORTC_EVCTRL_EVACT_2 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 2 configuration on PORT D
|
||||
|
||||
// <q> PORTD Input Event 2 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT D Input Event 2 configuration is enabled
|
||||
// <id> portd_input_event_enable_2
|
||||
#ifndef CONF_PORTD_EVCTRL_PORTEI_2
|
||||
#define CONF_PORTD_EVCTRL_PORTEI_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 2 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port D on which the event action will be performed
|
||||
// <id> portd_event_pin_identifier_2
|
||||
#ifndef CONF_PORTD_EVCTRL_PID_2
|
||||
#define CONF_PORTD_EVCTRL_PID_2 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 2 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT D will perform on event input 2
|
||||
// <id> portd_event_action_2
|
||||
#ifndef CONF_PORTD_EVCTRL_EVACT_2
|
||||
#define CONF_PORTD_EVCTRL_EVACT_2 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
// <e> PORT Input Event 3 configuration
|
||||
// <id> enable_port_input_event_3
|
||||
#ifndef CONF_PORT_EVCTRL_PORT_3
|
||||
#define CONF_PORT_EVCTRL_PORT_3 0
|
||||
#endif
|
||||
|
||||
// <h> PORT Input Event 3 configuration on PORT A
|
||||
|
||||
// <q> PORTA Input Event 3 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT A Input Event 3 configuration is enabled
|
||||
// <id> porta_input_event_enable_3
|
||||
#ifndef CONF_PORTA_EVCTRL_PORTEI_3
|
||||
#define CONF_PORTA_EVCTRL_PORTEI_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 3 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port A on which the event action will be performed
|
||||
// <id> porta_event_pin_identifier_3
|
||||
#ifndef CONF_PORTA_EVCTRL_PID_3
|
||||
#define CONF_PORTA_EVCTRL_PID_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTA Event 3 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT A will perform on event input 3
|
||||
// <id> porta_event_action_3
|
||||
#ifndef CONF_PORTA_EVCTRL_EVACT_3
|
||||
#define CONF_PORTA_EVCTRL_EVACT_3 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 3 configuration on PORT B
|
||||
|
||||
// <q> PORTB Input Event 3 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT B Input Event 3 configuration is enabled
|
||||
// <id> portb_input_event_enable_3
|
||||
#ifndef CONF_PORTB_EVCTRL_PORTEI_3
|
||||
#define CONF_PORTB_EVCTRL_PORTEI_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 3 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port B on which the event action will be performed
|
||||
// <id> portb_event_pin_identifier_3
|
||||
#ifndef CONF_PORTB_EVCTRL_PID_3
|
||||
#define CONF_PORTB_EVCTRL_PID_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTB Event 3 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT B will perform on event input 3
|
||||
// <id> portb_event_action_3
|
||||
#ifndef CONF_PORTB_EVCTRL_EVACT_3
|
||||
#define CONF_PORTB_EVCTRL_EVACT_3 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 3 configuration on PORT C
|
||||
|
||||
// <q> PORTC Input Event 3 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT C Input Event 3 configuration is enabled
|
||||
// <id> portc_input_event_enable_3
|
||||
#ifndef CONF_PORTC_EVCTRL_PORTEI_3
|
||||
#define CONF_PORTC_EVCTRL_PORTEI_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 3 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port C on which the event action will be performed
|
||||
// <id> portc_event_pin_identifier_3
|
||||
#ifndef CONF_PORTC_EVCTRL_PID_3
|
||||
#define CONF_PORTC_EVCTRL_PID_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTC Event 3 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT C will perform on event input 3
|
||||
// <id> portc_event_action_3
|
||||
#ifndef CONF_PORTC_EVCTRL_EVACT_3
|
||||
#define CONF_PORTC_EVCTRL_EVACT_3 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h> PORT Input Event 3 configuration on PORT D
|
||||
|
||||
// <q> PORTD Input Event 3 Enable
|
||||
// <i> The event action will be triggered on any incoming event if PORT D Input Event 3 configuration is enabled
|
||||
// <id> portd_input_event_enable_3
|
||||
#ifndef CONF_PORTD_EVCTRL_PORTEI_3
|
||||
#define CONF_PORTD_EVCTRL_PORTEI_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 3 Pin Identifier <0x00-0x1F>
|
||||
// <i> These bits define the I/O pin from port D on which the event action will be performed
|
||||
// <id> portd_event_pin_identifier_3
|
||||
#ifndef CONF_PORTD_EVCTRL_PID_3
|
||||
#define CONF_PORTD_EVCTRL_PID_3 0x0
|
||||
#endif
|
||||
|
||||
// <o> PORTD Event 3 Action
|
||||
// <0=> Output register of pin will be set to level of event
|
||||
// <1=> Set output register of pin on event
|
||||
// <2=> Clear output register of pin on event
|
||||
// <3=> Toggle output register of pin on event
|
||||
// <i> These bits define the event action the PORT D will perform on event input 3
|
||||
// <id> portd_event_action_3
|
||||
#ifndef CONF_PORTD_EVCTRL_EVACT_3
|
||||
#define CONF_PORTD_EVCTRL_EVACT_3 0
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// </e>
|
||||
|
||||
#define CONF_PORTA_EVCTRL \
|
||||
(0 | PORT_EVCTRL_EVACT0(CONF_PORTA_EVCTRL_EVACT_0) | CONF_PORTA_EVCTRL_PORTEI_0 << PORT_EVCTRL_PORTEI0_Pos \
|
||||
| PORT_EVCTRL_PID0(CONF_PORTA_EVCTRL_PID_0) | PORT_EVCTRL_EVACT1(CONF_PORTA_EVCTRL_EVACT_1) \
|
||||
| CONF_PORTA_EVCTRL_PORTEI_1 << PORT_EVCTRL_PORTEI1_Pos | PORT_EVCTRL_PID1(CONF_PORTA_EVCTRL_PID_1) \
|
||||
| PORT_EVCTRL_EVACT2(CONF_PORTA_EVCTRL_EVACT_2) | CONF_PORTA_EVCTRL_PORTEI_2 << PORT_EVCTRL_PORTEI2_Pos \
|
||||
| PORT_EVCTRL_PID2(CONF_PORTA_EVCTRL_PID_2) | PORT_EVCTRL_EVACT3(CONF_PORTA_EVCTRL_EVACT_3) \
|
||||
| CONF_PORTA_EVCTRL_PORTEI_3 << PORT_EVCTRL_PORTEI3_Pos | PORT_EVCTRL_PID3(CONF_PORTA_EVCTRL_PID_3))
|
||||
#define CONF_PORTB_EVCTRL \
|
||||
(0 | PORT_EVCTRL_EVACT0(CONF_PORTB_EVCTRL_EVACT_0) | CONF_PORTB_EVCTRL_PORTEI_0 << PORT_EVCTRL_PORTEI0_Pos \
|
||||
| PORT_EVCTRL_PID0(CONF_PORTB_EVCTRL_PID_0) | PORT_EVCTRL_EVACT1(CONF_PORTB_EVCTRL_EVACT_1) \
|
||||
| CONF_PORTB_EVCTRL_PORTEI_1 << PORT_EVCTRL_PORTEI1_Pos | PORT_EVCTRL_PID1(CONF_PORTB_EVCTRL_PID_1) \
|
||||
| PORT_EVCTRL_EVACT2(CONF_PORTB_EVCTRL_EVACT_2) | CONF_PORTB_EVCTRL_PORTEI_2 << PORT_EVCTRL_PORTEI2_Pos \
|
||||
| PORT_EVCTRL_PID2(CONF_PORTB_EVCTRL_PID_2) | PORT_EVCTRL_EVACT3(CONF_PORTB_EVCTRL_EVACT_3) \
|
||||
| CONF_PORTB_EVCTRL_PORTEI_3 << PORT_EVCTRL_PORTEI3_Pos | PORT_EVCTRL_PID3(CONF_PORTB_EVCTRL_PID_3))
|
||||
#define CONF_PORTC_EVCTRL \
|
||||
(0 | PORT_EVCTRL_EVACT0(CONF_PORTC_EVCTRL_EVACT_0) | CONF_PORTC_EVCTRL_PORTEI_0 << PORT_EVCTRL_PORTEI0_Pos \
|
||||
| PORT_EVCTRL_PID0(CONF_PORTC_EVCTRL_PID_0) | PORT_EVCTRL_EVACT1(CONF_PORTC_EVCTRL_EVACT_1) \
|
||||
| CONF_PORTC_EVCTRL_PORTEI_1 << PORT_EVCTRL_PORTEI1_Pos | PORT_EVCTRL_PID1(CONF_PORTC_EVCTRL_PID_1) \
|
||||
| PORT_EVCTRL_EVACT2(CONF_PORTC_EVCTRL_EVACT_2) | CONF_PORTC_EVCTRL_PORTEI_2 << PORT_EVCTRL_PORTEI2_Pos \
|
||||
| PORT_EVCTRL_PID2(CONF_PORTC_EVCTRL_PID_2) | PORT_EVCTRL_EVACT3(CONF_PORTC_EVCTRL_EVACT_3) \
|
||||
| CONF_PORTC_EVCTRL_PORTEI_3 << PORT_EVCTRL_PORTEI3_Pos | PORT_EVCTRL_PID3(CONF_PORTC_EVCTRL_PID_3))
|
||||
#define CONF_PORTD_EVCTRL \
|
||||
(0 | PORT_EVCTRL_EVACT0(CONF_PORTD_EVCTRL_EVACT_0) | CONF_PORTD_EVCTRL_PORTEI_0 << PORT_EVCTRL_PORTEI0_Pos \
|
||||
| PORT_EVCTRL_PID0(CONF_PORTD_EVCTRL_PID_0) | PORT_EVCTRL_EVACT1(CONF_PORTD_EVCTRL_EVACT_1) \
|
||||
| CONF_PORTD_EVCTRL_PORTEI_1 << PORT_EVCTRL_PORTEI1_Pos | PORT_EVCTRL_PID1(CONF_PORTD_EVCTRL_PID_1) \
|
||||
| PORT_EVCTRL_EVACT2(CONF_PORTD_EVCTRL_EVACT_2) | CONF_PORTD_EVCTRL_PORTEI_2 << PORT_EVCTRL_PORTEI2_Pos \
|
||||
| PORT_EVCTRL_PID2(CONF_PORTD_EVCTRL_PID_2) | PORT_EVCTRL_EVACT3(CONF_PORTD_EVCTRL_EVACT_3) \
|
||||
| CONF_PORTD_EVCTRL_PORTEI_3 << PORT_EVCTRL_PORTEI3_Pos | PORT_EVCTRL_PID3(CONF_PORTD_EVCTRL_PID_3))
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_PORT_CONFIG_H
|
||||
|
|
@ -0,0 +1,190 @@
|
|||
/* Auto-generated config file hpl_sercom_config.h */
|
||||
#ifndef HPL_SERCOM_CONFIG_H
|
||||
#define HPL_SERCOM_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
#include <peripheral_clk_config.h>
|
||||
|
||||
// Enable configuration of module
|
||||
#ifndef CONF_SERCOM_5_SPI_ENABLE
|
||||
#define CONF_SERCOM_5_SPI_ENABLE 1
|
||||
#endif
|
||||
|
||||
//<o> SPI DMA TX Channel <0-32>
|
||||
//<i> This defines DMA channel to be used
|
||||
//<id> spi_master_dma_tx_channel
|
||||
#ifndef CONF_SERCOM_5_SPI_M_DMA_TX_CHANNEL
|
||||
#define CONF_SERCOM_5_SPI_M_DMA_TX_CHANNEL 1
|
||||
#endif
|
||||
|
||||
// <e> SPI RX Channel Enable
|
||||
// <id> spi_master_rx_channel
|
||||
#ifndef CONF_SERCOM_5_SPI_RX_CHANNEL
|
||||
#define CONF_SERCOM_5_SPI_RX_CHANNEL 1
|
||||
#endif
|
||||
|
||||
//<o> DMA Channel <0-32>
|
||||
//<i> This defines DMA channel to be used
|
||||
//<id> spi_master_dma_rx_channel
|
||||
#ifndef CONF_SERCOM_5_SPI_M_DMA_RX_CHANNEL
|
||||
#define CONF_SERCOM_5_SPI_M_DMA_RX_CHANNEL 0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// Set module in SPI Master mode
|
||||
#ifndef CONF_SERCOM_5_SPI_MODE
|
||||
#define CONF_SERCOM_5_SPI_MODE 0x03
|
||||
#endif
|
||||
|
||||
// <h> Basic Configuration
|
||||
|
||||
// <q> Receive buffer enable
|
||||
// <i> Enable receive buffer to receive data from slave (RXEN)
|
||||
// <id> spi_master_rx_enable
|
||||
#ifndef CONF_SERCOM_5_SPI_RXEN
|
||||
#define CONF_SERCOM_5_SPI_RXEN 0x1
|
||||
#endif
|
||||
|
||||
// <o> Character Size
|
||||
// <i> Bit size for all characters sent over the SPI bus (CHSIZE)
|
||||
// <0x0=>8 bits
|
||||
// <0x1=>9 bits
|
||||
// <id> spi_master_character_size
|
||||
#ifndef CONF_SERCOM_5_SPI_CHSIZE
|
||||
#define CONF_SERCOM_5_SPI_CHSIZE 0x0
|
||||
#endif
|
||||
// <o> Baud rate <1-18000000>
|
||||
// <i> The SPI data transfer rate
|
||||
// <id> spi_master_baud_rate
|
||||
#ifndef CONF_SERCOM_5_SPI_BAUD
|
||||
#define CONF_SERCOM_5_SPI_BAUD 12000000
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// <e> Advanced Configuration
|
||||
// <id> spi_master_advanced
|
||||
#ifndef CONF_SERCOM_5_SPI_ADVANCED
|
||||
#define CONF_SERCOM_5_SPI_ADVANCED 1
|
||||
#endif
|
||||
|
||||
// <o> Dummy byte <0x00-0x1ff>
|
||||
// <id> spi_master_dummybyte
|
||||
// <i> Dummy byte used when reading data from the slave without sending any data
|
||||
#ifndef CONF_SERCOM_5_SPI_DUMMYBYTE
|
||||
#define CONF_SERCOM_5_SPI_DUMMYBYTE 0x1ff
|
||||
#endif
|
||||
|
||||
// <o> Data Order
|
||||
// <0=>MSB first
|
||||
// <1=>LSB first
|
||||
// <i> I least significant or most significant bit is shifted out first (DORD)
|
||||
// <id> spi_master_arch_dord
|
||||
#ifndef CONF_SERCOM_5_SPI_DORD
|
||||
#define CONF_SERCOM_5_SPI_DORD 0x0
|
||||
#endif
|
||||
|
||||
// <o> Clock Polarity
|
||||
// <0=>SCK is low when idle
|
||||
// <1=>SCK is high when idle
|
||||
// <i> Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL)
|
||||
// <id> spi_master_arch_cpol
|
||||
#ifndef CONF_SERCOM_5_SPI_CPOL
|
||||
#define CONF_SERCOM_5_SPI_CPOL 0x0
|
||||
#endif
|
||||
|
||||
// <o> Clock Phase
|
||||
// <0x0=>Sample input on leading edge
|
||||
// <0x1=>Sample input on trailing edge
|
||||
// <i> Determines if input data is sampled on leading or trailing SCK edge. (CPHA)
|
||||
// <id> spi_master_arch_cpha
|
||||
#ifndef CONF_SERCOM_5_SPI_CPHA
|
||||
#define CONF_SERCOM_5_SPI_CPHA 0x0
|
||||
#endif
|
||||
|
||||
// <o> Immediate Buffer Overflow Notification
|
||||
// <i> Controls when OVF is asserted (IBON)
|
||||
// <0x0=>In data stream
|
||||
// <0x1=>On buffer overflow
|
||||
// <id> spi_master_arch_ibon
|
||||
#ifndef CONF_SERCOM_5_SPI_IBON
|
||||
#define CONF_SERCOM_5_SPI_IBON 0x0
|
||||
#endif
|
||||
|
||||
// <q> Run in stand-by
|
||||
// <i> Module stays active in stand-by sleep mode. (RUNSTDBY)
|
||||
// <id> spi_master_arch_runstdby
|
||||
#ifndef CONF_SERCOM_5_SPI_RUNSTDBY
|
||||
#define CONF_SERCOM_5_SPI_RUNSTDBY 0x0
|
||||
#endif
|
||||
|
||||
// <o> Debug Stop Mode
|
||||
// <i> Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP)
|
||||
// <0=>Keep running
|
||||
// <1=>Halt
|
||||
// <id> spi_master_arch_dbgstop
|
||||
#ifndef CONF_SERCOM_5_SPI_DBGSTOP
|
||||
#define CONF_SERCOM_5_SPI_DBGSTOP 0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// Address mode disabled in master mode
|
||||
#ifndef CONF_SERCOM_5_SPI_AMODE_EN
|
||||
#define CONF_SERCOM_5_SPI_AMODE_EN 0
|
||||
#endif
|
||||
|
||||
#ifndef CONF_SERCOM_5_SPI_AMODE
|
||||
#define CONF_SERCOM_5_SPI_AMODE 0
|
||||
#endif
|
||||
|
||||
#ifndef CONF_SERCOM_5_SPI_ADDR
|
||||
#define CONF_SERCOM_5_SPI_ADDR 0
|
||||
#endif
|
||||
|
||||
#ifndef CONF_SERCOM_5_SPI_ADDRMASK
|
||||
#define CONF_SERCOM_5_SPI_ADDRMASK 0
|
||||
#endif
|
||||
|
||||
#ifndef CONF_SERCOM_5_SPI_SSDE
|
||||
#define CONF_SERCOM_5_SPI_SSDE 0
|
||||
#endif
|
||||
|
||||
#ifndef CONF_SERCOM_5_SPI_MSSEN
|
||||
#define CONF_SERCOM_5_SPI_MSSEN 0x0
|
||||
#endif
|
||||
|
||||
#ifndef CONF_SERCOM_5_SPI_PLOADEN
|
||||
#define CONF_SERCOM_5_SPI_PLOADEN 0
|
||||
#endif
|
||||
|
||||
// <o> Receive Data Pinout
|
||||
// <0x0=>PAD[0]
|
||||
// <0x1=>PAD[1]
|
||||
// <0x2=>PAD[2]
|
||||
// <0x3=>PAD[3]
|
||||
// <id> spi_master_rxpo
|
||||
#ifndef CONF_SERCOM_5_SPI_RXPO
|
||||
#define CONF_SERCOM_5_SPI_RXPO 3
|
||||
#endif
|
||||
|
||||
// <o> Transmit Data Pinout
|
||||
// <0x0=>PAD[0,1]_DO_SCK
|
||||
// <0x1=>PAD[2,3]_DO_SCK
|
||||
// <0x2=>PAD[3,1]_DO_SCK
|
||||
// <0x3=>PAD[0,3]_DO_SCK
|
||||
// <id> spi_master_txpo
|
||||
#ifndef CONF_SERCOM_5_SPI_TXPO
|
||||
#define CONF_SERCOM_5_SPI_TXPO 0
|
||||
#endif
|
||||
|
||||
// Calculate baud register value from requested baudrate value
|
||||
#ifndef CONF_SERCOM_5_SPI_BAUD_RATE
|
||||
#define CONF_SERCOM_5_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM5_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_5_SPI_BAUD)) - 1
|
||||
#endif
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // HPL_SERCOM_CONFIG_H
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,829 @@
|
|||
/* Auto-generated config file peripheral_clk_config.h */
|
||||
#ifndef PERIPHERAL_CLK_CONFIG_H
|
||||
#define PERIPHERAL_CLK_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <y> ADC Clock Source
|
||||
// <id> adc_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for ADC.
|
||||
#ifndef CONF_GCLK_ADC0_SRC
|
||||
#define CONF_GCLK_ADC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_ADC0_FREQUENCY
|
||||
* \brief ADC0's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_ADC0_FREQUENCY
|
||||
#define CONF_GCLK_ADC0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> CCL Clock Source
|
||||
// <id> ccl_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for CCL.
|
||||
#ifndef CONF_GCLK_CCL_SRC
|
||||
#define CONF_GCLK_CCL_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_CCL_FREQUENCY
|
||||
* \brief CCL's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_CCL_FREQUENCY
|
||||
#define CONF_GCLK_CCL_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 0 Clock Source
|
||||
// <id> evsys_clk_selection_0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 0.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_0_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 1 Clock Source
|
||||
// <id> evsys_clk_selection_1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 1.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_1_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 2 Clock Source
|
||||
// <id> evsys_clk_selection_2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 2.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_2_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_2_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 3 Clock Source
|
||||
// <id> evsys_clk_selection_3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 3.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_3_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_3_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 4 Clock Source
|
||||
// <id> evsys_clk_selection_4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 4.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_4_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_4_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 5 Clock Source
|
||||
// <id> evsys_clk_selection_5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 5.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_5_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_5_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 6 Clock Source
|
||||
// <id> evsys_clk_selection_6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 6.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_6_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_6_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 7 Clock Source
|
||||
// <id> evsys_clk_selection_7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 7.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_7_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_7_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 8 Clock Source
|
||||
// <id> evsys_clk_selection_8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 8.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_8_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_8_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 9 Clock Source
|
||||
// <id> evsys_clk_selection_9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 9.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_9_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_9_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 10 Clock Source
|
||||
// <id> evsys_clk_selection_10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 10.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_10_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_10_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> EVSYS Channel 11 Clock Source
|
||||
// <id> evsys_clk_selection_11
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for channel 11.
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_11_SRC
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_11_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
|
||||
* \brief EVSYS's Clock frequency
|
||||
*/
|
||||
|
||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
|
||||
#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_CPU_FREQUENCY
|
||||
* \brief CPU's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_CPU_FREQUENCY
|
||||
#define CONF_CPU_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> Core Clock Source
|
||||
// <id> core_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for CORE.
|
||||
#ifndef CONF_GCLK_SERCOM5_CORE_SRC
|
||||
#define CONF_GCLK_SERCOM5_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
// <y> Slow Clock Source
|
||||
// <id> slow_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the slow clock source.
|
||||
#ifndef CONF_GCLK_SERCOM5_SLOW_SRC
|
||||
#define CONF_GCLK_SERCOM5_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_SERCOM5_CORE_FREQUENCY
|
||||
* \brief SERCOM5's Core Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_SERCOM5_CORE_FREQUENCY
|
||||
#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_SERCOM5_SLOW_FREQUENCY
|
||||
* \brief SERCOM5's Slow Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_SERCOM5_SLOW_FREQUENCY
|
||||
#define CONF_GCLK_SERCOM5_SLOW_FREQUENCY 32768
|
||||
#endif
|
||||
|
||||
// <y> TC Clock Source
|
||||
// <id> tc_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for TC.
|
||||
#ifndef CONF_GCLK_TC0_SRC
|
||||
#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_TC0_FREQUENCY
|
||||
* \brief TC0's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TC0_FREQUENCY
|
||||
#define CONF_GCLK_TC0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> TC Clock Source
|
||||
// <id> tc_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for TC.
|
||||
#ifndef CONF_GCLK_TC7_SRC
|
||||
#define CONF_GCLK_TC7_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_TC7_FREQUENCY
|
||||
* \brief TC7's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TC7_FREQUENCY
|
||||
#define CONF_GCLK_TC7_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> TCC Clock Source
|
||||
// <id> tcc_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for TCC.
|
||||
#ifndef CONF_GCLK_TCC0_SRC
|
||||
#define CONF_GCLK_TCC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_TCC0_FREQUENCY
|
||||
* \brief TCC0's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TCC0_FREQUENCY
|
||||
#define CONF_GCLK_TCC0_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <y> TCC Clock Source
|
||||
// <id> tcc_gclk_selection
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
||||
|
||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
||||
|
||||
// <i> Select the clock source for TCC.
|
||||
#ifndef CONF_GCLK_TCC1_SRC
|
||||
#define CONF_GCLK_TCC1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \def CONF_GCLK_TCC1_FREQUENCY
|
||||
* \brief TCC1's Clock frequency
|
||||
*/
|
||||
#ifndef CONF_GCLK_TCC1_FREQUENCY
|
||||
#define CONF_GCLK_TCC1_FREQUENCY 120000000
|
||||
#endif
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // PERIPHERAL_CLK_CONFIG_H
|
||||
|
|
@ -0,0 +1,475 @@
|
|||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Configurations xmlns:i="http://www.w3.org/2001/XMLSchema-instance" z:Id="i1" xmlns:z="http://schemas.microsoft.com/2003/10/Serialization/" xmlns="DefaultValues">
|
||||
<Configurations>
|
||||
<Configuration z:Id="i2">
|
||||
<Compiler_dictionary xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>DebugLevel</d4p1:Key>
|
||||
<d4p1:Value>None</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>IncludePaths</d4p1:Key>
|
||||
<d4p1:Value>NDEBUG</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>MiscellaneousSettings</d4p1:Key>
|
||||
<d4p1:Value>-std=gnu99</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>OptimizationLevel</d4p1:Key>
|
||||
<d4p1:Value>Optimize for size (-Os)</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>SymbolDefines</d4p1:Key>
|
||||
<d4p1:Value>NDEBUG</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>SymbolUndefines</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>Verbose</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>WarningsAsErrors</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.CLanguageExp</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.ChangeDefaultCharTypeUnsigned</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.ChangeDefaultBitFieldUnsigned</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.processormode</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.preprocessor.DoNotSearchSystemDirectories</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.preprocessor.PreprocessOnly</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.symbols.Default</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.directories.DefaultIncludePath</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.OtherFlags</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.PrepareDataForGarbageCollection</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.EnableUnsafeMatchOptimizations</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.EnableFastMath</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.GeneratePositionIndependentCode</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.EnableLongCalls</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.OtherDebuggingFlags</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.GenerateGprofInformation</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.GenerateProfInformation</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.AllWarnings</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.ExtraWarnings</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.Undefined</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.CheckSyntaxOnly</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.Pedantic</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.PedanticWarningsAsErrors</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.InhibitAllWarnings</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.Device</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.CompileOnly</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.SupportAnsiPrograms</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.MakeFileDependent</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
</Compiler_dictionary>
|
||||
<Linker_dictionary xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>Libraries</d4p1:Key>
|
||||
<d4p1:Value>libm</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>LibrarySearchPath</d4p1:Key>
|
||||
<d4p1:Value>$(ProjectDir)\Device_Startup</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>MiscellaneousSettings</d4p1:Key>
|
||||
<d4p1:Value>-Tsame54p20a_flash.ld</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.DoNotUseStandardStartFiles</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.DoNotUseDefaultLibraries</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.NoStartupOrDefaultLibs</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.OmitAllSymbolInformation</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.NoSharedLibraries</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.GenerateMAPFile</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.UseNewlibNano</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.AdditionalSpecs</d4p1:Key>
|
||||
<d4p1:Value>None</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.GarbageCollectUnusedSections</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.EnableUnsafeMatchOptimizations</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.EnableFastMath</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.GeneratePositionIndependentCode</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.memorysettings.Flash</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.memorysettings.Sram</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.memorysettings.ExternalRAM</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.miscellaneous.OtherOptions</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.miscellaneous.OtherObjects</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
</Linker_dictionary>
|
||||
<Name>Release</Name>
|
||||
</Configuration>
|
||||
<Configuration z:Id="i3">
|
||||
<Compiler_dictionary xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>DebugLevel</d4p1:Key>
|
||||
<d4p1:Value>Maximum (-g3)</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>IncludePaths</d4p1:Key>
|
||||
<d4p1:Value>DEBUG</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>MiscellaneousSettings</d4p1:Key>
|
||||
<d4p1:Value>-std=gnu99</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>OptimizationLevel</d4p1:Key>
|
||||
<d4p1:Value>Optimize debugging experience (-Og)</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>SymbolDefines</d4p1:Key>
|
||||
<d4p1:Value>DEBUG</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>SymbolUndefines</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>Verbose</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>WarningsAsErrors</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.CLanguageExp</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.ChangeDefaultCharTypeUnsigned</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.ChangeDefaultBitFieldUnsigned</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.general.processormode</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.preprocessor.DoNotSearchSystemDirectories</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.preprocessor.PreprocessOnly</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.symbols.Default</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.directories.DefaultIncludePath</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.OtherFlags</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.PrepareFunctionsForGarbageCollection</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.PrepareDataForGarbageCollection</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.EnableUnsafeMatchOptimizations</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.EnableFastMath</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.GeneratePositionIndependentCode</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.EnableLongCalls</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.OtherDebuggingFlags</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.GenerateGprofInformation</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.optimization.GenerateProfInformation</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.AllWarnings</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.ExtraWarnings</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.Undefined</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.CheckSyntaxOnly</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.Pedantic</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.PedanticWarningsAsErrors</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.warnings.InhibitAllWarnings</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.Device</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.CompileOnly</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.SupportAnsiPrograms</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.compiler.miscellaneous.MakeFileDependent</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
</Compiler_dictionary>
|
||||
<Linker_dictionary xmlns:d4p1="http://schemas.microsoft.com/2003/10/Serialization/Arrays">
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>Libraries</d4p1:Key>
|
||||
<d4p1:Value>libm</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>LibrarySearchPath</d4p1:Key>
|
||||
<d4p1:Value>$(ProjectDir)\Device_Startup</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>MiscellaneousSettings</d4p1:Key>
|
||||
<d4p1:Value>-Tsame54p20a_flash.ld</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.DoNotUseStandardStartFiles</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.DoNotUseDefaultLibraries</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.NoStartupOrDefaultLibs</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.OmitAllSymbolInformation</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.NoSharedLibraries</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.GenerateMAPFile</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.UseNewlibNano</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.general.AdditionalSpecs</d4p1:Key>
|
||||
<d4p1:Value>None</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.GarbageCollectUnusedSections</d4p1:Key>
|
||||
<d4p1:Value>True</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.EnableUnsafeMatchOptimizations</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.EnableFastMath</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.optimization.GeneratePositionIndependentCode</d4p1:Key>
|
||||
<d4p1:Value>False</d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.memorysettings.Flash</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.memorysettings.Sram</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.memorysettings.ExternalRAM</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.miscellaneous.OtherOptions</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
<d4p1:KeyValueOfstringstring>
|
||||
<d4p1:Key>armgcc.linker.miscellaneous.OtherObjects</d4p1:Key>
|
||||
<d4p1:Value></d4p1:Value>
|
||||
</d4p1:KeyValueOfstringstring>
|
||||
</Linker_dictionary>
|
||||
<Name>Debug</Name>
|
||||
</Configuration>
|
||||
</Configurations>
|
||||
</Configurations>
|
||||
|
|
@ -0,0 +1,163 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Linker script for running in internal FLASH on the SAME54P20A
|
||||
*
|
||||
* Copyright (c) 2019 Microchip Technology Inc.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the Licence at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
SEARCH_DIR(.)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
|
||||
bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000
|
||||
qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000
|
||||
}
|
||||
|
||||
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
|
||||
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000;
|
||||
|
||||
/* Section Definitions */
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sfixed = .;
|
||||
KEEP(*(.vectors .vectors.*))
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.glue_7t) *(.glue_7)
|
||||
*(.rodata .rodata* .gnu.linkonce.r.*)
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
|
||||
/* Support C constructors, and C destructors in both user code
|
||||
and the C library. This also provides support for C++ code. */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
. = ALIGN(4);
|
||||
_efixed = .; /* End of text section */
|
||||
} > rom
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
PROVIDE_HIDDEN (__exidx_start = .);
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > rom
|
||||
PROVIDE_HIDDEN (__exidx_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
|
||||
.relocate : AT (_etext)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_srelocate = .;
|
||||
*(.ramfunc .ramfunc.*);
|
||||
*(.data .data.*);
|
||||
. = ALIGN(4);
|
||||
_erelocate = .;
|
||||
} > ram
|
||||
|
||||
.bkupram (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sbkupram = .;
|
||||
*(.bkupram .bkupram.*);
|
||||
. = ALIGN(8);
|
||||
_ebkupram = .;
|
||||
} > bkupram
|
||||
|
||||
.qspi (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sqspi = .;
|
||||
*(.qspi .qspi.*);
|
||||
. = ALIGN(8);
|
||||
_eqspi = .;
|
||||
} > qspi
|
||||
|
||||
/* .bss section which is used for uninitialized data */
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = . ;
|
||||
_szero = .;
|
||||
*(.bss .bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = . ;
|
||||
_ezero = .;
|
||||
} > ram
|
||||
|
||||
/* stack section */
|
||||
.stack (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sstack = .;
|
||||
. = . + STACK_SIZE;
|
||||
. = ALIGN(8);
|
||||
_estack = .;
|
||||
} > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
_end = . ;
|
||||
}
|
||||
|
|
@ -0,0 +1,162 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Linker script for running in internal SRAM on the SAME54P20A
|
||||
*
|
||||
* Copyright (c) 2019 Microchip Technology Inc.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the Licence at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
SEARCH_DIR(.)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
|
||||
bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000
|
||||
qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000
|
||||
}
|
||||
|
||||
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
|
||||
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000;
|
||||
|
||||
/* Section Definitions */
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sfixed = .;
|
||||
KEEP(*(.vectors .vectors.*))
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.glue_7t) *(.glue_7)
|
||||
*(.rodata .rodata* .gnu.linkonce.r.*)
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
|
||||
/* Support C constructors, and C destructors in both user code
|
||||
and the C library. This also provides support for C++ code. */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
. = ALIGN(4);
|
||||
_efixed = .; /* End of text section */
|
||||
} > ram
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
PROVIDE_HIDDEN (__exidx_start = .);
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > ram
|
||||
PROVIDE_HIDDEN (__exidx_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
|
||||
.relocate : AT (_etext)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_srelocate = .;
|
||||
*(.ramfunc .ramfunc.*);
|
||||
*(.data .data.*);
|
||||
. = ALIGN(4);
|
||||
_erelocate = .;
|
||||
} > ram
|
||||
|
||||
.bkupram (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sbkupram = .;
|
||||
*(.bkupram .bkupram.*);
|
||||
. = ALIGN(8);
|
||||
_ebkupram = .;
|
||||
} > bkupram
|
||||
|
||||
.qspi (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sqspi = .;
|
||||
*(.qspi .qspi.*);
|
||||
. = ALIGN(8);
|
||||
_eqspi = .;
|
||||
} > qspi
|
||||
|
||||
/* .bss section which is used for uninitialized data */
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = . ;
|
||||
_szero = .;
|
||||
*(.bss .bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = . ;
|
||||
_ezero = .;
|
||||
} > ram
|
||||
|
||||
/* stack section */
|
||||
.stack (NOLOAD):
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sstack = .;
|
||||
. = . + STACK_SIZE;
|
||||
. = ALIGN(8);
|
||||
_estack = .;
|
||||
} > ram
|
||||
|
||||
. = ALIGN(4);
|
||||
_end = . ;
|
||||
}
|
||||
|
|
@ -0,0 +1,546 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief gcc starttup file for SAME54
|
||||
*
|
||||
* Copyright (c) 2019 Microchip Technology Inc.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the Licence at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "same54.h"
|
||||
|
||||
/* Initialize segments */
|
||||
extern uint32_t _sfixed;
|
||||
extern uint32_t _efixed;
|
||||
extern uint32_t _etext;
|
||||
extern uint32_t _srelocate;
|
||||
extern uint32_t _erelocate;
|
||||
extern uint32_t _szero;
|
||||
extern uint32_t _ezero;
|
||||
extern uint32_t _sstack;
|
||||
extern uint32_t _estack;
|
||||
|
||||
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
|
||||
int main(void);
|
||||
/** \endcond */
|
||||
|
||||
void __libc_init_array(void);
|
||||
|
||||
/* Default empty handler */
|
||||
void Dummy_Handler(void);
|
||||
|
||||
/* Cortex-M4 core handlers */
|
||||
void NonMaskableInt_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void HardFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void MemManagement_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void BusFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void UsageFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SVCall_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void DebugMonitor_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void PendSV_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SysTick_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
|
||||
/* Peripherals handlers */
|
||||
void PM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void MCLK_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void OSCCTRL_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* OSCCTRL_XOSCFAIL_0, OSCCTRL_XOSCRDY_0 */
|
||||
void OSCCTRL_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* OSCCTRL_XOSCFAIL_1, OSCCTRL_XOSCRDY_1 */
|
||||
void OSCCTRL_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* OSCCTRL_DFLLLOCKC, OSCCTRL_DFLLLOCKF, OSCCTRL_DFLLOOB, OSCCTRL_DFLLRCS, OSCCTRL_DFLLRDY */
|
||||
void OSCCTRL_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* OSCCTRL_DPLLLCKF_0, OSCCTRL_DPLLLCKR_0, OSCCTRL_DPLLLDRTO_0, OSCCTRL_DPLLLTO_0 */
|
||||
void OSCCTRL_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* OSCCTRL_DPLLLCKF_1, OSCCTRL_DPLLLCKR_1, OSCCTRL_DPLLLDRTO_1, OSCCTRL_DPLLLTO_1 */
|
||||
void OSC32KCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SUPC_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SUPC_B12SRDY, SUPC_B33SRDY, SUPC_BOD12RDY, SUPC_BOD33RDY, SUPC_VCORERDY, SUPC_VREGRDY */
|
||||
void SUPC_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SUPC_BOD12DET, SUPC_BOD33DET */
|
||||
void WDT_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void RTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void EIC_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_0 */
|
||||
void EIC_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_1 */
|
||||
void EIC_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_2 */
|
||||
void EIC_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_3 */
|
||||
void EIC_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_4 */
|
||||
void EIC_5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_5 */
|
||||
void EIC_6_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_6 */
|
||||
void EIC_7_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_7 */
|
||||
void EIC_8_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_8 */
|
||||
void EIC_9_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_9 */
|
||||
void EIC_10_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_10 */
|
||||
void EIC_11_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_11 */
|
||||
void EIC_12_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_12 */
|
||||
void EIC_13_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_13 */
|
||||
void EIC_14_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_14 */
|
||||
void EIC_15_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EIC_EXTINT_15 */
|
||||
void FREQM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void NVMCTRL_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* NVMCTRL_0, NVMCTRL_1, NVMCTRL_2, NVMCTRL_3, NVMCTRL_4, NVMCTRL_5, NVMCTRL_6, NVMCTRL_7 */
|
||||
void NVMCTRL_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* NVMCTRL_10, NVMCTRL_8, NVMCTRL_9 */
|
||||
void DMAC_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DMAC_SUSP_0, DMAC_TCMPL_0, DMAC_TERR_0 */
|
||||
void DMAC_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DMAC_SUSP_1, DMAC_TCMPL_1, DMAC_TERR_1 */
|
||||
void DMAC_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DMAC_SUSP_2, DMAC_TCMPL_2, DMAC_TERR_2 */
|
||||
void DMAC_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DMAC_SUSP_3, DMAC_TCMPL_3, DMAC_TERR_3 */
|
||||
void DMAC_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DMAC_SUSP_10, DMAC_SUSP_11, DMAC_SUSP_12, DMAC_SUSP_13, DMAC_SUSP_14, DMAC_SUSP_15, DMAC_SUSP_16, DMAC_SUSP_17, DMAC_SUSP_18, DMAC_SUSP_19, DMAC_SUSP_20, DMAC_SUSP_21, DMAC_SUSP_22, DMAC_SUSP_23, DMAC_SUSP_24, DMAC_SUSP_25, DMAC_SUSP_26, DMAC_SUSP_27, DMAC_SUSP_28, DMAC_SUSP_29, DMAC_SUSP_30, DMAC_SUSP_31, DMAC_SUSP_4, DMAC_SUSP_5, DMAC_SUSP_6, DMAC_SUSP_7, DMAC_SUSP_8, DMAC_SUSP_9, DMAC_TCMPL_10, DMAC_TCMPL_11, DMAC_TCMPL_12, DMAC_TCMPL_13, DMAC_TCMPL_14, DMAC_TCMPL_15, DMAC_TCMPL_16, DMAC_TCMPL_17, DMAC_TCMPL_18, DMAC_TCMPL_19, DMAC_TCMPL_20, DMAC_TCMPL_21, DMAC_TCMPL_22, DMAC_TCMPL_23, DMAC_TCMPL_24, DMAC_TCMPL_25, DMAC_TCMPL_26, DMAC_TCMPL_27, DMAC_TCMPL_28, DMAC_TCMPL_29, DMAC_TCMPL_30, DMAC_TCMPL_31, DMAC_TCMPL_4, DMAC_TCMPL_5, DMAC_TCMPL_6, DMAC_TCMPL_7, DMAC_TCMPL_8, DMAC_TCMPL_9, DMAC_TERR_10, DMAC_TERR_11, DMAC_TERR_12, DMAC_TERR_13, DMAC_TERR_14, DMAC_TERR_15, DMAC_TERR_16, DMAC_TERR_17, DMAC_TERR_18, DMAC_TERR_19, DMAC_TERR_20, DMAC_TERR_21, DMAC_TERR_22, DMAC_TERR_23, DMAC_TERR_24, DMAC_TERR_25, DMAC_TERR_26, DMAC_TERR_27, DMAC_TERR_28, DMAC_TERR_29, DMAC_TERR_30, DMAC_TERR_31, DMAC_TERR_4, DMAC_TERR_5, DMAC_TERR_6, DMAC_TERR_7, DMAC_TERR_8, DMAC_TERR_9 */
|
||||
void EVSYS_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EVSYS_EVD_0, EVSYS_OVR_0 */
|
||||
void EVSYS_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EVSYS_EVD_1, EVSYS_OVR_1 */
|
||||
void EVSYS_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EVSYS_EVD_2, EVSYS_OVR_2 */
|
||||
void EVSYS_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EVSYS_EVD_3, EVSYS_OVR_3 */
|
||||
void EVSYS_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* EVSYS_EVD_10, EVSYS_EVD_11, EVSYS_EVD_4, EVSYS_EVD_5, EVSYS_EVD_6, EVSYS_EVD_7, EVSYS_EVD_8, EVSYS_EVD_9, EVSYS_OVR_10, EVSYS_OVR_11, EVSYS_OVR_4, EVSYS_OVR_5, EVSYS_OVR_6, EVSYS_OVR_7, EVSYS_OVR_8, EVSYS_OVR_9 */
|
||||
void PAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void RAMECC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void SERCOM0_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM0_0 */
|
||||
void SERCOM0_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM0_1 */
|
||||
void SERCOM0_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM0_2 */
|
||||
void SERCOM0_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM0_3, SERCOM0_4, SERCOM0_5, SERCOM0_6 */
|
||||
void SERCOM1_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM1_0 */
|
||||
void SERCOM1_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM1_1 */
|
||||
void SERCOM1_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM1_2 */
|
||||
void SERCOM1_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM1_3, SERCOM1_4, SERCOM1_5, SERCOM1_6 */
|
||||
void SERCOM2_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM2_0 */
|
||||
void SERCOM2_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM2_1 */
|
||||
void SERCOM2_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM2_2 */
|
||||
void SERCOM2_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM2_3, SERCOM2_4, SERCOM2_5, SERCOM2_6 */
|
||||
void SERCOM3_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM3_0 */
|
||||
void SERCOM3_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM3_1 */
|
||||
void SERCOM3_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM3_2 */
|
||||
void SERCOM3_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM3_3, SERCOM3_4, SERCOM3_5, SERCOM3_6 */
|
||||
#ifdef ID_SERCOM4
|
||||
void SERCOM4_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM4_0 */
|
||||
void SERCOM4_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM4_1 */
|
||||
void SERCOM4_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM4_2 */
|
||||
void SERCOM4_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM4_3, SERCOM4_4, SERCOM4_5, SERCOM4_6 */
|
||||
#endif
|
||||
#ifdef ID_SERCOM5
|
||||
void SERCOM5_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM5_0 */
|
||||
void SERCOM5_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM5_1 */
|
||||
void SERCOM5_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM5_2 */
|
||||
void SERCOM5_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM5_3, SERCOM5_4, SERCOM5_5, SERCOM5_6 */
|
||||
#endif
|
||||
#ifdef ID_SERCOM6
|
||||
void SERCOM6_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM6_0 */
|
||||
void SERCOM6_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM6_1 */
|
||||
void SERCOM6_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM6_2 */
|
||||
void SERCOM6_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM6_3, SERCOM6_4, SERCOM6_5, SERCOM6_6 */
|
||||
#endif
|
||||
#ifdef ID_SERCOM7
|
||||
void SERCOM7_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM7_0 */
|
||||
void SERCOM7_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM7_1 */
|
||||
void SERCOM7_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM7_2 */
|
||||
void SERCOM7_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* SERCOM7_3, SERCOM7_4, SERCOM7_5, SERCOM7_6 */
|
||||
#endif
|
||||
#ifdef ID_CAN0
|
||||
void CAN0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_CAN1
|
||||
void CAN1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_USB
|
||||
void USB_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* USB_EORSM_DNRSM, USB_EORST_RST, USB_LPMSUSP_DDISC, USB_LPM_DCONN, USB_MSOF, USB_RAMACER, USB_RXSTP_TXSTP_0, USB_RXSTP_TXSTP_1, USB_RXSTP_TXSTP_2, USB_RXSTP_TXSTP_3, USB_RXSTP_TXSTP_4, USB_RXSTP_TXSTP_5, USB_RXSTP_TXSTP_6, USB_RXSTP_TXSTP_7, USB_STALL0_STALL_0, USB_STALL0_STALL_1, USB_STALL0_STALL_2, USB_STALL0_STALL_3, USB_STALL0_STALL_4, USB_STALL0_STALL_5, USB_STALL0_STALL_6, USB_STALL0_STALL_7, USB_STALL1_0, USB_STALL1_1, USB_STALL1_2, USB_STALL1_3, USB_STALL1_4, USB_STALL1_5, USB_STALL1_6, USB_STALL1_7, USB_SUSPEND, USB_TRFAIL0_TRFAIL_0, USB_TRFAIL0_TRFAIL_1, USB_TRFAIL0_TRFAIL_2, USB_TRFAIL0_TRFAIL_3, USB_TRFAIL0_TRFAIL_4, USB_TRFAIL0_TRFAIL_5, USB_TRFAIL0_TRFAIL_6, USB_TRFAIL0_TRFAIL_7, USB_TRFAIL1_PERR_0, USB_TRFAIL1_PERR_1, USB_TRFAIL1_PERR_2, USB_TRFAIL1_PERR_3, USB_TRFAIL1_PERR_4, USB_TRFAIL1_PERR_5, USB_TRFAIL1_PERR_6, USB_TRFAIL1_PERR_7, USB_UPRSM, USB_WAKEUP */
|
||||
void USB_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* USB_SOF_HSOF */
|
||||
void USB_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* USB_TRCPT0_0, USB_TRCPT0_1, USB_TRCPT0_2, USB_TRCPT0_3, USB_TRCPT0_4, USB_TRCPT0_5, USB_TRCPT0_6, USB_TRCPT0_7 */
|
||||
void USB_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* USB_TRCPT1_0, USB_TRCPT1_1, USB_TRCPT1_2, USB_TRCPT1_3, USB_TRCPT1_4, USB_TRCPT1_5, USB_TRCPT1_6, USB_TRCPT1_7 */
|
||||
#endif
|
||||
#ifdef ID_GMAC
|
||||
void GMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
void TCC0_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_CNT_A, TCC0_DFS_A, TCC0_ERR_A, TCC0_FAULT0_A, TCC0_FAULT1_A, TCC0_FAULTA_A, TCC0_FAULTB_A, TCC0_OVF, TCC0_TRG, TCC0_UFS_A */
|
||||
void TCC0_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_MC_0 */
|
||||
void TCC0_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_MC_1 */
|
||||
void TCC0_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_MC_2 */
|
||||
void TCC0_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_MC_3 */
|
||||
void TCC0_5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_MC_4 */
|
||||
void TCC0_6_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC0_MC_5 */
|
||||
void TCC1_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC1_CNT_A, TCC1_DFS_A, TCC1_ERR_A, TCC1_FAULT0_A, TCC1_FAULT1_A, TCC1_FAULTA_A, TCC1_FAULTB_A, TCC1_OVF, TCC1_TRG, TCC1_UFS_A */
|
||||
void TCC1_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC1_MC_0 */
|
||||
void TCC1_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC1_MC_1 */
|
||||
void TCC1_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC1_MC_2 */
|
||||
void TCC1_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC1_MC_3 */
|
||||
void TCC2_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC2_CNT_A, TCC2_DFS_A, TCC2_ERR_A, TCC2_FAULT0_A, TCC2_FAULT1_A, TCC2_FAULTA_A, TCC2_FAULTB_A, TCC2_OVF, TCC2_TRG, TCC2_UFS_A */
|
||||
void TCC2_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC2_MC_0 */
|
||||
void TCC2_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC2_MC_1 */
|
||||
void TCC2_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC2_MC_2 */
|
||||
#ifdef ID_TCC3
|
||||
void TCC3_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC3_CNT_A, TCC3_DFS_A, TCC3_ERR_A, TCC3_FAULT0_A, TCC3_FAULT1_A, TCC3_FAULTA_A, TCC3_FAULTB_A, TCC3_OVF, TCC3_TRG, TCC3_UFS_A */
|
||||
void TCC3_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC3_MC_0 */
|
||||
void TCC3_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC3_MC_1 */
|
||||
#endif
|
||||
#ifdef ID_TCC4
|
||||
void TCC4_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC4_CNT_A, TCC4_DFS_A, TCC4_ERR_A, TCC4_FAULT0_A, TCC4_FAULT1_A, TCC4_FAULTA_A, TCC4_FAULTB_A, TCC4_OVF, TCC4_TRG, TCC4_UFS_A */
|
||||
void TCC4_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC4_MC_0 */
|
||||
void TCC4_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* TCC4_MC_1 */
|
||||
#endif
|
||||
void TC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TC3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#ifdef ID_TC4
|
||||
void TC4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_TC5
|
||||
void TC5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_TC6
|
||||
void TC6_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_TC7
|
||||
void TC7_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
void PDEC_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* PDEC_DIR_A, PDEC_ERR_A, PDEC_OVF, PDEC_VLC_A */
|
||||
void PDEC_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* PDEC_MC_0 */
|
||||
void PDEC_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* PDEC_MC_1 */
|
||||
void ADC0_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* ADC0_OVERRUN, ADC0_WINMON */
|
||||
void ADC0_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* ADC0_RESRDY */
|
||||
void ADC1_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* ADC1_OVERRUN, ADC1_WINMON */
|
||||
void ADC1_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* ADC1_RESRDY */
|
||||
void AC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void DAC_0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DAC_OVERRUN_A_0, DAC_OVERRUN_A_1, DAC_UNDERRUN_A_0, DAC_UNDERRUN_A_1 */
|
||||
void DAC_1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DAC_EMPTY_0 */
|
||||
void DAC_2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DAC_EMPTY_1 */
|
||||
void DAC_3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DAC_RESRDY_0 */
|
||||
void DAC_4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* DAC_RESRDY_1 */
|
||||
#ifdef ID_I2S
|
||||
void I2S_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
void PCC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void AES_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
void TRNG_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#ifdef ID_ICM
|
||||
void ICM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_PUKCC
|
||||
void PUKCC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
void QSPI_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#ifdef ID_SDHC0
|
||||
void SDHC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
#ifdef ID_SDHC1
|
||||
void SDHC1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||
#endif
|
||||
|
||||
/* Exception Table */
|
||||
__attribute__ ((section(".vectors")))
|
||||
const DeviceVectors exception_table = {
|
||||
|
||||
/* Configure Initial Stack Pointer, using linker-generated symbols */
|
||||
.pvStack = (void*) (&_estack),
|
||||
|
||||
.pfnReset_Handler = (void*) Reset_Handler,
|
||||
.pfnNonMaskableInt_Handler = (void*) NonMaskableInt_Handler,
|
||||
.pfnHardFault_Handler = (void*) HardFault_Handler,
|
||||
.pfnMemManagement_Handler = (void*) MemManagement_Handler,
|
||||
.pfnBusFault_Handler = (void*) BusFault_Handler,
|
||||
.pfnUsageFault_Handler = (void*) UsageFault_Handler,
|
||||
.pvReservedM9 = (void*) (0UL), /* Reserved */
|
||||
.pvReservedM8 = (void*) (0UL), /* Reserved */
|
||||
.pvReservedM7 = (void*) (0UL), /* Reserved */
|
||||
.pvReservedM6 = (void*) (0UL), /* Reserved */
|
||||
.pfnSVCall_Handler = (void*) SVCall_Handler,
|
||||
.pfnDebugMonitor_Handler = (void*) DebugMonitor_Handler,
|
||||
.pvReservedM3 = (void*) (0UL), /* Reserved */
|
||||
.pfnPendSV_Handler = (void*) PendSV_Handler,
|
||||
.pfnSysTick_Handler = (void*) SysTick_Handler,
|
||||
|
||||
/* Configurable interrupts */
|
||||
.pfnPM_Handler = (void*) PM_Handler, /* 0 Power Manager */
|
||||
.pfnMCLK_Handler = (void*) MCLK_Handler, /* 1 Main Clock */
|
||||
.pfnOSCCTRL_0_Handler = (void*) OSCCTRL_0_Handler, /* 2 OSCCTRL_XOSCFAIL_0, OSCCTRL_XOSCRDY_0 */
|
||||
.pfnOSCCTRL_1_Handler = (void*) OSCCTRL_1_Handler, /* 3 OSCCTRL_XOSCFAIL_1, OSCCTRL_XOSCRDY_1 */
|
||||
.pfnOSCCTRL_2_Handler = (void*) OSCCTRL_2_Handler, /* 4 OSCCTRL_DFLLLOCKC, OSCCTRL_DFLLLOCKF, OSCCTRL_DFLLOOB, OSCCTRL_DFLLRCS, OSCCTRL_DFLLRDY */
|
||||
.pfnOSCCTRL_3_Handler = (void*) OSCCTRL_3_Handler, /* 5 OSCCTRL_DPLLLCKF_0, OSCCTRL_DPLLLCKR_0, OSCCTRL_DPLLLDRTO_0, OSCCTRL_DPLLLTO_0 */
|
||||
.pfnOSCCTRL_4_Handler = (void*) OSCCTRL_4_Handler, /* 6 OSCCTRL_DPLLLCKF_1, OSCCTRL_DPLLLCKR_1, OSCCTRL_DPLLLDRTO_1, OSCCTRL_DPLLLTO_1 */
|
||||
.pfnOSC32KCTRL_Handler = (void*) OSC32KCTRL_Handler, /* 7 32kHz Oscillators Control */
|
||||
.pfnSUPC_0_Handler = (void*) SUPC_0_Handler, /* 8 SUPC_B12SRDY, SUPC_B33SRDY, SUPC_BOD12RDY, SUPC_BOD33RDY, SUPC_VCORERDY, SUPC_VREGRDY */
|
||||
.pfnSUPC_1_Handler = (void*) SUPC_1_Handler, /* 9 SUPC_BOD12DET, SUPC_BOD33DET */
|
||||
.pfnWDT_Handler = (void*) WDT_Handler, /* 10 Watchdog Timer */
|
||||
.pfnRTC_Handler = (void*) RTC_Handler, /* 11 Real-Time Counter */
|
||||
.pfnEIC_0_Handler = (void*) EIC_0_Handler, /* 12 EIC_EXTINT_0 */
|
||||
.pfnEIC_1_Handler = (void*) EIC_1_Handler, /* 13 EIC_EXTINT_1 */
|
||||
.pfnEIC_2_Handler = (void*) EIC_2_Handler, /* 14 EIC_EXTINT_2 */
|
||||
.pfnEIC_3_Handler = (void*) EIC_3_Handler, /* 15 EIC_EXTINT_3 */
|
||||
.pfnEIC_4_Handler = (void*) EIC_4_Handler, /* 16 EIC_EXTINT_4 */
|
||||
.pfnEIC_5_Handler = (void*) EIC_5_Handler, /* 17 EIC_EXTINT_5 */
|
||||
.pfnEIC_6_Handler = (void*) EIC_6_Handler, /* 18 EIC_EXTINT_6 */
|
||||
.pfnEIC_7_Handler = (void*) EIC_7_Handler, /* 19 EIC_EXTINT_7 */
|
||||
.pfnEIC_8_Handler = (void*) EIC_8_Handler, /* 20 EIC_EXTINT_8 */
|
||||
.pfnEIC_9_Handler = (void*) EIC_9_Handler, /* 21 EIC_EXTINT_9 */
|
||||
.pfnEIC_10_Handler = (void*) EIC_10_Handler, /* 22 EIC_EXTINT_10 */
|
||||
.pfnEIC_11_Handler = (void*) EIC_11_Handler, /* 23 EIC_EXTINT_11 */
|
||||
.pfnEIC_12_Handler = (void*) EIC_12_Handler, /* 24 EIC_EXTINT_12 */
|
||||
.pfnEIC_13_Handler = (void*) EIC_13_Handler, /* 25 EIC_EXTINT_13 */
|
||||
.pfnEIC_14_Handler = (void*) EIC_14_Handler, /* 26 EIC_EXTINT_14 */
|
||||
.pfnEIC_15_Handler = (void*) EIC_15_Handler, /* 27 EIC_EXTINT_15 */
|
||||
.pfnFREQM_Handler = (void*) FREQM_Handler, /* 28 Frequency Meter */
|
||||
.pfnNVMCTRL_0_Handler = (void*) NVMCTRL_0_Handler, /* 29 NVMCTRL_0, NVMCTRL_1, NVMCTRL_2, NVMCTRL_3, NVMCTRL_4, NVMCTRL_5, NVMCTRL_6, NVMCTRL_7 */
|
||||
.pfnNVMCTRL_1_Handler = (void*) NVMCTRL_1_Handler, /* 30 NVMCTRL_10, NVMCTRL_8, NVMCTRL_9 */
|
||||
.pfnDMAC_0_Handler = (void*) DMAC_0_Handler, /* 31 DMAC_SUSP_0, DMAC_TCMPL_0, DMAC_TERR_0 */
|
||||
.pfnDMAC_1_Handler = (void*) DMAC_1_Handler, /* 32 DMAC_SUSP_1, DMAC_TCMPL_1, DMAC_TERR_1 */
|
||||
.pfnDMAC_2_Handler = (void*) DMAC_2_Handler, /* 33 DMAC_SUSP_2, DMAC_TCMPL_2, DMAC_TERR_2 */
|
||||
.pfnDMAC_3_Handler = (void*) DMAC_3_Handler, /* 34 DMAC_SUSP_3, DMAC_TCMPL_3, DMAC_TERR_3 */
|
||||
.pfnDMAC_4_Handler = (void*) DMAC_4_Handler, /* 35 DMAC_SUSP_10, DMAC_SUSP_11, DMAC_SUSP_12, DMAC_SUSP_13, DMAC_SUSP_14, DMAC_SUSP_15, DMAC_SUSP_16, DMAC_SUSP_17, DMAC_SUSP_18, DMAC_SUSP_19, DMAC_SUSP_20, DMAC_SUSP_21, DMAC_SUSP_22, DMAC_SUSP_23, DMAC_SUSP_24, DMAC_SUSP_25, DMAC_SUSP_26, DMAC_SUSP_27, DMAC_SUSP_28, DMAC_SUSP_29, DMAC_SUSP_30, DMAC_SUSP_31, DMAC_SUSP_4, DMAC_SUSP_5, DMAC_SUSP_6, DMAC_SUSP_7, DMAC_SUSP_8, DMAC_SUSP_9, DMAC_TCMPL_10, DMAC_TCMPL_11, DMAC_TCMPL_12, DMAC_TCMPL_13, DMAC_TCMPL_14, DMAC_TCMPL_15, DMAC_TCMPL_16, DMAC_TCMPL_17, DMAC_TCMPL_18, DMAC_TCMPL_19, DMAC_TCMPL_20, DMAC_TCMPL_21, DMAC_TCMPL_22, DMAC_TCMPL_23, DMAC_TCMPL_24, DMAC_TCMPL_25, DMAC_TCMPL_26, DMAC_TCMPL_27, DMAC_TCMPL_28, DMAC_TCMPL_29, DMAC_TCMPL_30, DMAC_TCMPL_31, DMAC_TCMPL_4, DMAC_TCMPL_5, DMAC_TCMPL_6, DMAC_TCMPL_7, DMAC_TCMPL_8, DMAC_TCMPL_9, DMAC_TERR_10, DMAC_TERR_11, DMAC_TERR_12, DMAC_TERR_13, DMAC_TERR_14, DMAC_TERR_15, DMAC_TERR_16, DMAC_TERR_17, DMAC_TERR_18, DMAC_TERR_19, DMAC_TERR_20, DMAC_TERR_21, DMAC_TERR_22, DMAC_TERR_23, DMAC_TERR_24, DMAC_TERR_25, DMAC_TERR_26, DMAC_TERR_27, DMAC_TERR_28, DMAC_TERR_29, DMAC_TERR_30, DMAC_TERR_31, DMAC_TERR_4, DMAC_TERR_5, DMAC_TERR_6, DMAC_TERR_7, DMAC_TERR_8, DMAC_TERR_9 */
|
||||
.pfnEVSYS_0_Handler = (void*) EVSYS_0_Handler, /* 36 EVSYS_EVD_0, EVSYS_OVR_0 */
|
||||
.pfnEVSYS_1_Handler = (void*) EVSYS_1_Handler, /* 37 EVSYS_EVD_1, EVSYS_OVR_1 */
|
||||
.pfnEVSYS_2_Handler = (void*) EVSYS_2_Handler, /* 38 EVSYS_EVD_2, EVSYS_OVR_2 */
|
||||
.pfnEVSYS_3_Handler = (void*) EVSYS_3_Handler, /* 39 EVSYS_EVD_3, EVSYS_OVR_3 */
|
||||
.pfnEVSYS_4_Handler = (void*) EVSYS_4_Handler, /* 40 EVSYS_EVD_10, EVSYS_EVD_11, EVSYS_EVD_4, EVSYS_EVD_5, EVSYS_EVD_6, EVSYS_EVD_7, EVSYS_EVD_8, EVSYS_EVD_9, EVSYS_OVR_10, EVSYS_OVR_11, EVSYS_OVR_4, EVSYS_OVR_5, EVSYS_OVR_6, EVSYS_OVR_7, EVSYS_OVR_8, EVSYS_OVR_9 */
|
||||
.pfnPAC_Handler = (void*) PAC_Handler, /* 41 Peripheral Access Controller */
|
||||
.pvReserved42 = (void*) (0UL), /* 42 Reserved */
|
||||
.pvReserved43 = (void*) (0UL), /* 43 Reserved */
|
||||
.pvReserved44 = (void*) (0UL), /* 44 Reserved */
|
||||
.pfnRAMECC_Handler = (void*) RAMECC_Handler, /* 45 RAM ECC */
|
||||
.pfnSERCOM0_0_Handler = (void*) SERCOM0_0_Handler, /* 46 SERCOM0_0 */
|
||||
.pfnSERCOM0_1_Handler = (void*) SERCOM0_1_Handler, /* 47 SERCOM0_1 */
|
||||
.pfnSERCOM0_2_Handler = (void*) SERCOM0_2_Handler, /* 48 SERCOM0_2 */
|
||||
.pfnSERCOM0_3_Handler = (void*) SERCOM0_3_Handler, /* 49 SERCOM0_3, SERCOM0_4, SERCOM0_5, SERCOM0_6 */
|
||||
.pfnSERCOM1_0_Handler = (void*) SERCOM1_0_Handler, /* 50 SERCOM1_0 */
|
||||
.pfnSERCOM1_1_Handler = (void*) SERCOM1_1_Handler, /* 51 SERCOM1_1 */
|
||||
.pfnSERCOM1_2_Handler = (void*) SERCOM1_2_Handler, /* 52 SERCOM1_2 */
|
||||
.pfnSERCOM1_3_Handler = (void*) SERCOM1_3_Handler, /* 53 SERCOM1_3, SERCOM1_4, SERCOM1_5, SERCOM1_6 */
|
||||
.pfnSERCOM2_0_Handler = (void*) SERCOM2_0_Handler, /* 54 SERCOM2_0 */
|
||||
.pfnSERCOM2_1_Handler = (void*) SERCOM2_1_Handler, /* 55 SERCOM2_1 */
|
||||
.pfnSERCOM2_2_Handler = (void*) SERCOM2_2_Handler, /* 56 SERCOM2_2 */
|
||||
.pfnSERCOM2_3_Handler = (void*) SERCOM2_3_Handler, /* 57 SERCOM2_3, SERCOM2_4, SERCOM2_5, SERCOM2_6 */
|
||||
.pfnSERCOM3_0_Handler = (void*) SERCOM3_0_Handler, /* 58 SERCOM3_0 */
|
||||
.pfnSERCOM3_1_Handler = (void*) SERCOM3_1_Handler, /* 59 SERCOM3_1 */
|
||||
.pfnSERCOM3_2_Handler = (void*) SERCOM3_2_Handler, /* 60 SERCOM3_2 */
|
||||
.pfnSERCOM3_3_Handler = (void*) SERCOM3_3_Handler, /* 61 SERCOM3_3, SERCOM3_4, SERCOM3_5, SERCOM3_6 */
|
||||
#ifdef ID_SERCOM4
|
||||
.pfnSERCOM4_0_Handler = (void*) SERCOM4_0_Handler, /* 62 SERCOM4_0 */
|
||||
.pfnSERCOM4_1_Handler = (void*) SERCOM4_1_Handler, /* 63 SERCOM4_1 */
|
||||
.pfnSERCOM4_2_Handler = (void*) SERCOM4_2_Handler, /* 64 SERCOM4_2 */
|
||||
.pfnSERCOM4_3_Handler = (void*) SERCOM4_3_Handler, /* 65 SERCOM4_3, SERCOM4_4, SERCOM4_5, SERCOM4_6 */
|
||||
#else
|
||||
.pvReserved62 = (void*) (0UL), /* 62 Reserved */
|
||||
.pvReserved63 = (void*) (0UL), /* 63 Reserved */
|
||||
.pvReserved64 = (void*) (0UL), /* 64 Reserved */
|
||||
.pvReserved65 = (void*) (0UL), /* 65 Reserved */
|
||||
#endif
|
||||
#ifdef ID_SERCOM5
|
||||
.pfnSERCOM5_0_Handler = (void*) SERCOM5_0_Handler, /* 66 SERCOM5_0 */
|
||||
.pfnSERCOM5_1_Handler = (void*) SERCOM5_1_Handler, /* 67 SERCOM5_1 */
|
||||
.pfnSERCOM5_2_Handler = (void*) SERCOM5_2_Handler, /* 68 SERCOM5_2 */
|
||||
.pfnSERCOM5_3_Handler = (void*) SERCOM5_3_Handler, /* 69 SERCOM5_3, SERCOM5_4, SERCOM5_5, SERCOM5_6 */
|
||||
#else
|
||||
.pvReserved66 = (void*) (0UL), /* 66 Reserved */
|
||||
.pvReserved67 = (void*) (0UL), /* 67 Reserved */
|
||||
.pvReserved68 = (void*) (0UL), /* 68 Reserved */
|
||||
.pvReserved69 = (void*) (0UL), /* 69 Reserved */
|
||||
#endif
|
||||
#ifdef ID_SERCOM6
|
||||
.pfnSERCOM6_0_Handler = (void*) SERCOM6_0_Handler, /* 70 SERCOM6_0 */
|
||||
.pfnSERCOM6_1_Handler = (void*) SERCOM6_1_Handler, /* 71 SERCOM6_1 */
|
||||
.pfnSERCOM6_2_Handler = (void*) SERCOM6_2_Handler, /* 72 SERCOM6_2 */
|
||||
.pfnSERCOM6_3_Handler = (void*) SERCOM6_3_Handler, /* 73 SERCOM6_3, SERCOM6_4, SERCOM6_5, SERCOM6_6 */
|
||||
#else
|
||||
.pvReserved70 = (void*) (0UL), /* 70 Reserved */
|
||||
.pvReserved71 = (void*) (0UL), /* 71 Reserved */
|
||||
.pvReserved72 = (void*) (0UL), /* 72 Reserved */
|
||||
.pvReserved73 = (void*) (0UL), /* 73 Reserved */
|
||||
#endif
|
||||
#ifdef ID_SERCOM7
|
||||
.pfnSERCOM7_0_Handler = (void*) SERCOM7_0_Handler, /* 74 SERCOM7_0 */
|
||||
.pfnSERCOM7_1_Handler = (void*) SERCOM7_1_Handler, /* 75 SERCOM7_1 */
|
||||
.pfnSERCOM7_2_Handler = (void*) SERCOM7_2_Handler, /* 76 SERCOM7_2 */
|
||||
.pfnSERCOM7_3_Handler = (void*) SERCOM7_3_Handler, /* 77 SERCOM7_3, SERCOM7_4, SERCOM7_5, SERCOM7_6 */
|
||||
#else
|
||||
.pvReserved74 = (void*) (0UL), /* 74 Reserved */
|
||||
.pvReserved75 = (void*) (0UL), /* 75 Reserved */
|
||||
.pvReserved76 = (void*) (0UL), /* 76 Reserved */
|
||||
.pvReserved77 = (void*) (0UL), /* 77 Reserved */
|
||||
#endif
|
||||
#ifdef ID_CAN0
|
||||
.pfnCAN0_Handler = (void*) CAN0_Handler, /* 78 Control Area Network 0 */
|
||||
#else
|
||||
.pvReserved78 = (void*) (0UL), /* 78 Reserved */
|
||||
#endif
|
||||
#ifdef ID_CAN1
|
||||
.pfnCAN1_Handler = (void*) CAN1_Handler, /* 79 Control Area Network 1 */
|
||||
#else
|
||||
.pvReserved79 = (void*) (0UL), /* 79 Reserved */
|
||||
#endif
|
||||
#ifdef ID_USB
|
||||
.pfnUSB_0_Handler = (void*) USB_0_Handler, /* 80 USB_EORSM_DNRSM, USB_EORST_RST, USB_LPMSUSP_DDISC, USB_LPM_DCONN, USB_MSOF, USB_RAMACER, USB_RXSTP_TXSTP_0, USB_RXSTP_TXSTP_1, USB_RXSTP_TXSTP_2, USB_RXSTP_TXSTP_3, USB_RXSTP_TXSTP_4, USB_RXSTP_TXSTP_5, USB_RXSTP_TXSTP_6, USB_RXSTP_TXSTP_7, USB_STALL0_STALL_0, USB_STALL0_STALL_1, USB_STALL0_STALL_2, USB_STALL0_STALL_3, USB_STALL0_STALL_4, USB_STALL0_STALL_5, USB_STALL0_STALL_6, USB_STALL0_STALL_7, USB_STALL1_0, USB_STALL1_1, USB_STALL1_2, USB_STALL1_3, USB_STALL1_4, USB_STALL1_5, USB_STALL1_6, USB_STALL1_7, USB_SUSPEND, USB_TRFAIL0_TRFAIL_0, USB_TRFAIL0_TRFAIL_1, USB_TRFAIL0_TRFAIL_2, USB_TRFAIL0_TRFAIL_3, USB_TRFAIL0_TRFAIL_4, USB_TRFAIL0_TRFAIL_5, USB_TRFAIL0_TRFAIL_6, USB_TRFAIL0_TRFAIL_7, USB_TRFAIL1_PERR_0, USB_TRFAIL1_PERR_1, USB_TRFAIL1_PERR_2, USB_TRFAIL1_PERR_3, USB_TRFAIL1_PERR_4, USB_TRFAIL1_PERR_5, USB_TRFAIL1_PERR_6, USB_TRFAIL1_PERR_7, USB_UPRSM, USB_WAKEUP */
|
||||
.pfnUSB_1_Handler = (void*) USB_1_Handler, /* 81 USB_SOF_HSOF */
|
||||
.pfnUSB_2_Handler = (void*) USB_2_Handler, /* 82 USB_TRCPT0_0, USB_TRCPT0_1, USB_TRCPT0_2, USB_TRCPT0_3, USB_TRCPT0_4, USB_TRCPT0_5, USB_TRCPT0_6, USB_TRCPT0_7 */
|
||||
.pfnUSB_3_Handler = (void*) USB_3_Handler, /* 83 USB_TRCPT1_0, USB_TRCPT1_1, USB_TRCPT1_2, USB_TRCPT1_3, USB_TRCPT1_4, USB_TRCPT1_5, USB_TRCPT1_6, USB_TRCPT1_7 */
|
||||
#else
|
||||
.pvReserved80 = (void*) (0UL), /* 80 Reserved */
|
||||
.pvReserved81 = (void*) (0UL), /* 81 Reserved */
|
||||
.pvReserved82 = (void*) (0UL), /* 82 Reserved */
|
||||
.pvReserved83 = (void*) (0UL), /* 83 Reserved */
|
||||
#endif
|
||||
#ifdef ID_GMAC
|
||||
.pfnGMAC_Handler = (void*) GMAC_Handler, /* 84 Ethernet MAC */
|
||||
#else
|
||||
.pvReserved84 = (void*) (0UL), /* 84 Reserved */
|
||||
#endif
|
||||
.pfnTCC0_0_Handler = (void*) TCC0_0_Handler, /* 85 TCC0_CNT_A, TCC0_DFS_A, TCC0_ERR_A, TCC0_FAULT0_A, TCC0_FAULT1_A, TCC0_FAULTA_A, TCC0_FAULTB_A, TCC0_OVF, TCC0_TRG, TCC0_UFS_A */
|
||||
.pfnTCC0_1_Handler = (void*) TCC0_1_Handler, /* 86 TCC0_MC_0 */
|
||||
.pfnTCC0_2_Handler = (void*) TCC0_2_Handler, /* 87 TCC0_MC_1 */
|
||||
.pfnTCC0_3_Handler = (void*) TCC0_3_Handler, /* 88 TCC0_MC_2 */
|
||||
.pfnTCC0_4_Handler = (void*) TCC0_4_Handler, /* 89 TCC0_MC_3 */
|
||||
.pfnTCC0_5_Handler = (void*) TCC0_5_Handler, /* 90 TCC0_MC_4 */
|
||||
.pfnTCC0_6_Handler = (void*) TCC0_6_Handler, /* 91 TCC0_MC_5 */
|
||||
.pfnTCC1_0_Handler = (void*) TCC1_0_Handler, /* 92 TCC1_CNT_A, TCC1_DFS_A, TCC1_ERR_A, TCC1_FAULT0_A, TCC1_FAULT1_A, TCC1_FAULTA_A, TCC1_FAULTB_A, TCC1_OVF, TCC1_TRG, TCC1_UFS_A */
|
||||
.pfnTCC1_1_Handler = (void*) TCC1_1_Handler, /* 93 TCC1_MC_0 */
|
||||
.pfnTCC1_2_Handler = (void*) TCC1_2_Handler, /* 94 TCC1_MC_1 */
|
||||
.pfnTCC1_3_Handler = (void*) TCC1_3_Handler, /* 95 TCC1_MC_2 */
|
||||
.pfnTCC1_4_Handler = (void*) TCC1_4_Handler, /* 96 TCC1_MC_3 */
|
||||
.pfnTCC2_0_Handler = (void*) TCC2_0_Handler, /* 97 TCC2_CNT_A, TCC2_DFS_A, TCC2_ERR_A, TCC2_FAULT0_A, TCC2_FAULT1_A, TCC2_FAULTA_A, TCC2_FAULTB_A, TCC2_OVF, TCC2_TRG, TCC2_UFS_A */
|
||||
.pfnTCC2_1_Handler = (void*) TCC2_1_Handler, /* 98 TCC2_MC_0 */
|
||||
.pfnTCC2_2_Handler = (void*) TCC2_2_Handler, /* 99 TCC2_MC_1 */
|
||||
.pfnTCC2_3_Handler = (void*) TCC2_3_Handler, /* 100 TCC2_MC_2 */
|
||||
#ifdef ID_TCC3
|
||||
.pfnTCC3_0_Handler = (void*) TCC3_0_Handler, /* 101 TCC3_CNT_A, TCC3_DFS_A, TCC3_ERR_A, TCC3_FAULT0_A, TCC3_FAULT1_A, TCC3_FAULTA_A, TCC3_FAULTB_A, TCC3_OVF, TCC3_TRG, TCC3_UFS_A */
|
||||
.pfnTCC3_1_Handler = (void*) TCC3_1_Handler, /* 102 TCC3_MC_0 */
|
||||
.pfnTCC3_2_Handler = (void*) TCC3_2_Handler, /* 103 TCC3_MC_1 */
|
||||
#else
|
||||
.pvReserved101 = (void*) (0UL), /* 101 Reserved */
|
||||
.pvReserved102 = (void*) (0UL), /* 102 Reserved */
|
||||
.pvReserved103 = (void*) (0UL), /* 103 Reserved */
|
||||
#endif
|
||||
#ifdef ID_TCC4
|
||||
.pfnTCC4_0_Handler = (void*) TCC4_0_Handler, /* 104 TCC4_CNT_A, TCC4_DFS_A, TCC4_ERR_A, TCC4_FAULT0_A, TCC4_FAULT1_A, TCC4_FAULTA_A, TCC4_FAULTB_A, TCC4_OVF, TCC4_TRG, TCC4_UFS_A */
|
||||
.pfnTCC4_1_Handler = (void*) TCC4_1_Handler, /* 105 TCC4_MC_0 */
|
||||
.pfnTCC4_2_Handler = (void*) TCC4_2_Handler, /* 106 TCC4_MC_1 */
|
||||
#else
|
||||
.pvReserved104 = (void*) (0UL), /* 104 Reserved */
|
||||
.pvReserved105 = (void*) (0UL), /* 105 Reserved */
|
||||
.pvReserved106 = (void*) (0UL), /* 106 Reserved */
|
||||
#endif
|
||||
.pfnTC0_Handler = (void*) TC0_Handler, /* 107 Basic Timer Counter 0 */
|
||||
.pfnTC1_Handler = (void*) TC1_Handler, /* 108 Basic Timer Counter 1 */
|
||||
.pfnTC2_Handler = (void*) TC2_Handler, /* 109 Basic Timer Counter 2 */
|
||||
.pfnTC3_Handler = (void*) TC3_Handler, /* 110 Basic Timer Counter 3 */
|
||||
#ifdef ID_TC4
|
||||
.pfnTC4_Handler = (void*) TC4_Handler, /* 111 Basic Timer Counter 4 */
|
||||
#else
|
||||
.pvReserved111 = (void*) (0UL), /* 111 Reserved */
|
||||
#endif
|
||||
#ifdef ID_TC5
|
||||
.pfnTC5_Handler = (void*) TC5_Handler, /* 112 Basic Timer Counter 5 */
|
||||
#else
|
||||
.pvReserved112 = (void*) (0UL), /* 112 Reserved */
|
||||
#endif
|
||||
#ifdef ID_TC6
|
||||
.pfnTC6_Handler = (void*) TC6_Handler, /* 113 Basic Timer Counter 6 */
|
||||
#else
|
||||
.pvReserved113 = (void*) (0UL), /* 113 Reserved */
|
||||
#endif
|
||||
#ifdef ID_TC7
|
||||
.pfnTC7_Handler = (void*) TC7_Handler, /* 114 Basic Timer Counter 7 */
|
||||
#else
|
||||
.pvReserved114 = (void*) (0UL), /* 114 Reserved */
|
||||
#endif
|
||||
.pfnPDEC_0_Handler = (void*) PDEC_0_Handler, /* 115 PDEC_DIR_A, PDEC_ERR_A, PDEC_OVF, PDEC_VLC_A */
|
||||
.pfnPDEC_1_Handler = (void*) PDEC_1_Handler, /* 116 PDEC_MC_0 */
|
||||
.pfnPDEC_2_Handler = (void*) PDEC_2_Handler, /* 117 PDEC_MC_1 */
|
||||
.pfnADC0_0_Handler = (void*) ADC0_0_Handler, /* 118 ADC0_OVERRUN, ADC0_WINMON */
|
||||
.pfnADC0_1_Handler = (void*) ADC0_1_Handler, /* 119 ADC0_RESRDY */
|
||||
.pfnADC1_0_Handler = (void*) ADC1_0_Handler, /* 120 ADC1_OVERRUN, ADC1_WINMON */
|
||||
.pfnADC1_1_Handler = (void*) ADC1_1_Handler, /* 121 ADC1_RESRDY */
|
||||
.pfnAC_Handler = (void*) AC_Handler, /* 122 Analog Comparators */
|
||||
.pfnDAC_0_Handler = (void*) DAC_0_Handler, /* 123 DAC_OVERRUN_A_0, DAC_OVERRUN_A_1, DAC_UNDERRUN_A_0, DAC_UNDERRUN_A_1 */
|
||||
.pfnDAC_1_Handler = (void*) DAC_1_Handler, /* 124 DAC_EMPTY_0 */
|
||||
.pfnDAC_2_Handler = (void*) DAC_2_Handler, /* 125 DAC_EMPTY_1 */
|
||||
.pfnDAC_3_Handler = (void*) DAC_3_Handler, /* 126 DAC_RESRDY_0 */
|
||||
.pfnDAC_4_Handler = (void*) DAC_4_Handler, /* 127 DAC_RESRDY_1 */
|
||||
#ifdef ID_I2S
|
||||
.pfnI2S_Handler = (void*) I2S_Handler, /* 128 Inter-IC Sound Interface */
|
||||
#else
|
||||
.pvReserved128 = (void*) (0UL), /* 128 Reserved */
|
||||
#endif
|
||||
.pfnPCC_Handler = (void*) PCC_Handler, /* 129 Parallel Capture Controller */
|
||||
.pfnAES_Handler = (void*) AES_Handler, /* 130 Advanced Encryption Standard */
|
||||
.pfnTRNG_Handler = (void*) TRNG_Handler, /* 131 True Random Generator */
|
||||
#ifdef ID_ICM
|
||||
.pfnICM_Handler = (void*) ICM_Handler, /* 132 Integrity Check Monitor */
|
||||
#else
|
||||
.pvReserved132 = (void*) (0UL), /* 132 Reserved */
|
||||
#endif
|
||||
#ifdef ID_PUKCC
|
||||
.pfnPUKCC_Handler = (void*) PUKCC_Handler, /* 133 PUblic-Key Cryptography Controller */
|
||||
#else
|
||||
.pvReserved133 = (void*) (0UL), /* 133 Reserved */
|
||||
#endif
|
||||
.pfnQSPI_Handler = (void*) QSPI_Handler, /* 134 Quad SPI interface */
|
||||
#ifdef ID_SDHC0
|
||||
.pfnSDHC0_Handler = (void*) SDHC0_Handler, /* 135 SD/MMC Host Controller 0 */
|
||||
#else
|
||||
.pvReserved135 = (void*) (0UL), /* 135 Reserved */
|
||||
#endif
|
||||
#ifdef ID_SDHC1
|
||||
.pfnSDHC1_Handler = (void*) SDHC1_Handler /* 136 SD/MMC Host Controller 1 */
|
||||
#else
|
||||
.pvReserved136 = (void*) (0UL) /* 136 Reserved */
|
||||
#endif
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief This is the code that gets called on processor reset.
|
||||
* To initialize the device, and call the main() routine.
|
||||
*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
uint32_t *pSrc, *pDest;
|
||||
|
||||
/* Initialize the relocate segment */
|
||||
pSrc = &_etext;
|
||||
pDest = &_srelocate;
|
||||
|
||||
if (pSrc != pDest) {
|
||||
for (; pDest < &_erelocate;) {
|
||||
*pDest++ = *pSrc++;
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear the zero segment */
|
||||
for (pDest = &_szero; pDest < &_ezero;) {
|
||||
*pDest++ = 0;
|
||||
}
|
||||
|
||||
/* Set the vector table base address */
|
||||
pSrc = (uint32_t *) & _sfixed;
|
||||
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
|
||||
|
||||
#if __FPU_USED
|
||||
/* Enable FPU */
|
||||
SCB->CPACR |= (0xFu << 20);
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
|
||||
/* Initialize the C library */
|
||||
__libc_init_array();
|
||||
|
||||
/* Branch to main function */
|
||||
main();
|
||||
|
||||
/* Infinite loop */
|
||||
while (1);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Default interrupt handler for unused IRQs.
|
||||
*/
|
||||
void Dummy_Handler(void)
|
||||
{
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Low-level initialization functions called upon chip startup.
|
||||
*
|
||||
* Copyright (c) 2019 Microchip Technology Inc.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the Licence at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "same54.h"
|
||||
|
||||
/**
|
||||
* Initial system clock frequency. The System RC Oscillator (RCSYS) provides
|
||||
* the source for the main clock at chip startup.
|
||||
*/
|
||||
#define __SYSTEM_CLOCK (48000000)
|
||||
|
||||
uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/
|
||||
|
||||
/**
|
||||
* Initialize the system
|
||||
*
|
||||
* @brief Setup the microcontroller system.
|
||||
* Initialize the System and update the SystemCoreClock variable.
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
// Keep the default device state after reset
|
||||
SystemCoreClock = __SYSTEM_CLOCK;
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* Update SystemCoreClock variable
|
||||
*
|
||||
* @brief Updates the SystemCoreClock with current core Clock
|
||||
* retrieved from cpu registers.
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
// Not implemented
|
||||
SystemCoreClock = __SYSTEM_CLOCK;
|
||||
return;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,12 @@
|
|||
#include <atmel_start.h>
|
||||
|
||||
/**
|
||||
* Initializes MCU, drivers and middleware in the project
|
||||
**/
|
||||
void atmel_start_init(void)
|
||||
{
|
||||
system_init();
|
||||
/* Set floating point coprosessor access mode. */
|
||||
SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */
|
||||
(3UL << 11*2) ); /* set CP11 Full Access */
|
||||
}
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
#ifndef ATMEL_START_H_INCLUDED
|
||||
#define ATMEL_START_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "driver_init.h"
|
||||
|
||||
/**
|
||||
* Initializes MCU, drivers and middleware in the project
|
||||
**/
|
||||
void atmel_start_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
/*
|
||||
* Code generated from Atmel Start.
|
||||
*
|
||||
* This file will be overwritten when reconfiguring your Atmel Start project.
|
||||
* Please copy examples or other code you want to keep to a separate file
|
||||
* to avoid losing it when reconfiguring.
|
||||
*/
|
||||
#ifndef ATMEL_START_PINS_H_INCLUDED
|
||||
#define ATMEL_START_PINS_H_INCLUDED
|
||||
|
||||
#include <hal_gpio.h>
|
||||
|
||||
// SAME54 has 14 pin functions
|
||||
|
||||
#define GPIO_PIN_FUNCTION_A 0
|
||||
#define GPIO_PIN_FUNCTION_B 1
|
||||
#define GPIO_PIN_FUNCTION_C 2
|
||||
#define GPIO_PIN_FUNCTION_D 3
|
||||
#define GPIO_PIN_FUNCTION_E 4
|
||||
#define GPIO_PIN_FUNCTION_F 5
|
||||
#define GPIO_PIN_FUNCTION_G 6
|
||||
#define GPIO_PIN_FUNCTION_H 7
|
||||
#define GPIO_PIN_FUNCTION_I 8
|
||||
#define GPIO_PIN_FUNCTION_J 9
|
||||
#define GPIO_PIN_FUNCTION_K 10
|
||||
#define GPIO_PIN_FUNCTION_L 11
|
||||
#define GPIO_PIN_FUNCTION_M 12
|
||||
#define GPIO_PIN_FUNCTION_N 13
|
||||
|
||||
#define HALL_C GPIO(GPIO_PORTA, 4)
|
||||
#define HALL_B GPIO(GPIO_PORTA, 5)
|
||||
#define HALL_A GPIO(GPIO_PORTA, 6)
|
||||
#define M2_4 GPIO(GPIO_PORTA, 16)
|
||||
#define M2_5 GPIO(GPIO_PORTA, 17)
|
||||
#define M3_3 GPIO(GPIO_PORTA, 18)
|
||||
#define DRV_ENA GPIO(GPIO_PORTA, 22)
|
||||
#define DRV_INA GPIO(GPIO_PORTA, 23)
|
||||
#define DRV_RESET GPIO(GPIO_PORTA, 27)
|
||||
#define ECAT_SPI_CS_PIN GPIO(GPIO_PORTB, 0)
|
||||
#define PB01 GPIO(GPIO_PORTB, 1)
|
||||
#define PB08 GPIO(GPIO_PORTB, 8)
|
||||
#define PB09 GPIO(GPIO_PORTB, 9)
|
||||
#define M3_4 GPIO(GPIO_PORTB, 14)
|
||||
#define M3_5 GPIO(GPIO_PORTB, 15)
|
||||
#define PB16 GPIO(GPIO_PORTB, 16)
|
||||
#define PB17 GPIO(GPIO_PORTB, 17)
|
||||
#define DRV_INC GPIO(GPIO_PORTB, 26)
|
||||
#define DRV_INB GPIO(GPIO_PORTB, 27)
|
||||
#define DRV_ENB GPIO(GPIO_PORTB, 28)
|
||||
#define DRV_ENC GPIO(GPIO_PORTB, 29)
|
||||
#define SW0 GPIO(GPIO_PORTB, 31)
|
||||
#define DEBUG_1 GPIO(GPIO_PORTC, 1)
|
||||
#define DEBUG_3 GPIO(GPIO_PORTC, 2)
|
||||
#define DEBUG_2 GPIO(GPIO_PORTC, 3)
|
||||
#define M2_0 GPIO(GPIO_PORTC, 4)
|
||||
#define M3_2 GPIO(GPIO_PORTC, 14)
|
||||
#define LED0 GPIO(GPIO_PORTC, 18)
|
||||
#define M3_0 GPIO(GPIO_PORTC, 22)
|
||||
#define M3_1 GPIO(GPIO_PORTC, 23)
|
||||
#define DEBUG_4 GPIO(GPIO_PORTC, 30)
|
||||
#define M2_1 GPIO(GPIO_PORTD, 8)
|
||||
#define M2_2 GPIO(GPIO_PORTD, 9)
|
||||
#define M2_3 GPIO(GPIO_PORTD, 10)
|
||||
#define DEBUG_5 GPIO(GPIO_PORTD, 11)
|
||||
|
||||
#endif // ATMEL_START_PINS_H_INCLUDED
|
||||
|
|
@ -0,0 +1,646 @@
|
|||
/*
|
||||
* bldc.c
|
||||
*
|
||||
* Created: 10/03/2021 14:53:19
|
||||
* Author: Nick-XMG
|
||||
*/
|
||||
|
||||
|
||||
#include "bldc.h"
|
||||
#include "utilities.h"
|
||||
// ----------------------------------------------------------------------
|
||||
// header files
|
||||
// ----------------------------------------------------------------------
|
||||
#include "arm_math.h"
|
||||
#include "statemachine.h"
|
||||
#include "utilities.h"
|
||||
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
// Current Selection Based on Hall State
|
||||
// Direction":
|
||||
// CW -> Always positive current
|
||||
// CCW -> Always negative current
|
||||
void select_active_phase(BLDCMotor_t *Motor, const uint8_t hall_state)
|
||||
{
|
||||
volatile float32_t phase_current = 0;
|
||||
switch(hall_state)
|
||||
{
|
||||
case 0b001: case 0b011:
|
||||
phase_current = Motor->Iphase_pu.C;
|
||||
break;
|
||||
|
||||
case 0b010: case 0b110:
|
||||
phase_current = Motor->Iphase_pu.B;
|
||||
break;
|
||||
|
||||
case 0b100: case 0b101:
|
||||
phase_current = Motor->Iphase_pu.A;
|
||||
break;
|
||||
|
||||
default :
|
||||
//phase_current = 0; // Invalid hall code
|
||||
break;
|
||||
}
|
||||
|
||||
Motor->Iphase_pu.Bus = phase_current;
|
||||
}
|
||||
|
||||
void BldcInitStruct(BLDCMotor_t *motor)
|
||||
{
|
||||
// ----------------------------------------------------------------------
|
||||
// Initialize all voltage and current objects, variables and helpers:
|
||||
motor->motor_status.actualDirection = 0;
|
||||
motor->motor_setpoints.desiredDirection = 0;
|
||||
motor->motor_status.duty_cycle = 0;
|
||||
motor->motor_status.calc_rpm = 0;
|
||||
motor->motor_status.Num_Steps = 0;
|
||||
motor->motor_status.cur_comm_step = 0;
|
||||
motor->motor_status.currentHallPattern = 1;
|
||||
motor->motor_status.nextHallPattern = 3;
|
||||
motor->motor_setpoints.directionOffset = 0;
|
||||
|
||||
//motor->hall_state = 1;
|
||||
//motor->dir_hall_code = 1;
|
||||
|
||||
motor->Iphase_pu.A = 0;
|
||||
motor->Iphase_pu.B = 0;
|
||||
motor->Iphase_pu.C = 0;
|
||||
motor->Iphase_pu.Bus = 0;
|
||||
motor->Voffset_lsb.A = 0;
|
||||
motor->Voffset_lsb.B = 0;
|
||||
motor->timerflags.pwm_cycle_tic = false;
|
||||
motor->timerflags.control_loop_tic = false;
|
||||
motor->timerflags.motor_telemetry_flag = false;
|
||||
motor->timerflags.control_loop_tic = false;
|
||||
motor->timerflags.adc_readings_ready_tic = false;
|
||||
|
||||
motor->regulation_loop_count = 0;
|
||||
|
||||
|
||||
motor->VdcBus_pu = DEVICE_DC_VOLTAGE_V;
|
||||
motor->VoneByDcBus_pu = 1.0f/DEVICE_DC_VOLTAGE_V;
|
||||
motor->motor_commutation_Pattern = COMMUTATION_PATTERN_M1;
|
||||
|
||||
|
||||
motor->motor_setpoints.desired_torque = 0.0;
|
||||
motor->motor_setpoints.desired_speed = 0;
|
||||
motor->motor_setpoints.desired_position = 0;
|
||||
motor->motor_setpoints.max_current = 0.0;
|
||||
motor->motor_setpoints.max_torque = 0.0;
|
||||
motor->motor_setpoints.max_velocity = 0;
|
||||
|
||||
// ------------------------------------------------------------------------------
|
||||
// Function
|
||||
// ------------------------------------------------------------------------------
|
||||
//motor->ReadHall = HallFunc;
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
//// pi current control init
|
||||
PI_objectInit(&motor->controllers.Pi_Idc);
|
||||
float32_t motorLs_H = MOTOR_LQ_H * 2.0f;
|
||||
float32_t motorRs_OHM = MOTOR_RS_OHM * 2.0f;
|
||||
motor->controllers.Pi_Idc.Kp = PI_calcKp(motorLs_H, DEVICE_SHUNT_CURRENT_A, DEVICE_DC_VOLTAGE_V, DEVICE_ISR_PERIOD_Sec);
|
||||
//Pi_Idc.Ki = 0;
|
||||
motor->controllers.Pi_Idc.Ki = PI_calcKi(motorRs_OHM, motorLs_H, DEVICE_ISR_PERIOD_Sec);
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
//// pi velocity control init
|
||||
PID_objectInit(&motor->controllers.Pid_Speed);
|
||||
|
||||
/* V only Control Gains */
|
||||
//motor->controllers.Pid_Speed.Kp = 0.005f;
|
||||
//motor->controllers.Pid_Speed.Ki = 0.01f;
|
||||
|
||||
/* VI Control Gains */
|
||||
//motor->controllers.Pid_Speed.Kp = 0.0003f;
|
||||
//motor->controllers.Pid_Speed.Ki = 0.001f;
|
||||
motor->controllers.Pid_Speed.Kp = 0.0005f;
|
||||
motor->controllers.Pid_Speed.Ki = 0.0f;
|
||||
motor->controllers.Pid_Speed.Kd = 0.0001f;
|
||||
|
||||
//motor->controllers.Pid_Speed.Ki = 0.0001f;
|
||||
motor->controllers.Pid_Speed.OutMax_pu = (MOTOR_MAX_CURRENT_IDC_A);
|
||||
motor->controllers.Pid_Speed.OutMin_pu = -(MOTOR_MAX_CURRENT_IDC_A);
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
//// pi position control init
|
||||
PI_objectInit(&motor->controllers.Pi_Pos);
|
||||
motor->controllers.Pi_Pos.Kp = 40.0f;
|
||||
motor->controllers.Pi_Pos.Ki = 0.0f;
|
||||
|
||||
//motor->controllers.Pi_Pos.Ki = 0.00015f;
|
||||
//Pi_Pos.Kp = 500000;
|
||||
//Pi_Pos.Kp = 0;
|
||||
|
||||
motor->controllers.Pi_Pos.OutMax_pu = MOTOR_MAX_SPD_RPM;
|
||||
motor->controllers.Pi_Pos.OutMin_pu = -MOTOR_MAX_SPD_RPM;
|
||||
}
|
||||
|
||||
void BldcInitFunctions()
|
||||
{
|
||||
//Motor1.ReadHall = readM1Hall;
|
||||
//Motor2.ReadHall = readM2Hall;
|
||||
//Motor3.ReadHall = readM3Hall;
|
||||
//Motor1.DisableMotor = DisableM1GateDrivers;
|
||||
//Motor2.DisableMotor = DisableM2GateDrivers;
|
||||
//Motor3.DisableMotor = DisableM3GateDrivers;
|
||||
//Motor1.SetDutyCycle = SetM1DutyCycle;
|
||||
//Motor2.SetDutyCycle = SetM2DutyCycle;
|
||||
//Motor3.SetDutyCycle = SetM3DutyCycle;
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Before Power up, Measure and average offset voltage for Current Sensor
|
||||
// This voltage is subtracted from all reading for Bi-Directional Current
|
||||
// Measurement
|
||||
// ----------------------------------------------------------------------
|
||||
void read_zero_current_offset_value(BLDCMotor_t *motor)
|
||||
{
|
||||
uint32_t phase_A_zero_current_offset_temp = 0;
|
||||
uint32_t phase_B_zero_current_offset_temp = 0;
|
||||
volatile uint16_t zero_current_offset_temp[2] = {0,0};
|
||||
uint8_t samples = 16;
|
||||
uint8_t i;
|
||||
|
||||
adc_sync_enable_channel(&ADC_0, 0);
|
||||
//adc_sync_enable_channel(&ADC_1, 0);
|
||||
|
||||
ADC0->INPUTCTRL.reg = 0x1802;
|
||||
while (ADC0->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
|
||||
|
||||
for (i=0; i<samples; i++)
|
||||
{
|
||||
volatile uint16_t zero_current_offset_temp[2] = {0,0};
|
||||
|
||||
while (ADC0->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
|
||||
ADC0->SWTRIG.bit.START = true; /* Start the ADC using a software trigger. */
|
||||
while (ADC0->INTFLAG.bit.RESRDY == 0); /* Wait for the result ready flag to be set. */
|
||||
ADC0->INTFLAG.reg = ADC_INTFLAG_RESRDY; /* Clear the flag. */
|
||||
zero_current_offset_temp[0] = ADC0->RESULT.reg; /* Read the value. */
|
||||
|
||||
phase_A_zero_current_offset_temp += zero_current_offset_temp[0];
|
||||
}
|
||||
|
||||
/* Set Motor Variables */
|
||||
motor->Voffset_lsb.A = phase_A_zero_current_offset_temp/samples;
|
||||
|
||||
ADC0->INPUTCTRL.reg = 0x1803;
|
||||
while (ADC0->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
|
||||
|
||||
for (i=0; i<samples; i++)
|
||||
{
|
||||
while (ADC0->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
|
||||
ADC0->SWTRIG.bit.START = true; /* Start the ADC using a software trigger. */
|
||||
while (ADC0->INTFLAG.bit.RESRDY == 0); /* Wait for the result ready flag to be set. */
|
||||
ADC0->INTFLAG.reg = ADC_INTFLAG_RESRDY; /* Clear the flag. */
|
||||
zero_current_offset_temp[1] = ADC0->RESULT.reg; /* Read the value. */
|
||||
|
||||
phase_B_zero_current_offset_temp += zero_current_offset_temp[1];
|
||||
}
|
||||
|
||||
/* Set Motor Variables */
|
||||
motor->Voffset_lsb.B = phase_B_zero_current_offset_temp/samples;
|
||||
adc_sync_disable_channel(&ADC_0, 0);
|
||||
//adc_sync_disable_channel(&ADC_1, 0);
|
||||
}
|
||||
|
||||
//uint8_t get_dir_hall_code(void)
|
||||
//{
|
||||
//return ((Motor1.desiredDirection << 3) |
|
||||
//(_gpio_get_level(HALL_A_PIN) << 2) |
|
||||
//(_gpio_get_level(HALL_B_PIN) << 1) |
|
||||
//(_gpio_get_level(HALL_C_PIN) << 0));
|
||||
//}
|
||||
//
|
||||
//uint8_t HALLPatternGet(void)
|
||||
//{
|
||||
//
|
||||
//
|
||||
//volatile uint8_t motor_read = 0;
|
||||
//motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
//motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
//motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
//
|
||||
//return motor_read;
|
||||
//
|
||||
////return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
////(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
////(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
//}
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Hall Reading Functions
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
inline uint8_t readM1Hall(void)
|
||||
{
|
||||
volatile uint8_t motor_read = 0;
|
||||
motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
|
||||
return motor_read;
|
||||
|
||||
//return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
//(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
//(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
//
|
||||
//volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
//volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
//volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
//
|
||||
//return ((a << 2) |
|
||||
//(b << 1) |
|
||||
//(c << 0));
|
||||
}
|
||||
|
||||
inline uint8_t readM2Hall(void)
|
||||
{
|
||||
volatile uint8_t motor_read = 0;
|
||||
motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
|
||||
return motor_read;
|
||||
//
|
||||
//return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
//(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
//(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
|
||||
|
||||
//volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
//volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
//volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
//
|
||||
//return ((a << 2) |
|
||||
//(b << 1) |
|
||||
//(c << 0));
|
||||
}
|
||||
|
||||
inline uint8_t readM3Hall(void)
|
||||
{
|
||||
volatile uint8_t motor_read = 0;
|
||||
motor_read = (motor_read & HALL_A_MASK) | (uint8_t)((PORT->Group[HALL_A_GROUP].IN.reg & HALL_A_PORT)>>(HALL_A_LSR));
|
||||
motor_read = (motor_read & HALL_B_MASK) | (uint8_t)((PORT->Group[HALL_B_GROUP].IN.reg & HALL_B_PORT)>>(HALL_B_LSR));
|
||||
motor_read = (motor_read & HALL_C_MASK) | (uint8_t)((PORT->Group[HALL_C_GROUP].IN.reg & HALL_C_PORT)>>(HALL_C_LSR));
|
||||
|
||||
return motor_read;
|
||||
//
|
||||
//return ((gpio_get_pin_level(HALL_A_PIN) << 2)|
|
||||
//(gpio_get_pin_level(HALL_B_PIN) << 1)|
|
||||
//(gpio_get_pin_level(HALL_C_PIN) << 0));
|
||||
|
||||
//volatile uint8_t a = gpio_get_pin_level(HALL_A_PIN);
|
||||
//volatile uint8_t b = gpio_get_pin_level(HALL_B_PIN);
|
||||
//volatile uint8_t c = gpio_get_pin_level(HALL_C_PIN);
|
||||
//
|
||||
//return ((a << 2) |
|
||||
//(b << 1) |
|
||||
//(c << 0));
|
||||
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Disable Functions
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
void DisableM1GateDrivers(BLDCMotor_t *motor)
|
||||
{
|
||||
hri_tcc_write_PATTBUF_reg(motor->hw, motor->motor_commutation_Pattern[0]);
|
||||
}
|
||||
|
||||
void DisableM2GateDrivers(BLDCMotor_t *motor)
|
||||
{
|
||||
hri_tcc_write_PATTBUF_reg(motor->hw, motor->motor_commutation_Pattern[0]);
|
||||
}
|
||||
|
||||
void DisableM3GateDrivers(BLDCMotor_t *motor)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
inline void SetM1DutyCycle(const uint16_t duty)
|
||||
{
|
||||
TCC1->CCBUF[1].reg = duty;
|
||||
}
|
||||
|
||||
inline void SetM2DutyCycle(const uint16_t duty)
|
||||
{
|
||||
TCC0->CCBUF[0].reg = duty;
|
||||
TCC0->CCBUF[1].reg = duty;
|
||||
TCC0->CCBUF[2].reg = duty;
|
||||
TCC0->CCBUF[3].reg = duty;
|
||||
}
|
||||
|
||||
inline void SetM3DutyCycle(const uint16_t duty)
|
||||
{
|
||||
TCC0->CCBUF[4].reg = duty;
|
||||
TCC0->CCBUF[5].reg = duty;
|
||||
TCC1->CCBUF[0].reg = duty;
|
||||
}
|
||||
|
||||
/**
|
||||
** ____|___TCC0_________ ||____TCC1_________|
|
||||
** W0 | M2_0 | CC0 || __M3_2__ | CC0 |
|
||||
** W1 | M2_1 | CC1 || - | CC1 |
|
||||
** W2 | M2_2 | CC2 || M1_0 | CC1 |
|
||||
** W3 | M2_3 | CC3 || M1_1 | CC1 |
|
||||
** W4 | __M3_0__ | CC4 || M1_2 | CC1 |
|
||||
** W5 | __M3_1__ | CC5 || M1_3 | CC1 |
|
||||
** W6 | M2_4 | CC0 || M1_4 | CC1 |
|
||||
** W7 | M2_5 | CC1 || M1_5 | CC1 |
|
||||
*/
|
||||
|
||||
void exec_commutation(void)
|
||||
{
|
||||
// ----------------------------------------------------------------------
|
||||
// Read Motor Hall Sensors
|
||||
// ----------------------------------------------------------------------
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
Motor1.motor_status.currentHallPattern = readM1Hall();
|
||||
Motor2.motor_status.currentHallPattern = readM2Hall();
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//Motor2.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
//Motor3.motor_status.currentHallPattern = Motor1.ReadHall();
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
// ----------------------------------------------------------------------
|
||||
// Multi Motor Register Masking
|
||||
// ----------------------------------------------------------------------
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
volatile uint16_t temp_M1 = COMMUTATION_PATTERN_M1[Motor1.motor_status.currentHallPattern + Motor1.motor_setpoints.directionOffset];
|
||||
|
||||
volatile uint16_t temp_M2 = COMMUTATION_PATTERN_M2[Motor2.motor_status.currentHallPattern + Motor2.motor_setpoints.directionOffset];
|
||||
//volatile uint16_t temp_M3_tcc1_des = COMMUTATION_PATTERN_M1[Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset] & m3_TCC1_mask;
|
||||
//volatile uint16_t temp_M3_tcc0_des = COMMUTATION_PATTERN_M2[Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset] & m3_TCC0_mask;
|
||||
/* Zero target bits */
|
||||
//temp_M1 &= m3_TCC1_inv_mask;
|
||||
//temp_M2 &= m3_TCC0_inv_mask;
|
||||
/* Set Desired bits */
|
||||
//temp_M1 |= temp_M3_tcc1_des;
|
||||
//temp_M2 |= temp_M3_tcc0_des;
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Set Pattern Buffers
|
||||
// ----------------------------------------------------------------------
|
||||
TCC0->PATTBUF.reg = (uint16_t)temp_M2;
|
||||
TCC1->PATTBUF.reg = (uint16_t)temp_M1;
|
||||
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
// ----------------------------------------------------------------------
|
||||
// Set Remaining GPIO lines responsible for M3 Commutation
|
||||
// ----------------------------------------------------------------------
|
||||
///* GPIO En Pin Setting for M3 */
|
||||
//switch(Motor3.motor_status.currentHallPattern + Motor3.motor_setpoints.directionOffset)
|
||||
//{
|
||||
//// REG_PORT_OUTSET0 = Port A
|
||||
//// REG_PORT_OUTSET1 = Port B
|
||||
//case 1: case 6: case 9: case 14:
|
||||
//REG_PORT_OUTCLR0 = (1 << GPIO_PIN(M3_3));
|
||||
//REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4))|(1 << GPIO_PIN(M3_5));
|
||||
//break;
|
||||
//case 2: case 5: case 10: case 13:
|
||||
//REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
|
||||
//REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_4));
|
||||
//REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_5));
|
||||
//break;
|
||||
//case 3: case 4: case 11: case 12:
|
||||
//REG_PORT_OUTSET0 = (1 << GPIO_PIN(M3_3));
|
||||
//REG_PORT_OUTCLR1 = (1 << GPIO_PIN(M3_4));
|
||||
//REG_PORT_OUTSET1 = (1 << GPIO_PIN(M3_5));
|
||||
//break;
|
||||
//default:
|
||||
///*hall error - should not get here */
|
||||
//break;
|
||||
//}
|
||||
|
||||
|
||||
// TCC1->PATTBUF.reg = COMMUTATION_PATTERN_M1[(Motor1.motor_status.currentHallPattern +
|
||||
// Motor1.motor_setpoints.directionOffset)];
|
||||
// ----------------------------------------------------------------------
|
||||
// Set Calculated Duty Cycles
|
||||
// ----------------------------------------------------------------------
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//Motor1.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
SetM1DutyCycle(Motor1.motor_status.duty_cycle);
|
||||
SetM2DutyCycle(Motor1.motor_status.duty_cycle);
|
||||
//Motor2.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
//Motor3.SetDutyCycle((uint16_t)Motor1.motor_status.duty_cycle);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
Motor1.motor_status.cur_comm_step = MOTOR_COMMUTATION_STEPS[Motor1.motor_status.currentHallPattern];
|
||||
volatile int8_t step_change1 = Motor1.motor_status.cur_comm_step - Motor1.motor_status.prev_comm_step;
|
||||
|
||||
switch(step_change1)
|
||||
{
|
||||
case 1: case -5:
|
||||
Motor1.motor_status.Num_Steps = Motor1.motor_status.Num_Steps+1;
|
||||
Motor1.motor_status.actualDirection = CW;
|
||||
//Motor1.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
break;
|
||||
case -1: case 5:
|
||||
Motor1.motor_status.Num_Steps = Motor1.motor_status.Num_Steps-1;
|
||||
Motor1.motor_status.actualDirection = CCW;
|
||||
//Motor1.motor_setpoints.directionOffset = DIRECTION_CCW_OFFSET;
|
||||
break;
|
||||
default:
|
||||
// do nothing
|
||||
break;
|
||||
}
|
||||
Motor1.motor_status.prev_comm_step = Motor1.motor_status.cur_comm_step;
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
|
||||
Motor2.motor_status.cur_comm_step = MOTOR_COMMUTATION_STEPS[Motor1.motor_status.currentHallPattern];
|
||||
volatile int8_t step_change2 = Motor2.motor_status.cur_comm_step - Motor2.motor_status.prev_comm_step;
|
||||
|
||||
switch(step_change2)
|
||||
{
|
||||
case 1: case -5:
|
||||
Motor2.motor_status.Num_Steps = Motor2.motor_status.Num_Steps+1;
|
||||
Motor2.motor_status.actualDirection = CW;
|
||||
//Motor2.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
break;
|
||||
case -1: case 5:
|
||||
Motor2.motor_status.Num_Steps = Motor2.motor_status.Num_Steps-1;
|
||||
Motor2.motor_status.actualDirection = CCW;
|
||||
//Motor1.motor_setpoints.directionOffset = DIRECTION_CCW_OFFSET;
|
||||
break;
|
||||
default:
|
||||
// do nothing
|
||||
break;
|
||||
}
|
||||
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
//
|
||||
//Motor3.motor_status.cur_comm_step = MOTOR_COMMUTATION_STEPS[Motor1.motor_status.currentHallPattern];
|
||||
//volatile int8_t step_change3 = Motor3.motor_status.cur_comm_step - Motor3.motor_status.prev_comm_step;
|
||||
//
|
||||
//switch(step_change3)
|
||||
//{
|
||||
//case 1: case -5:
|
||||
//Motor3.motor_status.Num_Steps = Motor3.motor_status.Num_Steps+1;
|
||||
//Motor3.motor_status.actualDirection = CW;
|
||||
////Motor3.motor_setpoints.directionOffset = DIRECTION_CW_OFFSET;
|
||||
//break;
|
||||
//case -1: case 5:
|
||||
//Motor3.motor_status.Num_Steps = Motor3.motor_status.Num_Steps-1;
|
||||
//Motor3.motor_status.actualDirection = CCW;
|
||||
////Motor1.motor_setpoints.directionOffset = DIRECTION_CCW_OFFSET;
|
||||
//break;
|
||||
//default:
|
||||
//// do nothing
|
||||
//break;
|
||||
//}
|
||||
|
||||
//calculate_motor_speed();
|
||||
//toc(DEBUG_3);
|
||||
//toc(DEBUG_4);
|
||||
//CRITICAL_SECTION_LEAVE();
|
||||
}
|
||||
|
||||
void calculate_motor_speed(void)
|
||||
{
|
||||
//tic_port(DEBUG_2_PORT);
|
||||
volatile uint32_t temp_rpm = 0;
|
||||
hri_tccount32_read_CC_reg(TC0, 0); /* Read CC0 but throw away)*/
|
||||
volatile uint32_t period_after_capture = hri_tccount32_read_CC_reg(TC0, 1);
|
||||
if((period_after_capture > UINT32_MAX)|| (period_after_capture > 10712046)) {
|
||||
Motor1.motor_status.calc_rpm = 0;
|
||||
} else {
|
||||
//uint32_t test = (SPEEDFACTOR, period_after_capture);
|
||||
//temp_rpm = SPEEDFACTOR / period_after_capture;
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
temp_rpm = HZ_TO_RPM / (period_after_capture*MOTOR_COMUTATION_STATES);
|
||||
//temp_rpm = HZ_TO_RPM * period_after_capture;
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
}
|
||||
|
||||
if(Motor1.motor_status.actualDirection == CCW) /* Changed from CCW */
|
||||
{
|
||||
//*motor_speed = -1* Motor1.calc_rpm;
|
||||
temp_rpm = -1 * temp_rpm;
|
||||
} else {
|
||||
//*motor_speed = Motor1.calc_rpm;
|
||||
temp_rpm = temp_rpm;
|
||||
}
|
||||
|
||||
Motor1.motor_status.calc_rpm = (int16_t)temp_rpm;
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
|
||||
//#ifdef AVERAGE_SPEED_MEASURE
|
||||
//// To avoid noise an average is realized on 8 samples
|
||||
//speed_average += temp_rpm;
|
||||
//if(count >= n_SAMPLE)
|
||||
//{
|
||||
//count = 1;
|
||||
//Motor1.motor_status.calc_rpm = (speed_average >> 3); // divide by 32
|
||||
////Motor1.motor_status.calc_rpm = (speed_average); // divide by 32
|
||||
//speed_average = 0;
|
||||
////*Spare_byte1 = motorState.actualDirection;
|
||||
//if(Motor1.motor_status.actualDirection == CCW) /* Changed from CCW */
|
||||
//{
|
||||
////*motor_speed = -1* Motor1.calc_rpm;
|
||||
//Motor1.motor_status.calc_rpm = -1* Motor1.motor_status.calc_rpm;
|
||||
//} else {
|
||||
////*motor_speed = Motor1.calc_rpm;
|
||||
//Motor1.motor_status.calc_rpm = Motor1.motor_status.calc_rpm;
|
||||
//}
|
||||
//return;
|
||||
//}
|
||||
//else count++;
|
||||
//#else
|
||||
//Motor1.motor_status.calc_rpm = (int16_t)temp_rpm;
|
||||
//#endif
|
||||
//toc_port(DEBUG_2_PORT);
|
||||
}
|
||||
|
||||
void DisableMotor(BLDCMotor_t *motor)
|
||||
{
|
||||
hri_tcc_write_PATTBUF_reg(motor->hw, motor->motor_commutation_Pattern[0]);
|
||||
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// pi current control
|
||||
//------------------------------------------------------------------------------
|
||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, const float32_t curfbk, const float32_t curRef)
|
||||
{
|
||||
|
||||
motor->controllers.Pi_Idc.Fbk_pu = f_clamp(curfbk, -DEVICE_SHUNT_CURRENT_A, DEVICE_SHUNT_CURRENT_A); // Clamped to max current sensor readingspeedfbk;
|
||||
motor->controllers.Pi_Idc.Ref_pu = f_clamp(curRef, -MOTOR_MAX_CURRENT_IDC_A, MOTOR_MAX_CURRENT_IDC_A); // Clamp desired to Motor Max Current i_ref_clamped;
|
||||
|
||||
//*Spare_1 = (int16_t)(motor->controllers.Pi_Idc.Ref_pu * 1000); // Send Req Current to TC
|
||||
|
||||
motor->controllers.Pi_Idc.OutMax_pu = motor->VdcBus_pu;
|
||||
motor->controllers.Pi_Idc.OutMin_pu = -motor->VdcBus_pu;
|
||||
PI_run_series(&motor->controllers.Pi_Idc);
|
||||
|
||||
if(motor->controllers.Pi_Idc.Out_pu > 0) {
|
||||
motor->motor_setpoints.desiredDirection = 0;
|
||||
motor->motor_setpoints.directionOffset = 0;
|
||||
} else {
|
||||
motor->motor_setpoints.desiredDirection = 1;
|
||||
motor->motor_setpoints.directionOffset = 8;
|
||||
}
|
||||
|
||||
volatile float32_t duty_pu = f_abs((motor->controllers.Pi_Idc.Out_pu * motor->VoneByDcBus_pu));
|
||||
motor->motor_status.duty_cycle = (uint16_t)f_clamp(duty_pu * (float32_t)MAX_PWM, 0.0f, (float32_t)MAX_PWM);
|
||||
// Remove Low duty cycle values
|
||||
//if(duty_cycle < 80.0) motor->duty_cycle = (uint16_t)0;
|
||||
//else motor->duty_cycle = (uint16_t)duty_cycle;
|
||||
|
||||
}
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
// Speed Control: Input in RPM units (int16_t)
|
||||
//------------------------------------------------------------------------------
|
||||
void BLDC_runSpeedCntl(BLDCMotor_t *motor, const float32_t speedfbk, const float32_t speedRef)
|
||||
{
|
||||
//tic_port(DEBUG_3_PORT);
|
||||
motor->controllers.Pid_Speed.Fbk_pu = speedfbk;
|
||||
motor->controllers.Pid_Speed.Ref_pu = f_clamp(speedRef, -MOTOR_MAX_SPD_RPM, MOTOR_MAX_SPD_RPM); // Convert Speed Ref to Q16 Format
|
||||
|
||||
if (applicationStatus.currentstate == MOTOR_V_CTRL_STATE)
|
||||
{
|
||||
/* Output Pu in Volts (PWM %) */
|
||||
motor->controllers.Pid_Speed.OutMax_pu = motor->VdcBus_pu;
|
||||
motor->controllers.Pid_Speed.OutMin_pu = -motor->VdcBus_pu;
|
||||
|
||||
PID_run_parallel(&motor->controllers.Pid_Speed);
|
||||
|
||||
if(motor->controllers.Pid_Speed.Out_pu > 0) {
|
||||
motor->motor_setpoints.desiredDirection = 0;
|
||||
motor->motor_setpoints.directionOffset = 0;
|
||||
} else {
|
||||
motor->motor_setpoints.desiredDirection = 1;
|
||||
motor->motor_setpoints.directionOffset = 8;
|
||||
}
|
||||
/* Process unit is Volts */
|
||||
volatile float32_t duty_pu = f_abs((motor->controllers.Pid_Speed.Out_pu * motor->VoneByDcBus_pu));
|
||||
volatile duty_cycle = f_clamp(duty_pu * (float32_t)MAX_PWM, 0.0f, (float32_t)MAX_PWM);
|
||||
motor->motor_status.duty_cycle = (uint16_t)duty_cycle;
|
||||
} else {
|
||||
/* Pu in Current (Amps) */
|
||||
motor->controllers.Pid_Speed.OutMax_pu = (MOTOR_MAX_CURRENT_IDC_A);
|
||||
motor->controllers.Pid_Speed.OutMin_pu = -(MOTOR_MAX_CURRENT_IDC_A);
|
||||
PID_run_parallel(&motor->controllers.Pid_Speed);
|
||||
motor->controllers.Pi_Idc.Ref_pu = motor->controllers.Pid_Speed.Out_pu;
|
||||
}
|
||||
//toc_port(DEBUG_3_PORT);
|
||||
}
|
||||
|
||||
//// ------------------------------------------------------------------------------
|
||||
// Position Control:Input in Hall step units (int16_t)
|
||||
//------------------------------------------------------------------------------
|
||||
void BLDC_runPosCntl(BLDCMotor_t *motor, const int16_t posfbk, const int16_t posRef)
|
||||
{
|
||||
/* Output Pu in RPM */
|
||||
motor->controllers.Pi_Pos.OutMax_pu = MOTOR_MAX_SPD_RPM;
|
||||
motor->controllers.Pi_Pos.OutMin_pu = -MOTOR_MAX_SPD_RPM;
|
||||
motor->controllers.Pi_Pos.Fbk_pu = posfbk;
|
||||
motor->controllers.Pi_Pos.Ref_pu = posRef;
|
||||
PI_run_series(&motor->controllers.Pi_Pos);
|
||||
motor->controllers.Pid_Speed.Ref_pu = motor->controllers.Pi_Pos.Out_pu;
|
||||
}
|
||||
|
|
@ -0,0 +1,214 @@
|
|||
/*
|
||||
* bldc.h
|
||||
*
|
||||
* Created: 10/03/2021 14:38:14
|
||||
* Author: Nick-XMG
|
||||
*/
|
||||
|
||||
#ifndef BLDC_H_
|
||||
#define BLDC_H_
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// header files
|
||||
// ----------------------------------------------------------------------
|
||||
//#include "arm_math.h"
|
||||
#include "atmel_start.h"
|
||||
#include "control.h"
|
||||
#include "motor_params.h"
|
||||
|
||||
/* if the Hall sensor reads 0x0 or 0x7 that means either one of the hall sensor is damaged or disconnected*/
|
||||
#define INVALID_HALL_0 (0U)
|
||||
#define INVALID_HALL_7 (7U)
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// ADC Parameters
|
||||
// ----------------------------------------------------------------------
|
||||
#define ADC_VOLTAGE_REFERENCE (3.3f)
|
||||
#define ADC_RESOLUTION (12)
|
||||
#define ADC_MAX_COUNTS (1<<ADC_RESOLUTION)
|
||||
#define ADC_LSB_SIZE (ADC_VOLTAGE_REFERENCE/ADC_MAX_COUNTS)
|
||||
#define LSB_TO_PU (ADC_LSB_SIZE * ONEON_CURRENT_SENSOR_SENSITIVITY)
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Define the control and PWM frequencies:
|
||||
// ----------------------------------------------------------------------
|
||||
// 16kHz is the maximum frequency according to the calculation duration in the mode run and spin.
|
||||
#define DEVICE_MCU_FREQUENCY_Hz (120000000U)
|
||||
#define DEVICE_SPEEDTC_DIV (4U)
|
||||
#define DEVICE_SPEEDTC_FREQUENCY_Hz (DEVICE_MCU_FREQUENCY_Hz/DEVICE_SPEEDTC_DIV)
|
||||
#define DEVICE_PWM_FREQUENCY_kHz (25.0f)
|
||||
#define DEVICE_ISR_FREQUENCY_kHz DEVICE_PWM_FREQUENCY_kHz
|
||||
#define DEVICE_ISR_PERIOD_Sec (0.001f/DEVICE_ISR_FREQUENCY_kHz)
|
||||
#define HZ_TO_RPM (DEVICE_SPEEDTC_FREQUENCY_Hz * 60)
|
||||
//#define HZ_TO_RPM MOTOR_COMUTATION_STATES/(DEVICE_SPEEDTC_FREQUENCY_Hz * 60)
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Define the device quantities (voltage, current, speed)
|
||||
// ----------------------------------------------------------------------
|
||||
#define DEVICE_DC_VOLTAGE_V 24.0f // max. ADC bus voltage(PEAK) [V]
|
||||
#define DEVICE_SHUNT_CURRENT_A 2.5f // phase current(PEAK) [A]
|
||||
#define CURRENT_SENSOR_SENSITIVITY 0.4f //V/A
|
||||
#define ONEON_CURRENT_SENSOR_SENSITIVITY 2.5f //V/A
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Type Definitions
|
||||
// ----------------------------------------------------------------------
|
||||
volatile typedef struct
|
||||
{
|
||||
volatile float32_t A; // Phase A
|
||||
volatile float32_t B; // Phase B
|
||||
volatile float32_t C; // Phase C
|
||||
volatile float32_t Bus; // Currently Active Phase Current
|
||||
} MOTOR_3PHASES_t;
|
||||
|
||||
volatile typedef struct
|
||||
{
|
||||
volatile int16_t A; // Phase A measured offset
|
||||
volatile int16_t B; // Phase B measured offset
|
||||
} MOTOR_phase_offset_t;
|
||||
|
||||
volatile typedef struct timerflags
|
||||
{
|
||||
volatile bool pwm_cycle_tic;
|
||||
volatile bool current_loop_tic;
|
||||
volatile bool control_loop_tic;
|
||||
volatile bool adc_readings_ready_tic;
|
||||
volatile bool motor_telemetry_flag;
|
||||
} TIMERflags_t;
|
||||
|
||||
volatile typedef struct
|
||||
{
|
||||
volatile PI_t Pi_Idc;
|
||||
volatile PID_t Pid_Speed;
|
||||
volatile PI_t Pi_Pos;
|
||||
} MOTOR_Control_Structs;
|
||||
|
||||
volatile typedef struct
|
||||
{
|
||||
volatile uint8_t desiredDirection; //! The desired direction of rotation.
|
||||
volatile uint8_t directionOffset;
|
||||
volatile float32_t desired_torque;
|
||||
volatile int16_t desired_speed;
|
||||
volatile int16_t desired_position;
|
||||
volatile float32_t max_torque;
|
||||
volatile float32_t max_current;
|
||||
volatile int16_t max_velocity;
|
||||
} MOTOR_Setpoints;
|
||||
|
||||
volatile typedef struct
|
||||
{
|
||||
volatile uint8_t actualDirection; //! The actual direction of rotation.
|
||||
volatile uint16_t duty_cycle;
|
||||
volatile float32_t calc_rpm;
|
||||
volatile int32_t Num_Steps;
|
||||
/* Hall States */
|
||||
volatile uint8_t prevHallPattern;
|
||||
volatile uint8_t currentHallPattern;
|
||||
volatile uint8_t nextHallPattern;
|
||||
/* Commutation State */
|
||||
volatile uint8_t cur_comm_step;
|
||||
volatile uint8_t prev_comm_step;
|
||||
} MOTOR_Status;
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Function Pointers
|
||||
// ----------------------------------------------------------------------
|
||||
typedef uint8_t (*ReadHallFunc)(void);
|
||||
typedef void (*DisableMotorFunc)(void);
|
||||
typedef void (*SetMotorDutyCycle)(uint16_t);
|
||||
|
||||
volatile typedef struct BLDCmotor
|
||||
{
|
||||
/* Hardware */
|
||||
const Tcc *hw;
|
||||
const uint16_t *motor_commutation_Pattern;
|
||||
uint32_t current_sensor_channels[2];
|
||||
/* Status */
|
||||
MOTOR_Status motor_status;
|
||||
/* Measured Values */
|
||||
volatile MOTOR_3PHASES_t Iphase_pu;
|
||||
volatile MOTOR_phase_offset_t Voffset_lsb;
|
||||
volatile float32_t VdcBus_pu;
|
||||
volatile float32_t VoneByDcBus_pu;
|
||||
/* Motor Flags */
|
||||
volatile TIMERflags_t timerflags;
|
||||
volatile uint8_t regulation_loop_count;
|
||||
/* Controllers */
|
||||
volatile MOTOR_Control_Structs controllers;
|
||||
/* Setpoints */
|
||||
volatile MOTOR_Setpoints motor_setpoints;
|
||||
/* Functions */
|
||||
ReadHallFunc ReadHall;
|
||||
DisableMotorFunc DisableMotor;
|
||||
SetMotorDutyCycle SetDutyCycle;
|
||||
} BLDCMotor_t;
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// global variables
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
static const uint8_t HALL_PATTERN_ARRAY[16] = {0, 5, 3, 1, 6, 4, 2, 0, 0, 3, 6, 2, 5, 1, 4, 0 };
|
||||
static const uint8_t MOTOR_COMMUTATION_STEPS[8] = {9, 1, 3, 2, 5, 6, 4, 9};
|
||||
|
||||
volatile BLDCMotor_t Motor1;
|
||||
volatile BLDCMotor_t Motor2;
|
||||
volatile BLDCMotor_t Motor3;
|
||||
|
||||
|
||||
//static uint32_t adc_seq_regs[6] = {0x1802, 0x1803, 0x1802, 0x1803, 0x1802, 0x1803};
|
||||
static uint32_t adc_seq_regs[4] = {0x1802, 0x1803, 0x1802, 0x1803};
|
||||
static volatile uint16_t adc_res[4] = {0};
|
||||
static volatile bool adc_dma_done = 0;
|
||||
|
||||
struct _dma_resource *adc_sram_dma_resource;
|
||||
struct _dma_resource *adc_dmac_sequence_resource;
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// functions
|
||||
// ----------------------------------------------------------------------
|
||||
void BldcInitStruct(BLDCMotor_t *motor);
|
||||
void BldcInitFunctions(void);
|
||||
|
||||
|
||||
|
||||
void select_active_phase(BLDCMotor_t *Motor, const uint8_t hall_state);
|
||||
void read_zero_current_offset_value(BLDCMotor_t *Motor);
|
||||
//int32_t adc_sync_read_channel(struct adc_async_descriptor *const descr, const uint8_t channel, uint8_t *const buffer, const uint16_t length);
|
||||
//static uint16_t adc_read(struct adc_async_descriptor *const descr, const uint8_t channel);
|
||||
inline void exec_commutation(void);
|
||||
uint8_t get_dir_hall_code(void);
|
||||
uint8_t get_hall_state(void);
|
||||
|
||||
uint8_t HALLPatternGet(void);
|
||||
uint8_t PDEC_HALLPatternGet(void);
|
||||
void calculate_motor_speed(void);
|
||||
void DisableMotor(BLDCMotor_t *motor);
|
||||
void BLDC_runSpeedCntl(BLDCMotor_t *motor, const float32_t speedfbk, const float32_t speedRef);
|
||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, const float32_t curfbk, const float32_t curRef);
|
||||
void BLDC_runPosCntl(BLDCMotor_t *motor, int16_t posfbk, int16_t posRef);
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Functions used with function pointers
|
||||
// ----------------------------------------------------------------------
|
||||
inline uint8_t readM1Hall(void);
|
||||
inline uint8_t readM2Hall(void);
|
||||
inline uint8_t readM3Hall(void);
|
||||
void DisableM1GateDrivers(BLDCMotor_t *motor);
|
||||
void DisableM2GateDrivers(BLDCMotor_t *motor);
|
||||
void DisableM3GateDrivers(BLDCMotor_t *motor);
|
||||
inline void SetM1DutyCycle(const uint16_t duty);
|
||||
inline void SetM2DutyCycle(const uint16_t duty);
|
||||
inline void SetM3DutyCycle(const uint16_t duty);
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// all controller objects, variables and helpers:
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
//Motor2.ReadHall = readM2Hall;
|
||||
//Motor3.ReadHall = readM3Hall;
|
||||
|
||||
|
||||
|
||||
#endif /* BLDC_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
|
@ -0,0 +1,95 @@
|
|||
/*
|
||||
* communication.h
|
||||
*
|
||||
* Created: 10/03/2021 13:07:51
|
||||
* Author: Nick-XMG
|
||||
*/
|
||||
|
||||
|
||||
#ifndef COMMUNICATION_H_
|
||||
#define COMMUNICATION_H_
|
||||
|
||||
#include "ethercat_e54.h"
|
||||
|
||||
//Write To Ecat Total Bytes (38 bytes)
|
||||
//write (2 Bytes)
|
||||
volatile uint8_t *status =&ram_buffer[ram_wr_start];
|
||||
volatile uint8_t *state =(((uint8_t *)&ram_buffer[ram_wr_start])+1);
|
||||
//Joint (10 Bytes)
|
||||
volatile int16_t *joint_rel_position =&ram_buffer[ram_wr_start+1];
|
||||
volatile int16_t *joint_revolution =&ram_buffer[ram_wr_start+2];
|
||||
volatile int16_t *joint_abs_position =&ram_buffer[ram_wr_start+3];
|
||||
volatile int16_t *joint_speed =&ram_buffer[ram_wr_start+4];
|
||||
volatile int16_t *joint_torque =&ram_buffer[ram_wr_start+5];
|
||||
// Motor (20+1+1+4) = 26
|
||||
volatile int16_t *motor_rel_revolutions=&ram_buffer[ram_wr_start+6];
|
||||
volatile int16_t *motor_rel_position =&ram_buffer[ram_wr_start+7];
|
||||
volatile int16_t *motor_abs_position =&ram_buffer[ram_wr_start+8];
|
||||
volatile int16_t *motor_dutyCycle =&ram_buffer[ram_wr_start+9];
|
||||
volatile int16_t *motor_speed =&ram_buffer[ram_wr_start+10];
|
||||
volatile int16_t *motor_torque =&ram_buffer[ram_wr_start+11];
|
||||
volatile int16_t *motor_currentPHA =&ram_buffer[ram_wr_start+12];
|
||||
volatile int16_t *motor_currentPHB =&ram_buffer[ram_wr_start+13];
|
||||
volatile int16_t *motor_currentPHC =&ram_buffer[ram_wr_start+14];
|
||||
volatile int16_t *motor_currentBUS =&ram_buffer[ram_wr_start+15];
|
||||
volatile uint8_t *hall_state =&ram_buffer[ram_wr_start+16];
|
||||
volatile uint8_t *Spare_byte1 =(((uint8_t *)&ram_buffer[ram_wr_start+16])+1);
|
||||
volatile int16_t *Spare_1 =&ram_buffer[ram_wr_start+17];
|
||||
volatile int16_t *Spare_2 =&ram_buffer[ram_wr_start+18];
|
||||
|
||||
//Read From Ecat Total (35 Bytes)
|
||||
// (1 Byte)
|
||||
volatile uint8_t *control_mode =&ram_buffer[ram_rd_start];
|
||||
volatile uint8_t *control_set =(((uint8_t *)&ram_buffer[ram_rd_start])+1);
|
||||
// (34 Byte)
|
||||
volatile int16_t *desired_position =&ram_buffer[ram_rd_start+1];
|
||||
volatile int16_t *desired_speed =&ram_buffer[ram_rd_start+2];
|
||||
volatile int16_t *desired_torque =&ram_buffer[ram_rd_start+3];
|
||||
volatile int16_t *i_kp =&ram_buffer[ram_rd_start+4];
|
||||
volatile int16_t *i_ki =&ram_buffer[ram_rd_start+5];
|
||||
volatile int16_t *v_kp =&ram_buffer[ram_rd_start+6];
|
||||
volatile int16_t *v_kd =&ram_buffer[ram_rd_start+7];
|
||||
volatile int16_t *p_kp =&ram_buffer[ram_rd_start+8];
|
||||
volatile int16_t *p_ki =&ram_buffer[ram_rd_start+9];
|
||||
volatile uint16_t *ReductionRatio =&ram_buffer[ram_rd_start+10];
|
||||
volatile int16_t *max_torque =&ram_buffer[ram_rd_start+11];
|
||||
volatile int16_t *max_current =&ram_buffer[ram_rd_start+12];
|
||||
volatile int16_t *max_velocity =&ram_buffer[ram_rd_start+13];
|
||||
volatile int16_t *spare1 =&ram_buffer[ram_rd_start+14];
|
||||
volatile int16_t *spare2 =&ram_buffer[ram_rd_start+15];
|
||||
volatile int16_t *spare3 =&ram_buffer[ram_rd_start+16];
|
||||
volatile int16_t *spare4 =&ram_buffer[ram_rd_start+17];
|
||||
|
||||
void comms_check(void)
|
||||
{
|
||||
*status = 1;
|
||||
*state = 0;
|
||||
*joint_rel_position = 3;
|
||||
*joint_revolution = 4;
|
||||
*joint_abs_position = 5;
|
||||
*joint_speed = 6;
|
||||
*joint_torque = 7;
|
||||
*motor_rel_revolutions = 8;
|
||||
*motor_rel_position = 9;
|
||||
*motor_abs_position = 10;
|
||||
*motor_dutyCycle = 11;
|
||||
*motor_speed = 12;
|
||||
*motor_torque = 13;
|
||||
*motor_currentPHA = 14;
|
||||
*motor_currentPHB = 15;
|
||||
*motor_currentPHC = 16;
|
||||
*motor_currentBUS = 17;
|
||||
*hall_state = 18;
|
||||
*Spare_byte1 = 19;
|
||||
*Spare_1 = 20;
|
||||
*Spare_2 = 21;
|
||||
}
|
||||
|
||||
void clear_comms_buffer(void)
|
||||
{
|
||||
memset(ram_buffer, 0, ram_rd_start);
|
||||
}
|
||||
|
||||
|
||||
|
||||
#endif /* COMMUNICATION_H_ */
|
||||
|
|
@ -0,0 +1,163 @@
|
|||
/*
|
||||
* configuration.h
|
||||
*
|
||||
* Created: 03/03/2021 08:38:13
|
||||
* Author: Nick-XMG
|
||||
*/
|
||||
|
||||
|
||||
#ifndef CONFIGURATION_H_
|
||||
#define CONFIGURATION_H_
|
||||
#include <atmel_start.h>
|
||||
//#include <tc_lite.h>
|
||||
|
||||
|
||||
|
||||
#include "pins.h"
|
||||
#include "bldc.h"
|
||||
|
||||
#define DMAC_CHANNEL_ADC_SEQ 2U
|
||||
#define DMAC_CHANNEL_ADC_SRAM 3U
|
||||
|
||||
|
||||
//void dummy2 (void){
|
||||
//while(1);
|
||||
//}
|
||||
//
|
||||
//void dummy3 (void){
|
||||
//while(1);
|
||||
//}
|
||||
//
|
||||
//void dummy4 (void){
|
||||
//while(1);
|
||||
//}
|
||||
//void dummy5 (void){
|
||||
//while(1);
|
||||
//}
|
||||
//
|
||||
//void dummy6 (void){
|
||||
//while(1);
|
||||
//}
|
||||
|
||||
inline void configure_tcc_pwm(void)
|
||||
{
|
||||
|
||||
/* TCC0 */
|
||||
hri_tcc_set_WEXCTRL_OTMX_bf(TCC0, 0);
|
||||
hri_tcc_write_PER_reg(TCC0,1200);
|
||||
|
||||
hri_tcc_set_WAVE_POL0_bit(TCC0);
|
||||
hri_tcc_set_WAVE_POL1_bit(TCC0);
|
||||
hri_tcc_set_WAVE_POL2_bit(TCC0);
|
||||
hri_tcc_set_WAVE_POL3_bit(TCC0);
|
||||
hri_tcc_set_WAVE_POL4_bit(TCC0);
|
||||
hri_tcc_set_WAVE_POL5_bit(TCC0);
|
||||
hri_tcc_write_CC_CC_bf(TCC0, 0, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC0, 1, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC0, 2, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC0, 3, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC0, 4, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC0, 5, 0);
|
||||
|
||||
hri_tcc_write_CTRLA_ENABLE_bit(TCC0, 1 << TCC_CTRLA_ENABLE_Pos);
|
||||
|
||||
|
||||
/* TCC1 */
|
||||
hri_tcc_set_WEXCTRL_OTMX_bf(TCC1, 3);
|
||||
hri_tcc_write_CC_CC_bf(TCC1, 0, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC1, 1, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC1, 2, 0);
|
||||
hri_tcc_write_CC_CC_bf(TCC1, 3, 0);
|
||||
//hri_tcc_write_CC_CC_bf(TCC1, 0, 0);
|
||||
hri_tcc_write_PER_reg(TCC1,1200);
|
||||
//pwm_set_parameters(&TCC_PWM, 1000, 250);
|
||||
|
||||
hri_tcc_set_WAVE_POL0_bit(TCC1);
|
||||
hri_tcc_set_WAVE_POL1_bit(TCC1);
|
||||
hri_tcc_set_WAVE_POL2_bit(TCC1);
|
||||
hri_tcc_set_WAVE_POL3_bit(TCC1);
|
||||
hri_tcc_set_WAVE_POL4_bit(TCC1);
|
||||
hri_tcc_set_WAVE_POL5_bit(TCC1);
|
||||
|
||||
hri_tcc_clear_CTRLA_ENABLE_bit(TCC1);
|
||||
hri_tcc_write_CTRLA_MSYNC_bit(TCC1, true);
|
||||
//hri_tcc_write_CTRLA_ENABLE_bit(TCC1, 1 << TCC_CTRLA_ENABLE_Pos); /* Enable: enabled */
|
||||
|
||||
pwm_register_callback(&TCC_PWM, PWM_PERIOD_CB, pwm_cb);
|
||||
pwm_enable(&TCC_PWM);
|
||||
|
||||
}
|
||||
|
||||
inline void configure_adc(void)
|
||||
{
|
||||
adc_sync_enable_channel(&ADC_0, 0);
|
||||
//adc_sync_enable_channel(&ADC_1, 0);
|
||||
|
||||
//adc_async_register_callback(&ADC_0, 0, ADC_ASYNC_CONVERT_CB, adc_cb);
|
||||
//adc_async_register_callback(&ADC_1, 0, ADC_ASYNC_CONVERT_CB, convert_cb_ADC_1);
|
||||
//adc_async_start_conversion(&ADC_0);
|
||||
//adc_async_start_conversion(&ADC_1);
|
||||
}
|
||||
|
||||
void config_pins(void)
|
||||
{
|
||||
//gpio_set_pin_direction(DBG_PIN1, GPIO_DIRECTION_OUT);
|
||||
//gpio_set_pin_function(DBG_PIN1, GPIO_PIN_FUNCTION_OFF);
|
||||
}
|
||||
|
||||
|
||||
inline void configure_TC_CCL_SPEED(void)
|
||||
{
|
||||
/* Enable TC1 Clock for 32-bit timer. Linked to TC0 in driver_init.c
|
||||
Could also add a hri_gclk_write_PCHCTRL_reg call for TC1 but it is redundant (for SAME54) since TC0 and TC1 share the GCLK index.*/
|
||||
//hri_gclk_write_PCHCTRL_reg(GCLK, TC1_GCLK_ID, CONF_GCLK_TC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||
//event_system_enable_generator(
|
||||
|
||||
}
|
||||
|
||||
inline void adc_init_dma(void)
|
||||
{
|
||||
adc_sram_dmac_init();
|
||||
adc_dmac_sequence_init();
|
||||
hri_adc_set_DSEQCTRL_INPUTCTRL_bit(ADC0);
|
||||
hri_adc_set_DSEQCTRL_AUTOSTART_bit(ADC0);
|
||||
}
|
||||
|
||||
inline void adc_dmac_sequence_init()
|
||||
{
|
||||
/* Configure the DMAC source address, destination address,
|
||||
* next descriptor address, data count and Enable the DMAC Channel */
|
||||
_dma_set_source_address(DMAC_CHANNEL_ADC_SEQ, (const void *)adc_seq_regs);
|
||||
_dma_set_destination_address(DMAC_CHANNEL_ADC_SEQ, (const void *)&ADC0->DSEQDATA.reg);
|
||||
_dma_set_data_amount(DMAC_CHANNEL_ADC_SEQ, 4);
|
||||
_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SEQ, DMAC_CHANNEL_ADC_SEQ);
|
||||
_dma_enable_transaction(DMAC_CHANNEL_ADC_SEQ, false);
|
||||
//_dma_get_channel_resource(&adc_dmac_sequence_resource, DMAC_CHANNEL_ADC_SEQ);
|
||||
//adc_dmac_sequence_resource[0].dma_cb.error = dummy2;
|
||||
//adc_dmac_sequence_resource[0].dma_cb.suspend = dummy3;
|
||||
//adc_dmac_sequence_resource[0].dma_cb.transfer_done = dummy4;
|
||||
|
||||
|
||||
hri_dmacchannel_set_CHCTRLB_CMD_bf(&DMAC->Channel[2], 0x01); //Suspend
|
||||
}
|
||||
|
||||
inline void adc_sram_dmac_init()
|
||||
{
|
||||
/* Configure the DMAC source address, destination address,
|
||||
* next descriptor address, data count and Enable the DMAC Channel */
|
||||
_dma_set_source_address(DMAC_CHANNEL_ADC_SRAM, (const void *)&ADC0->RESULT.reg);
|
||||
_dma_set_destination_address(DMAC_CHANNEL_ADC_SRAM, (const void *)adc_res);
|
||||
_dma_set_data_amount(DMAC_CHANNEL_ADC_SRAM, 4);
|
||||
_dma_set_irq_state(DMAC_CHANNEL_ADC_SRAM, DMA_TRANSFER_COMPLETE_CB, true);
|
||||
_dma_get_channel_resource(&adc_sram_dma_resource, DMAC_CHANNEL_ADC_SRAM);
|
||||
adc_sram_dma_resource[0].dma_cb.transfer_done = adc_sram_dma_callback;
|
||||
//adc_sram_dma_resource[0].dma_cb.error = dummy6;
|
||||
//adc_sram_dma_resource[0].dma_cb.suspend = dummy5;
|
||||
_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SRAM, DMAC_CHANNEL_ADC_SRAM);
|
||||
_dma_enable_transaction(DMAC_CHANNEL_ADC_SRAM, false);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* CONFIGURATION_H_ */
|
||||
|
|
@ -0,0 +1,260 @@
|
|||
/*
|
||||
* pi.h
|
||||
*
|
||||
* Created: 01/02/2021 21:36:11
|
||||
* Author: Nick-XMG
|
||||
*/
|
||||
#ifndef CONTROL_H_
|
||||
#define CONTROL_H_
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// history
|
||||
// ----------------------------------------------------------------------
|
||||
// 01.02.2021 - initial Revision
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// header files
|
||||
// ----------------------------------------------------------------------
|
||||
#include "arm_math.h"
|
||||
#include "atmel_start.h"
|
||||
#include "utilities.h"
|
||||
// ----------------------------------------------------------------------
|
||||
// #defines
|
||||
// ----------------------------------------------------------------------
|
||||
// ----------------------------------------------------------------------
|
||||
// global variables
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* PI Structure */
|
||||
typedef volatile struct
|
||||
{
|
||||
volatile float32_t Kp; // the proportional gain for the PI controller
|
||||
volatile float32_t Ki; // the integral gain for the PI controller
|
||||
|
||||
volatile float32_t Ref_pu; // the reference value [pu]
|
||||
volatile float32_t Fbk_pu; // the feedback value [pu]
|
||||
volatile float32_t Ff_pu; // the feedForward value [pu]
|
||||
|
||||
volatile float32_t OutMin_pu; // the saturation low limit for the controller output [pu]
|
||||
volatile float32_t OutMax_pu; // the saturation high limit for the controller output [pu]
|
||||
volatile float32_t Out_pu; // the controller output [pu]
|
||||
|
||||
volatile float32_t Ui; // the integrator value for the PI controller
|
||||
volatile float32_t error; // the integrator value for the PI controller
|
||||
volatile bool SatFlag; // flag to signal controller saturation
|
||||
} PI_t;
|
||||
|
||||
/* PID Structure */
|
||||
typedef volatile struct
|
||||
{
|
||||
volatile float32_t Kp; //!< the proportional gain for the PID controller
|
||||
volatile float32_t Ki; //!< the integral gain for the PID controller
|
||||
volatile float32_t Kd; //!< the derivative gain for the PID controller
|
||||
|
||||
volatile float32_t Ref_pu; //!< the reference input value
|
||||
volatile float32_t Fbk_pu; //!< the feedback input value
|
||||
volatile float32_t Ff_pu; //!< the feedforward input value
|
||||
|
||||
volatile float32_t OutMin_pu; //!< the minimum output value allowed for the PID controller
|
||||
volatile float32_t OutMax_pu; //!< the maximum output value allowed for the PID controller
|
||||
volatile float32_t Out_pu; // the controller output [pu]
|
||||
|
||||
volatile float32_t Ui; //!< the integrator start value for the PID controller
|
||||
volatile float32_t Ud;
|
||||
volatile float32_t error; // the integrator value for the PI controller
|
||||
|
||||
//FILTER_FO_Handle derFilterHandle; //!< the derivative filter handle
|
||||
//FILTER_FO_Obj derFilter; //!< the derivative filter object
|
||||
} PID_t;
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// functions
|
||||
// ----------------------------------------------------------------------
|
||||
// function to set default values for the object
|
||||
|
||||
//inline float32_t clamp(const float32_t d, const float32_t min, const float32_t max) {
|
||||
//const float32_t t = d < min ? min : d;
|
||||
//return t > max ? max : t;
|
||||
//}
|
||||
|
||||
|
||||
inline void PI_objectInit(volatile PI_t *pPi_obj)
|
||||
{
|
||||
PI_t *obj = (PI_t *)pPi_obj;
|
||||
|
||||
// Function initializes the object with default values
|
||||
//fix16_t Kp = fix16_from_float32_t(1.0);
|
||||
obj->Kp = 0.0f;
|
||||
obj->Ki = 0.0f;
|
||||
obj->Fbk_pu = 0.0f;
|
||||
obj->Ref_pu = 0.0f;
|
||||
obj->Ff_pu = 0.0f;
|
||||
obj->Out_pu = 0.0f;
|
||||
obj->OutMax_pu = 0.0f;
|
||||
obj->OutMin_pu = 0.0f;
|
||||
obj->Ui = 0.0f;
|
||||
obj->SatFlag = false;
|
||||
}
|
||||
|
||||
inline void PID_objectInit(volatile PID_t *pPiD_obj)
|
||||
{
|
||||
PID_t *obj = (PID_t *)pPiD_obj;
|
||||
|
||||
// Function initializes the object with default values
|
||||
//fix16_t Kp = fix16_from_float32_t(1.0);
|
||||
obj->Kp = 0.0f;
|
||||
obj->Ki = 0.0f;
|
||||
obj->Kd = 0.0f;
|
||||
obj->Fbk_pu = 0.0f;
|
||||
obj->Ref_pu = 0.0f;
|
||||
obj->Ff_pu = 0.0f;
|
||||
obj->Out_pu = 0.0f;
|
||||
obj->OutMax_pu = 0.0f;
|
||||
obj->OutMin_pu = 0.0f;
|
||||
obj->Ui = 0.0f;
|
||||
obj->Ud = 0.0f;
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// PI Calculation
|
||||
// ----------------------------------------------------------------------
|
||||
static inline void PI_run_series(volatile PI_t *pPi_obj)
|
||||
{
|
||||
PI_t *obj = (PI_t *)pPi_obj;
|
||||
volatile float32_t Up;
|
||||
|
||||
// Compute the controller error
|
||||
obj->error = obj->Ref_pu - obj->Fbk_pu;
|
||||
|
||||
// Compute the proportional term
|
||||
Up = obj->Kp *obj->error;
|
||||
|
||||
// Compute the integral term in series form and saturate
|
||||
obj->Ui = f_clamp((obj->Ui + (obj->Ki * Up)), obj->OutMin_pu, obj->OutMax_pu);
|
||||
|
||||
// Saturate the output
|
||||
obj->Out_pu = f_clamp((Up + obj->Ui + obj->Ff_pu), obj->OutMin_pu, obj->OutMax_pu);
|
||||
}
|
||||
|
||||
static inline void PI_run_parallel(volatile PI_t *pPi_obj)
|
||||
{
|
||||
PI_t *obj = (PI_t *)pPi_obj;
|
||||
volatile float32_t Up;
|
||||
|
||||
// Compute the controller error
|
||||
obj->error = obj->Ref_pu - obj->Fbk_pu;
|
||||
|
||||
// Compute the proportional term
|
||||
Up = obj->Kp * obj->error;
|
||||
|
||||
// Compute the integral term in parallel form and saturate
|
||||
obj->Ui = f_clamp((obj->Ui + (obj->Ki * obj->error)), obj->OutMin_pu, obj->OutMax_pu);
|
||||
|
||||
obj->Out_pu = f_clamp((Up + obj->Ui + obj->Ff_pu), obj->OutMin_pu, obj->OutMax_pu); // Saturate the output
|
||||
} // end of PI_run_parallel() function
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// PID Calculation
|
||||
// ----------------------------------------------------------------------
|
||||
static inline void PID_run_series(volatile PID_t *pPid_obj)
|
||||
{
|
||||
PID_t *obj = (PID_t *)pPid_obj;
|
||||
volatile float32_t Up, Ud_tmp;
|
||||
|
||||
// Compute the controller error
|
||||
obj->error = obj->Ref_pu - obj->Fbk_pu;
|
||||
|
||||
// Compute the proportional term
|
||||
Up = obj->Kp * obj->error;
|
||||
|
||||
if(obj->Ki>0.0f){
|
||||
// Compute the integral term in parallel form and saturate
|
||||
obj->Ui = f_clamp((obj->Ui + (obj->Ki * Up)), obj->OutMin_pu, obj->OutMax_pu);
|
||||
}
|
||||
|
||||
Ud_tmp = obj->Kd * obj->Ui; // Compute the derivative term
|
||||
|
||||
obj->Ud = Ud_tmp; // Replace with filter
|
||||
|
||||
obj->Out_pu = f_clamp((Up + obj->Ui + obj->Ud + obj->Ff_pu), obj->OutMin_pu, obj->OutMax_pu); // Saturate the output
|
||||
|
||||
}
|
||||
|
||||
static inline void PID_run_parallel(volatile PID_t *pPid_obj)
|
||||
{
|
||||
PID_t *obj = (PID_t *)pPid_obj;
|
||||
volatile float32_t Up, Ud_tmp;
|
||||
|
||||
|
||||
// Compute the controller error
|
||||
obj->error = obj->Ref_pu - obj->Fbk_pu;
|
||||
|
||||
// Compute the proportional term
|
||||
Up = obj->Kp * obj->error;
|
||||
|
||||
if(obj->Ki>0.0f){
|
||||
// Compute the integral term in parallel form and saturate
|
||||
obj->Ui = f_clamp((obj->Ui + (obj->Ki * obj->error)), obj->OutMin_pu, obj->OutMax_pu);
|
||||
}
|
||||
|
||||
Ud_tmp = obj->Kd * obj->error; // Compute the derivative term
|
||||
|
||||
obj->Ud = Ud_tmp; // Replace with filter
|
||||
|
||||
obj->Out_pu = f_clamp((Up + obj->Ui + obj->Ud + obj->Ff_pu), obj->OutMin_pu, obj->OutMax_pu); // Saturate the output
|
||||
}
|
||||
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// Calculate Current Parameters
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
static inline float32_t PI_calcKp(const float32_t Ls_H, const float32_t deviceCurrent_A, const float32_t deviceVoltage_V,
|
||||
const float32_t deviceCtrlPeriode_Sec)
|
||||
{
|
||||
// calculation is based on "Betragsoptimum"
|
||||
// Kp = Ls/(2*tau)
|
||||
float32_t x1;
|
||||
float32_t y1;
|
||||
float32_t Kp;
|
||||
|
||||
// multiplication with deviceCurrent_A is to get per unit values
|
||||
x1 = (float32_t)(Ls_H * deviceCurrent_A);
|
||||
|
||||
y1 = (float32_t)(2.0f * deviceCtrlPeriode_Sec);
|
||||
|
||||
// multiplication with deviceVoltage_V is to get per unit values
|
||||
y1 = (float32_t)(y1 * deviceVoltage_V);
|
||||
|
||||
Kp = (x1 / y1);
|
||||
return Kp;
|
||||
}
|
||||
|
||||
static inline float32_t PI_calcKi(const float32_t Rs_Ohm, const float32_t Ls_H, const float32_t deviceCtrlPeriode_Sec)
|
||||
{
|
||||
// calculation is based on "TI - MotorWare's documentation"
|
||||
float32_t RsByLs = (float32_t)(Rs_Ohm / Ls_H);
|
||||
float32_t Ki = RsByLs * deviceCtrlPeriode_Sec;
|
||||
//fix16_t Ki = 0;
|
||||
return Ki;
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// something...
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
// ----------------------------------------------------------------------
|
||||
// end of file
|
||||
// ----------------------------------------------------------------------
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* extern "C" */
|
||||
#endif /* BLDC_PI_H_ */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue