updated slave to match master bldc and type def
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						 | 
					@ -78,7 +78,7 @@ int8_t TIMER_0_init()
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	hri_tccount8_write_CC_reg(TC0, 0, 0x75); /* Compare/Capture Value: 0x75 */
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						hri_tccount8_write_CC_reg(TC0, 0, 0x75); /* Compare/Capture Value: 0x75 */
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	hri_tccount8_write_CC_reg(TC0, 1, 0xb4); /* Compare/Capture Value: 0xb4 */
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						hri_tccount8_write_CC_reg(TC0, 1, 0xc4); /* Compare/Capture Value: 0xb4 */
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	// hri_tccount8_write_COUNT_reg(TC0,0x0); /* Counter Value: 0x0 */
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						// hri_tccount8_write_COUNT_reg(TC0,0x0); /* Counter Value: 0x0 */
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					@ -91,11 +91,11 @@ void APPLICATION_StateMachine(void)
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		case SYSTEM_INIT:
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							case SYSTEM_INIT:
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			/* Toggle driver reset Latch */
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								/* Toggle driver reset Latch */
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			gpio_set_pin_level(M1_RST, true);
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								gpio_set_pin_level(M1_RST, true);
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			delay_us(100);
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								delay_ms(1);
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			gpio_set_pin_level(M1_RST, false);
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								gpio_set_pin_level(M1_RST, false);
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			delay_us(100);
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								delay_ms(1);
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			gpio_set_pin_level(M2_RST, true);
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								gpio_set_pin_level(M2_RST, true);
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			delay_us(100);
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								delay_ms(1);
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			gpio_set_pin_level(M2_RST, false);
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								gpio_set_pin_level(M2_RST, false);
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			/* Update State Variables */
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								/* Update State Variables */
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			applicationStatus.previousstate = applicationStatus.currentstate;
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								applicationStatus.previousstate = applicationStatus.currentstate;
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					@ -156,7 +156,7 @@ const static BLDCMotor_param_t FH_22mm24BXTR = {
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	//.controller_param.Pid_Speed.Ki = 0.0000001f,
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						//.controller_param.Pid_Speed.Ki = 0.0000001f,
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	.controller_param.Pi_Pos.Kp	   = 50.0f,
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						.controller_param.Pi_Pos.Kp	   = 50.0f,
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	.controller_param.Pi_Pos.Ki	   = 0.0f,
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						.controller_param.Pi_Pos.Ki	   = 0.0f,
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	.motor_MaxPWM = 800.0,
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						.motor_MaxPWM = 600.0,
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};
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					};
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					@ -1410,11 +1410,11 @@ drivers:
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    functionality: System
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					    functionality: System
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    api: HAL:HPL:GCLK
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					    api: HAL:HPL:GCLK
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    configuration:
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					    configuration:
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      $input: 100000000
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					      $input: 120000000
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      $input_id: Digital Phase Locked Loop (DPLL1)
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					      $input_id: Digital Phase Locked Loop (DPLL1)
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      RESERVED_InputFreq: 100000000
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					      RESERVED_InputFreq: 120000000
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      RESERVED_InputFreq_id: Digital Phase Locked Loop (DPLL1)
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					      RESERVED_InputFreq_id: Digital Phase Locked Loop (DPLL1)
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      _$freq_output_Generic clock generator 0: 100000000
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					      _$freq_output_Generic clock generator 0: 120000000
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      _$freq_output_Generic clock generator 1: 2000000
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					      _$freq_output_Generic clock generator 1: 2000000
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      _$freq_output_Generic clock generator 10: 12000000
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					      _$freq_output_Generic clock generator 10: 12000000
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      _$freq_output_Generic clock generator 11: 12000000
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					      _$freq_output_Generic clock generator 11: 12000000
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					@ -1556,11 +1556,11 @@ drivers:
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    functionality: System
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					    functionality: System
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    api: HAL:HPL:MCLK
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					    api: HAL:HPL:MCLK
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    configuration:
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					    configuration:
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      $input: 100000000
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					      $input: 120000000
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      $input_id: Generic clock generator 0
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					      $input_id: Generic clock generator 0
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      RESERVED_InputFreq: 100000000
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					      RESERVED_InputFreq: 120000000
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      RESERVED_InputFreq_id: Generic clock generator 0
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					      RESERVED_InputFreq_id: Generic clock generator 0
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      _$freq_output_CPU: 100000000
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					      _$freq_output_CPU: 120000000
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      cpu_clock_source: Generic clock generator 0
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					      cpu_clock_source: Generic clock generator 0
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      cpu_div: '1'
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					      cpu_div: '1'
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      enable_cpu_clock: true
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					      enable_cpu_clock: true
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					@ -1623,7 +1623,7 @@ drivers:
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      RESERVED_InputFreq_id: Generic clock generator 1
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					      RESERVED_InputFreq_id: Generic clock generator 1
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      _$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000
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					      _$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000
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      _$freq_output_Digital Phase Locked Loop (DPLL0): 47985664
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					      _$freq_output_Digital Phase Locked Loop (DPLL0): 47985664
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      _$freq_output_Digital Phase Locked Loop (DPLL1): 100000000
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					      _$freq_output_Digital Phase Locked Loop (DPLL1): 120000000
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      _$freq_output_External Crystal Oscillator 8-48MHz (XOSC0): 12000000
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					      _$freq_output_External Crystal Oscillator 8-48MHz (XOSC0): 12000000
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      _$freq_output_External Crystal Oscillator 8-48MHz (XOSC1): 12000000
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					      _$freq_output_External Crystal Oscillator 8-48MHz (XOSC1): 12000000
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      dfll_arch_bplckc: false
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					      dfll_arch_bplckc: false
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					@ -1674,7 +1674,7 @@ drivers:
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      fdpll1_arch_wuf: false
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					      fdpll1_arch_wuf: false
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      fdpll1_clock_dcofilter: 0
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					      fdpll1_clock_dcofilter: 0
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      fdpll1_clock_div: 0
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					      fdpll1_clock_div: 0
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      fdpll1_ldr: 49
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					      fdpll1_ldr: 59
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      fdpll1_ldrfrac: 0
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					      fdpll1_ldrfrac: 0
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      fdpll1_ref_clock: Generic clock generator 1
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					      fdpll1_ref_clock: Generic clock generator 1
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      xosc0_arch_cfden: false
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					      xosc0_arch_cfden: false
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					@ -568,7 +568,7 @@
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// <i> Value of LDR is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
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					// <i> Value of LDR is calculated using Fclk_dpll=Fckr*(LDR+1+LDRFRAC/32) formula as given in datasheet. This value is directly written in to DPLLRATIO register
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// <id> fdpll1_ldr
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					// <id> fdpll1_ldr
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#ifndef CONF_FDPLL1_LDR
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					#ifndef CONF_FDPLL1_LDR
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#define CONF_FDPLL1_LDR 0x31
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					#define CONF_FDPLL1_LDR 0x3b
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#endif
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					#endif
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// <o> Clock Divider <0x0-0x7FF>
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					// <o> Clock Divider <0x0-0x7FF>
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					@ -41,7 +41,7 @@
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 * \brief ADC0's Clock frequency
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					 * \brief ADC0's Clock frequency
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 */
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					 */
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#ifndef CONF_GCLK_ADC0_FREQUENCY
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					#ifndef CONF_GCLK_ADC0_FREQUENCY
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#define CONF_GCLK_ADC0_FREQUENCY 100000000
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					#define CONF_GCLK_ADC0_FREQUENCY 120000000
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#endif
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					#endif
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// <y> ADC Clock Source
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					// <y> ADC Clock Source
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					@ -81,7 +81,7 @@
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 * \brief ADC1's Clock frequency
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					 * \brief ADC1's Clock frequency
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 */
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					 */
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#ifndef CONF_GCLK_ADC1_FREQUENCY
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					#ifndef CONF_GCLK_ADC1_FREQUENCY
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#define CONF_GCLK_ADC1_FREQUENCY 100000000
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					#define CONF_GCLK_ADC1_FREQUENCY 120000000
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#endif
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					#endif
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// <y> CCL Clock Source
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					// <y> CCL Clock Source
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					@ -121,7 +121,7 @@
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 * \brief CCL's Clock frequency
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					 * \brief CCL's Clock frequency
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 */
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					 */
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#ifndef CONF_GCLK_CCL_FREQUENCY
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					#ifndef CONF_GCLK_CCL_FREQUENCY
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#define CONF_GCLK_CCL_FREQUENCY 100000000
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					#define CONF_GCLK_CCL_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EIC Clock Source
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					// <y> EIC Clock Source
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					@ -161,7 +161,7 @@
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 * \brief EIC's Clock frequency
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					 * \brief EIC's Clock frequency
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 */
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					 */
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#ifndef CONF_GCLK_EIC_FREQUENCY
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					#ifndef CONF_GCLK_EIC_FREQUENCY
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#define CONF_GCLK_EIC_FREQUENCY 100000000
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					#define CONF_GCLK_EIC_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 0 Clock Source
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					// <y> EVSYS Channel 0 Clock Source
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					@ -202,7 +202,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 1 Clock Source
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					// <y> EVSYS Channel 1 Clock Source
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					@ -243,7 +243,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 2 Clock Source
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					// <y> EVSYS Channel 2 Clock Source
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					@ -284,7 +284,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 3 Clock Source
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					// <y> EVSYS Channel 3 Clock Source
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					@ -325,7 +325,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 4 Clock Source
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					// <y> EVSYS Channel 4 Clock Source
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					@ -366,7 +366,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 5 Clock Source
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					// <y> EVSYS Channel 5 Clock Source
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					@ -407,7 +407,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 6 Clock Source
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					// <y> EVSYS Channel 6 Clock Source
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					@ -448,7 +448,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 7 Clock Source
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					// <y> EVSYS Channel 7 Clock Source
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					@ -489,7 +489,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 8 Clock Source
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					// <y> EVSYS Channel 8 Clock Source
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					@ -530,7 +530,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 9 Clock Source
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					// <y> EVSYS Channel 9 Clock Source
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					@ -571,7 +571,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 10 Clock Source
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					// <y> EVSYS Channel 10 Clock Source
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					@ -612,7 +612,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 120000000
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#endif
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					#endif
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// <y> EVSYS Channel 11 Clock Source
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					// <y> EVSYS Channel 11 Clock Source
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					@ -653,7 +653,7 @@
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 */
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					 */
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#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
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					#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
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#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 100000000
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					#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 120000000
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#endif
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					#endif
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/**
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					/**
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					@ -661,7 +661,7 @@
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 * \brief CPU's Clock frequency
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					 * \brief CPU's Clock frequency
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 */
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					 */
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#ifndef CONF_CPU_FREQUENCY
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					#ifndef CONF_CPU_FREQUENCY
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#define CONF_CPU_FREQUENCY 100000000
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					#define CONF_CPU_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// <y> Core Clock Source
 | 
					// <y> Core Clock Source
 | 
				
			||||||
| 
						 | 
					@ -733,7 +733,7 @@
 | 
				
			||||||
 * \brief SERCOM0's Core Clock frequency
 | 
					 * \brief SERCOM0's Core Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY
 | 
					#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 100000000
 | 
					#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/**
 | 
					/**
 | 
				
			||||||
| 
						 | 
					@ -813,7 +813,7 @@
 | 
				
			||||||
 * \brief SERCOM1's Core Clock frequency
 | 
					 * \brief SERCOM1's Core Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY
 | 
					#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 100000000
 | 
					#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/**
 | 
					/**
 | 
				
			||||||
| 
						 | 
					@ -893,7 +893,7 @@
 | 
				
			||||||
 * \brief SERCOM2's Core Clock frequency
 | 
					 * \brief SERCOM2's Core Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY
 | 
					#ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 100000000
 | 
					#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/**
 | 
					/**
 | 
				
			||||||
| 
						 | 
					@ -973,7 +973,7 @@
 | 
				
			||||||
 * \brief SERCOM5's Core Clock frequency
 | 
					 * \brief SERCOM5's Core Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_SERCOM5_CORE_FREQUENCY
 | 
					#ifndef CONF_GCLK_SERCOM5_CORE_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 100000000
 | 
					#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/**
 | 
					/**
 | 
				
			||||||
| 
						 | 
					@ -1021,7 +1021,7 @@
 | 
				
			||||||
 * \brief TC0's Clock frequency
 | 
					 * \brief TC0's Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_TC0_FREQUENCY
 | 
					#ifndef CONF_GCLK_TC0_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_TC0_FREQUENCY 100000000
 | 
					#define CONF_GCLK_TC0_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// <y> TC Clock Source
 | 
					// <y> TC Clock Source
 | 
				
			||||||
| 
						 | 
					@ -1061,7 +1061,7 @@
 | 
				
			||||||
 * \brief TC2's Clock frequency
 | 
					 * \brief TC2's Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_TC2_FREQUENCY
 | 
					#ifndef CONF_GCLK_TC2_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_TC2_FREQUENCY 100000000
 | 
					#define CONF_GCLK_TC2_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// <y> TC Clock Source
 | 
					// <y> TC Clock Source
 | 
				
			||||||
| 
						 | 
					@ -1101,7 +1101,7 @@
 | 
				
			||||||
 * \brief TC4's Clock frequency
 | 
					 * \brief TC4's Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_TC4_FREQUENCY
 | 
					#ifndef CONF_GCLK_TC4_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_TC4_FREQUENCY 100000000
 | 
					#define CONF_GCLK_TC4_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// <y> TCC Clock Source
 | 
					// <y> TCC Clock Source
 | 
				
			||||||
| 
						 | 
					@ -1141,7 +1141,7 @@
 | 
				
			||||||
 * \brief TCC0's Clock frequency
 | 
					 * \brief TCC0's Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_TCC0_FREQUENCY
 | 
					#ifndef CONF_GCLK_TCC0_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_TCC0_FREQUENCY 100000000
 | 
					#define CONF_GCLK_TCC0_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// <y> TCC Clock Source
 | 
					// <y> TCC Clock Source
 | 
				
			||||||
| 
						 | 
					@ -1181,7 +1181,7 @@
 | 
				
			||||||
 * \brief TCC1's Clock frequency
 | 
					 * \brief TCC1's Clock frequency
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
#ifndef CONF_GCLK_TCC1_FREQUENCY
 | 
					#ifndef CONF_GCLK_TCC1_FREQUENCY
 | 
				
			||||||
#define CONF_GCLK_TCC1_FREQUENCY 100000000
 | 
					#define CONF_GCLK_TCC1_FREQUENCY 120000000
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// <<< end of configuration section >>>
 | 
					// <<< end of configuration section >>>
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -218,12 +218,12 @@
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_gclk_config.h" IsConfig="true" Hash="fvc5nhPTGTNHCTNlzs6nhA" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_gclk_config.h" IsConfig="true" Hash="fvc5nhPTGTNHCTNlzs6nhA" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_mclk_config.h" IsConfig="true" Hash="pxBzoQXTG66x4dbzVzxteg" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_mclk_config.h" IsConfig="true" Hash="pxBzoQXTG66x4dbzVzxteg" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_osc32kctrl_config.h" IsConfig="true" Hash="HgvzEqDUH4jq/syjj/+G+Q" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_osc32kctrl_config.h" IsConfig="true" Hash="HgvzEqDUH4jq/syjj/+G+Q" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_oscctrl_config.h" IsConfig="true" Hash="Xe5v62bijwZLOPLD+rPcrA" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_oscctrl_config.h" IsConfig="true" Hash="Uje5LXAS+nQpGryt9t0fYA" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_port_config.h" IsConfig="true" Hash="rMTNR+5FXtu+wfT1NbfRRA" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_port_config.h" IsConfig="true" Hash="rMTNR+5FXtu+wfT1NbfRRA" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_sercom_config.h" IsConfig="true" Hash="Vm7v7a4F40Wzv368v+pLEw" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_sercom_config.h" IsConfig="true" Hash="Vm7v7a4F40Wzv368v+pLEw" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_tc_config.h" IsConfig="true" Hash="T93Kr6C+WDuufZob89oPeg" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_tc_config.h" IsConfig="true" Hash="T93Kr6C+WDuufZob89oPeg" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/hpl_tcc_config.h" IsConfig="true" Hash="2LU7afZ/3Yx7FE2KzF9dSQ" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/hpl_tcc_config.h" IsConfig="true" Hash="2LU7afZ/3Yx7FE2KzF9dSQ" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/peripheral_clk_config.h" IsConfig="true" Hash="GuMSQybrrAFfKR9u1GzqsQ" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/peripheral_clk_config.h" IsConfig="true" Hash="6eU7+fZNEY4RDC37iHjvJQ" />
 | 
				
			||||||
          <AcmeProjectActionInfo Action="File" Source="config/bno055_config.h" IsConfig="true" Hash="2hRq4Yx9B3nZuMEdrYIG8Q" />
 | 
					          <AcmeProjectActionInfo Action="File" Source="config/bno055_config.h" IsConfig="true" Hash="2hRq4Yx9B3nZuMEdrYIG8Q" />
 | 
				
			||||||
        </AcmeActionInfos>
 | 
					        </AcmeActionInfos>
 | 
				
			||||||
        <NonsecureFilesInfo />
 | 
					        <NonsecureFilesInfo />
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -7,10 +7,8 @@
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#include "bldc.h"
 | 
					#include "bldc.h"
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#include "statemachine.h"
 | 
					 | 
				
			||||||
#include "utilities.h"
 | 
					#include "utilities.h"
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					 | 
				
			||||||
void motor_StateMachine(BLDCMotor_t* const motor)
 | 
					void motor_StateMachine(BLDCMotor_t* const motor)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
| 
						 | 
					@ -38,7 +36,7 @@ void motor_StateMachine(BLDCMotor_t* const motor)
 | 
				
			||||||
			motor->motor_state.currentstate = MOTOR_PVI_CTRL_STATE;
 | 
								motor->motor_state.currentstate = MOTOR_PVI_CTRL_STATE;
 | 
				
			||||||
		break;
 | 
							break;
 | 
				
			||||||
		case MOTOR_OPEN_LOOP_STATE:
 | 
							case MOTOR_OPEN_LOOP_STATE:
 | 
				
			||||||
			BLDC_runOpenLoop(motor, 350);
 | 
								BLDC_runOpenLoop(motor, 100);
 | 
				
			||||||
			calculate_motor_speed(motor);
 | 
								calculate_motor_speed(motor);
 | 
				
			||||||
			motor->motor_state.previousstate = motor->motor_state.currentstate;
 | 
								motor->motor_state.previousstate = motor->motor_state.currentstate;
 | 
				
			||||||
		break;
 | 
							break;
 | 
				
			||||||
| 
						 | 
					@ -107,7 +105,7 @@ void BldcInitStruct(BLDCMotor_t* const motor, BLDCMotor_param_t * const motor_pa
 | 
				
			||||||
	motor->motor_status.actualDirection		 = 0;
 | 
						motor->motor_status.actualDirection		 = 0;
 | 
				
			||||||
	motor->motor_status.duty_cycle			 = 0;
 | 
						motor->motor_status.duty_cycle			 = 0;
 | 
				
			||||||
	motor->motor_status.calc_rpm			 = 0;
 | 
						motor->motor_status.calc_rpm			 = 0;
 | 
				
			||||||
	//motor->motor_status.abs_position		 = 0;
 | 
						motor->motor_status.abs_position		 = 0;
 | 
				
			||||||
	motor->motor_status.Num_Steps			 = 0;
 | 
						motor->motor_status.Num_Steps			 = 0;
 | 
				
			||||||
	motor->motor_status.cur_comm_step		 = 0;
 | 
						motor->motor_status.cur_comm_step		 = 0;
 | 
				
			||||||
	motor->motor_status.currentHallPattern	 = 1;
 | 
						motor->motor_status.currentHallPattern	 = 1;
 | 
				
			||||||
| 
						 | 
					@ -217,13 +215,12 @@ void exec_commutation(BLDCMotor_t* const motor)
 | 
				
			||||||
	volatile uint8_t currentHall = motor->readHall();
 | 
						volatile uint8_t currentHall = motor->readHall();
 | 
				
			||||||
	motor->motor_status.currentHallPattern = currentHall;
 | 
						motor->motor_status.currentHallPattern = currentHall;
 | 
				
			||||||
		
 | 
							
 | 
				
			||||||
	//if ((currentHall == INVALID_HALL_0)||(currentHall == INVALID_HALL_7))
 | 
						if (currentHall == INVALID_HALL_7)
 | 
				
			||||||
	//{
 | 
						{
 | 
				
			||||||
		//hri_tcc_write_PATTBUF_reg(motor->motor_param->pwm_desc->device.hw,  DISABLE_PATTERN);
 | 
							motor->motor_state.currentstate == MOTOR_FAULT;
 | 
				
			||||||
		//motor->motor_state.currentstate == MOTOR_FAULT;
 | 
							motor->motor_state.fault == MOTOR_HALLSENSORINVALID;
 | 
				
			||||||
		//motor->motor_state.fault == MOTOR_HALLSENSORINVALID;
 | 
							return;
 | 
				
			||||||
		//return;
 | 
						}
 | 
				
			||||||
	//}
 | 
					 | 
				
			||||||
																		   
 | 
																							   
 | 
				
			||||||
	// ----------------------------------------------------------------------
 | 
						// ----------------------------------------------------------------------
 | 
				
			||||||
	// Set Pattern Buffers
 | 
						// Set Pattern Buffers
 | 
				
			||||||
| 
						 | 
					@ -232,7 +229,7 @@ void exec_commutation(BLDCMotor_t* const motor)
 | 
				
			||||||
													  motor->motor_setpoints.directionOffset];
 | 
																		  motor->motor_setpoints.directionOffset];
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	//TCC0->PATTBUF.reg = temp_M1;
 | 
						//TCC0->PATTBUF.reg = temp_M1;
 | 
				
			||||||
	Tcc * tmp = (Tcc *)motor->motor_param->pwm_desc->device.hw;
 | 
						Tcc * tmp = (Tcc *)motor->pwm_desc->device.hw;
 | 
				
			||||||
	tmp->PATTBUF.reg = (uint16_t)temp_M1;
 | 
						tmp->PATTBUF.reg = (uint16_t)temp_M1;
 | 
				
			||||||
	//motor->motor_param->pwm_desc->device.hw->PATTBUF.reg = temp_M1;
 | 
						//motor->motor_param->pwm_desc->device.hw->PATTBUF.reg = temp_M1;
 | 
				
			||||||
	//hri_tcc_write_PATTBUF_reg(motor->motor_param->pwm_desc->device.hw,  temp_M1);
 | 
						//hri_tcc_write_PATTBUF_reg(motor->motor_param->pwm_desc->device.hw,  temp_M1);
 | 
				
			||||||
| 
						 | 
					@ -303,8 +300,8 @@ void calculate_motor_speed(BLDCMotor_t* const motor)
 | 
				
			||||||
{	
 | 
					{	
 | 
				
			||||||
	//tic_port(DEBUG_2_PORT);
 | 
						//tic_port(DEBUG_2_PORT);
 | 
				
			||||||
	volatile uint32_t temp_rpm = 0;
 | 
						volatile uint32_t temp_rpm = 0;
 | 
				
			||||||
	hri_tccount32_read_CC_reg(motor->motor_param->speedtimer_hw, 0); /* Read CC0 but throw away)*/
 | 
						hri_tccount32_read_CC_reg(motor->speedtimer_hw, 0); /* Read CC0 but throw away)*/
 | 
				
			||||||
	volatile uint32_t period_after_capture = hri_tccount32_read_CC_reg(motor->motor_param->speedtimer_hw, 1);
 | 
						volatile uint32_t period_after_capture = hri_tccount32_read_CC_reg(motor->speedtimer_hw, 1);
 | 
				
			||||||
	if((period_after_capture >= UINT32_MAX)||(period_after_capture == 0)||(period_after_capture > 600000))  {
 | 
						if((period_after_capture >= UINT32_MAX)||(period_after_capture == 0)||(period_after_capture > 600000))  {
 | 
				
			||||||
		motor->motor_status.calc_rpm = 0;
 | 
							motor->motor_status.calc_rpm = 0;
 | 
				
			||||||
	} else {
 | 
						} else {
 | 
				
			||||||
| 
						 | 
					@ -362,7 +359,7 @@ void calculate_motor_speed(BLDCMotor_t* const motor)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
void disable_phases(BLDCMotor_t* const motor)
 | 
					void disable_phases(BLDCMotor_t* const motor)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	Tcc * tmp = (Tcc *)motor->motor_param->pwm_desc->device.hw;
 | 
						Tcc * tmp = (Tcc *)motor->pwm_desc->device.hw;
 | 
				
			||||||
	tmp->PATTBUF.reg = DISABLE_PATTERN;
 | 
						tmp->PATTBUF.reg = DISABLE_PATTERN;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
| 
						 | 
					@ -371,14 +368,6 @@ void disable_phases(BLDCMotor_t* const motor)
 | 
				
			||||||
//------------------------------------------------------------------------------
 | 
					//------------------------------------------------------------------------------
 | 
				
			||||||
void BLDC_runCurrentCntl(BLDCMotor_t *motor, const float32_t curfbk, const float32_t curRef)
 | 
					void BLDC_runCurrentCntl(BLDCMotor_t *motor, const float32_t curfbk, const float32_t curRef)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	if (curfbk > DEVICE_SHUNT_CURRENT_A)
 | 
					 | 
				
			||||||
	{
 | 
					 | 
				
			||||||
		motor->motor_state.currentstate = MOTOR_FAULT;
 | 
					 | 
				
			||||||
		motor->motor_state.fault = MOTOR_CURRENT_OVERSCALE;
 | 
					 | 
				
			||||||
	}
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	motor->controllers.Pi_Idc.Fbk_pu = f_clamp(curfbk, -DEVICE_SHUNT_CURRENT_A, DEVICE_SHUNT_CURRENT_A); // Clamped to max current sensor readingspeedfbk;
 | 
						motor->controllers.Pi_Idc.Fbk_pu = f_clamp(curfbk, -DEVICE_SHUNT_CURRENT_A, DEVICE_SHUNT_CURRENT_A); // Clamped to max current sensor readingspeedfbk;
 | 
				
			||||||
	motor->controllers.Pi_Idc.Ref_pu = f_clamp(curRef, -motor->motor_param->motor_Max_Current_IDC_A, 
 | 
						motor->controllers.Pi_Idc.Ref_pu = f_clamp(curRef, -motor->motor_param->motor_Max_Current_IDC_A, 
 | 
				
			||||||
														motor->motor_param->motor_Max_Current_IDC_A);	// Clamp desired to Motor Max Current i_ref_clamped;
 | 
																			motor->motor_param->motor_Max_Current_IDC_A);	// Clamp desired to Motor Max Current i_ref_clamped;
 | 
				
			||||||
| 
						 | 
					@ -477,16 +466,6 @@ volatile uint8_t readHallSensorM1(void)
 | 
				
			||||||
	motor_read = (motor_read & M1_HALL_A_MASK) | (uint8_t)((PORT->Group[M1_HALL_A_GROUP].IN.reg & M1_HALL_A_PORT)>>(M1_HALL_A_LSR));
 | 
						motor_read = (motor_read & M1_HALL_A_MASK) | (uint8_t)((PORT->Group[M1_HALL_A_GROUP].IN.reg & M1_HALL_A_PORT)>>(M1_HALL_A_LSR));
 | 
				
			||||||
	motor_read = (motor_read & M1_HALL_B_MASK) | (uint8_t)((PORT->Group[M1_HALL_B_GROUP].IN.reg & M1_HALL_B_PORT)>>(M1_HALL_B_LSR));
 | 
						motor_read = (motor_read & M1_HALL_B_MASK) | (uint8_t)((PORT->Group[M1_HALL_B_GROUP].IN.reg & M1_HALL_B_PORT)>>(M1_HALL_B_LSR));
 | 
				
			||||||
	motor_read = (motor_read & M1_HALL_C_MASK) | (uint8_t)((PORT->Group[M1_HALL_C_GROUP].IN.reg & M1_HALL_C_PORT)>>(M1_HALL_C_LSR));
 | 
						motor_read = (motor_read & M1_HALL_C_MASK) | (uint8_t)((PORT->Group[M1_HALL_C_GROUP].IN.reg & M1_HALL_C_PORT)>>(M1_HALL_C_LSR));
 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	//if(motor_read == INVALID_HALL_7) {
 | 
					 | 
				
			||||||
		//Motor1.motor_state.currentstate = MOTOR_FAULT;
 | 
					 | 
				
			||||||
		//Motor1.motor_state.fault = MOTOR_HALLSENSORINVALID;
 | 
					 | 
				
			||||||
		////applicationStatus.currentstate = APP_FAULT;
 | 
					 | 
				
			||||||
	//}
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	return motor_read;
 | 
						return motor_read;
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	//volatile uint8_t a = gpio_get_pin_level(M1_HALL_A_PIN);
 | 
						//volatile uint8_t a = gpio_get_pin_level(M1_HALL_A_PIN);
 | 
				
			||||||
| 
						 | 
					@ -506,14 +485,13 @@ volatile uint8_t readHallSensorM2(void)
 | 
				
			||||||
	motor_read = (motor_read & M2_HALL_B_MASK) | (uint8_t)((PORT->Group[M2_HALL_B_GROUP].IN.reg & M2_HALL_B_PORT)>>(M2_HALL_B_LSR)); 
 | 
						motor_read = (motor_read & M2_HALL_B_MASK) | (uint8_t)((PORT->Group[M2_HALL_B_GROUP].IN.reg & M2_HALL_B_PORT)>>(M2_HALL_B_LSR)); 
 | 
				
			||||||
	motor_read = (motor_read & M2_HALL_C_MASK) | (uint8_t)((PORT->Group[M2_HALL_C_GROUP].IN.reg & M2_HALL_C_PORT)>>(M2_HALL_C_LSR)); 
 | 
						motor_read = (motor_read & M2_HALL_C_MASK) | (uint8_t)((PORT->Group[M2_HALL_C_GROUP].IN.reg & M2_HALL_C_PORT)>>(M2_HALL_C_LSR)); 
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	
 | 
						return motor_read;
 | 
				
			||||||
	//if(motor_read == INVALID_HALL_7) {
 | 
						//if(((motor_read == INVALID_HALL_0) || (motor_read == INVALID_HALL_7))) {
 | 
				
			||||||
		//Motor2.motor_state.currentstate = MOTOR_FAULT;
 | 
					 | 
				
			||||||
		//Motor2.motor_state.fault = MOTOR_HALLSENSORINVALID;
 | 
							//Motor2.motor_state.fault = MOTOR_HALLSENSORINVALID;
 | 
				
			||||||
 | 
							//Motor2.motor_state.currentstate = MOTOR_FAULT;
 | 
				
			||||||
		////applicationStatus.currentstate = APP_FAULT;
 | 
							////applicationStatus.currentstate = APP_FAULT;
 | 
				
			||||||
	//}
 | 
						//}
 | 
				
			||||||
		
 | 
							
 | 
				
			||||||
	return motor_read;
 | 
					 | 
				
			||||||
	//volatile uint8_t a = gpio_get_pin_level(M2_HALL_A_PIN);
 | 
						//volatile uint8_t a = gpio_get_pin_level(M2_HALL_A_PIN);
 | 
				
			||||||
	//volatile uint8_t b = gpio_get_pin_level(M2_HALL_B_PIN);
 | 
						//volatile uint8_t b = gpio_get_pin_level(M2_HALL_B_PIN);
 | 
				
			||||||
	//volatile uint8_t c = gpio_get_pin_level(M2_HALL_C_PIN);	
 | 
						//volatile uint8_t c = gpio_get_pin_level(M2_HALL_C_PIN);	
 | 
				
			||||||
| 
						 | 
					@ -531,126 +509,43 @@ volatile uint8_t readHallSensorM2(void)
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
void read_zero_current_offset_value(BLDCMotor_t *motor1, BLDCMotor_t *motor2)
 | 
					void read_zero_current_offset_value(BLDCMotor_t *motor1, BLDCMotor_t *motor2)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	volatile int32_t phase_A_zero_current_offset_temp = 0;
 | 
						volatile int32_t phase_zero_current_offset [NUM_CUR_SENSORS] = {0};
 | 
				
			||||||
	volatile int32_t phase_B_zero_current_offset_temp = 0;
 | 
						volatile int16_t zero_current_offset_temp = 0;
 | 
				
			||||||
	volatile int16_t zero_current_offset_temp[2] = {0,0};
 | 
						const uint8_t samples = 32;
 | 
				
			||||||
	const uint8_t samples = 16;
 | 
					 | 
				
			||||||
	uint8_t i;
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	// ------------------------------------------------------------------
 | 
					 | 
				
			||||||
	//							Motor 1
 | 
					 | 
				
			||||||
	// -------------------------------------------------------------------
 | 
					 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	adc_sync_enable_channel(&ADC_1, 9);
 | 
						adc_sync_enable_channel(&ADC_1, 9);
 | 
				
			||||||
	
 | 
						for (int n=0; n<NUM_CUR_SENSORS; n++)
 | 
				
			||||||
	/* Single ended */
 | 
						{
 | 
				
			||||||
	//ADC1->INPUTCTRL.reg = 0x1809;
 | 
							ADC1->INPUTCTRL.reg = adc1_seq_regs[n];
 | 
				
			||||||
	/* Differential */
 | 
							for (int i=0; i<samples; i++)
 | 
				
			||||||
	ADC1->INPUTCTRL.reg = 0x0089;
 | 
					 | 
				
			||||||
	while (ADC1->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	for (i=0; i<samples; i++)
 | 
					 | 
				
			||||||
		{
 | 
							{
 | 
				
			||||||
			while (ADC1->STATUS.bit.ADCBUSY) {};					 /* Wait for bus synchronization. */
 | 
								while (ADC1->STATUS.bit.ADCBUSY) {};					 /* Wait for bus synchronization. */
 | 
				
			||||||
			ADC1->SWTRIG.bit.START = true;							 /* Start the ADC using a software trigger. */
 | 
								ADC1->SWTRIG.bit.START = true;							 /* Start the ADC using a software trigger. */
 | 
				
			||||||
		while (ADC1->INTFLAG.bit.RESRDY == 0){};			/* Wait for the result ready flag to be set. */
 | 
								while (ADC1->INTFLAG.bit.RESRDY == 0);					 /* Wait for the result ready flag to be set. */
 | 
				
			||||||
		zero_current_offset_temp[0]	= (int16_t)ADC1->RESULT.reg; /* Read the value. */
 | 
					 | 
				
			||||||
			ADC1->INTFLAG.reg = ADC_INTFLAG_RESRDY;					 /* Clear the flag. */
 | 
								ADC1->INTFLAG.reg = ADC_INTFLAG_RESRDY;					 /* Clear the flag. */
 | 
				
			||||||
		phase_A_zero_current_offset_temp += (int32_t)zero_current_offset_temp[0];
 | 
								zero_current_offset_temp	= (int16_t)ADC1->RESULT.reg; /* Read the value. */
 | 
				
			||||||
 | 
								phase_zero_current_offset[n] += zero_current_offset_temp;
 | 
				
			||||||
 | 
							}
 | 
				
			||||||
 | 
							phase_zero_current_offset[n] = 	phase_zero_current_offset[n]/samples;
 | 
				
			||||||
	}
 | 
						}
 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	/* Set Motor Variables */
 | 
					 | 
				
			||||||
	motor1->Voffset_lsb.A = phase_A_zero_current_offset_temp/samples;
 | 
					 | 
				
			||||||
	adc_sync_disable_channel(&ADC_1, 9);
 | 
						adc_sync_disable_channel(&ADC_1, 9);
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	adc_sync_enable_channel(&ADC_1, 8);
 | 
						motor1->Voffset_lsb.A = phase_zero_current_offset[0];
 | 
				
			||||||
	/* Single ended */
 | 
						motor1->Voffset_lsb.B = phase_zero_current_offset[1];
 | 
				
			||||||
	//ADC1->INPUTCTRL.reg = 0x1808;
 | 
						motor2->Voffset_lsb.A = phase_zero_current_offset[2];
 | 
				
			||||||
	/* Differential */
 | 
						motor2->Voffset_lsb.B = phase_zero_current_offset[3];
 | 
				
			||||||
	ADC1->INPUTCTRL.reg = 0x0088;
 | 
					 | 
				
			||||||
	while (ADC1->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	for (i=0; i<samples; i++)
 | 
						/* Check for Defective current sensor based on offset from nominal 1.5V (O current voltage) */
 | 
				
			||||||
	{
 | 
					 | 
				
			||||||
		while (ADC1->STATUS.bit.ADCBUSY) {};			/* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
		ADC1->SWTRIG.bit.START = true;					/* Start the ADC using a software trigger. */
 | 
					 | 
				
			||||||
		while (ADC1->INTFLAG.bit.RESRDY == 0){};			/* Wait for the result ready flag to be set. */
 | 
					 | 
				
			||||||
		zero_current_offset_temp[1]	= (int16_t)ADC1->RESULT.reg; /* Read the value. */
 | 
					 | 
				
			||||||
		ADC1->INTFLAG.reg = ADC_INTFLAG_RESRDY;			/* Clear the flag. */		
 | 
					 | 
				
			||||||
		phase_B_zero_current_offset_temp += (int32_t)zero_current_offset_temp[1];
 | 
					 | 
				
			||||||
	}
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	/* Set Motor Variables */
 | 
					 | 
				
			||||||
	motor1->Voffset_lsb.B = phase_B_zero_current_offset_temp/samples;
 | 
					 | 
				
			||||||
	adc_sync_disable_channel(&ADC_1, 8);
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	//adc_sync_enable_channel(&ADC_1, 0);
 | 
					 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	if ((abs(motor1->Voffset_lsb.A) > MAX_CUR_SENSE_OFFSET) || (abs(motor1->Voffset_lsb.B) > MAX_CUR_SENSE_OFFSET))
 | 
						if ((abs(motor1->Voffset_lsb.A) > MAX_CUR_SENSE_OFFSET) || (abs(motor1->Voffset_lsb.B) > MAX_CUR_SENSE_OFFSET))
 | 
				
			||||||
	{
 | 
						{
 | 
				
			||||||
		motor1->motor_state.currentstate = MOTOR_FAULT;
 | 
							motor1->motor_state.currentstate = MOTOR_FAULT;
 | 
				
			||||||
		motor1->motor_state.fault = MOTOR_CURRENT_SENSOR;
 | 
							motor1->motor_state.fault = MOTOR_CURRENT_SENSOR;
 | 
				
			||||||
		
 | 
					 | 
				
			||||||
	}
 | 
						}
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	// ------------------------------------------------------------------
 | 
					 | 
				
			||||||
	//							Motor 2
 | 
					 | 
				
			||||||
	// -------------------------------------------------------------------
 | 
					 | 
				
			||||||
	phase_A_zero_current_offset_temp = 0;
 | 
					 | 
				
			||||||
	phase_B_zero_current_offset_temp = 0;	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	adc_sync_enable_channel(&ADC_1, 7);
 | 
					 | 
				
			||||||
	/* Single ended */
 | 
					 | 
				
			||||||
	//ADC1->INPUTCTRL.reg = 0x1807;
 | 
					 | 
				
			||||||
	/* Differential */
 | 
					 | 
				
			||||||
	ADC1->INPUTCTRL.reg = 0x0087;
 | 
					 | 
				
			||||||
	while (ADC1->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	for (i=0; i<samples; i++)
 | 
					 | 
				
			||||||
	{
 | 
					 | 
				
			||||||
		while (ADC1->STATUS.bit.ADCBUSY) {};			/* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
		ADC1->SWTRIG.bit.START = true;					/* Start the ADC using a software trigger. */
 | 
					 | 
				
			||||||
		while (ADC1->INTFLAG.bit.RESRDY == 0);			/* Wait for the result ready flag to be set. */
 | 
					 | 
				
			||||||
		ADC1->INTFLAG.reg = ADC_INTFLAG_RESRDY;			/* Clear the flag. */
 | 
					 | 
				
			||||||
		zero_current_offset_temp[0]	= (int16_t)ADC1->RESULT.reg; /* Read the value. */
 | 
					 | 
				
			||||||
		
 | 
					 | 
				
			||||||
		phase_A_zero_current_offset_temp += (int32_t)zero_current_offset_temp[0];
 | 
					 | 
				
			||||||
	}
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	/* Set Motor Variables */
 | 
					 | 
				
			||||||
	motor2->Voffset_lsb.A = phase_A_zero_current_offset_temp/samples;
 | 
					 | 
				
			||||||
	adc_sync_disable_channel(&ADC_1, 7);
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	adc_sync_enable_channel(&ADC_1, 6);
 | 
					 | 
				
			||||||
	/* Single ended */
 | 
					 | 
				
			||||||
	//ADC1->INPUTCTRL.reg = 0x1806;
 | 
					 | 
				
			||||||
	/* Differential */
 | 
					 | 
				
			||||||
	ADC1->INPUTCTRL.reg = 0x0086;
 | 
					 | 
				
			||||||
	while (ADC1->STATUS.bit.ADCBUSY) {}; /* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
		
 | 
					 | 
				
			||||||
	for (i=0; i<samples; i++)
 | 
					 | 
				
			||||||
	{
 | 
					 | 
				
			||||||
		while (ADC1->STATUS.bit.ADCBUSY) {};			/* Wait for bus synchronization. */
 | 
					 | 
				
			||||||
		ADC1->SWTRIG.bit.START = true;					/* Start the ADC using a software trigger. */
 | 
					 | 
				
			||||||
		while (ADC1->INTFLAG.bit.RESRDY == 0);			/* Wait for the result ready flag to be set. */
 | 
					 | 
				
			||||||
		ADC1->INTFLAG.reg = ADC_INTFLAG_RESRDY;			/* Clear the flag. */
 | 
					 | 
				
			||||||
		zero_current_offset_temp[1]	= (int16_t)ADC1->RESULT.reg; /* Read the value. */
 | 
					 | 
				
			||||||
		
 | 
					 | 
				
			||||||
		phase_B_zero_current_offset_temp += (int32_t)zero_current_offset_temp[1];
 | 
					 | 
				
			||||||
	}
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	/* Set Motor Variables */
 | 
					 | 
				
			||||||
	motor2->Voffset_lsb.B = phase_B_zero_current_offset_temp/samples;
 | 
					 | 
				
			||||||
	adc_sync_disable_channel(&ADC_1, 6);
 | 
					 | 
				
			||||||
	//adc_sync_disable_channel(&ADC_1, 0);
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	if ((abs(motor2->Voffset_lsb.A) > MAX_CUR_SENSE_OFFSET) || (abs(motor2->Voffset_lsb.B) > MAX_CUR_SENSE_OFFSET))
 | 
						if ((abs(motor2->Voffset_lsb.A) > MAX_CUR_SENSE_OFFSET) || (abs(motor2->Voffset_lsb.B) > MAX_CUR_SENSE_OFFSET))
 | 
				
			||||||
	{
 | 
						{
 | 
				
			||||||
		motor2->motor_state.currentstate = MOTOR_FAULT;
 | 
							motor2->motor_state.currentstate = MOTOR_FAULT;
 | 
				
			||||||
		motor2->motor_state.fault = MOTOR_CURRENT_SENSOR;
 | 
							motor2->motor_state.fault = MOTOR_CURRENT_SENSOR;
 | 
				
			||||||
	}
 | 
						}
 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
| 
						 | 
					@ -41,10 +41,16 @@
 | 
				
			||||||
#define ADC_LSB_SIZE				(ADC_VOLTAGE_REFERENCE/ADC_MAX_COUNTS)
 | 
					#define ADC_LSB_SIZE				(ADC_VOLTAGE_REFERENCE/ADC_MAX_COUNTS)
 | 
				
			||||||
#define LSB_TO_PU					(ADC_LSB_SIZE * ONEON_CURRENT_SENSOR_SENSITIVITY)
 | 
					#define LSB_TO_PU					(ADC_LSB_SIZE * ONEON_CURRENT_SENSOR_SENSITIVITY)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					//static const uint32_t adc1_seq_regs[4]	= {0x0089, 0x0088, 0x0087, 0x0086};
 | 
				
			||||||
 | 
					//static volatile int16_t adc0_res[4]	= {0};
 | 
				
			||||||
 | 
					//static volatile int16_t adc1_res[4]	= {0};
 | 
				
			||||||
 | 
					extern const uint32_t adc0_seq_regs[4];	
 | 
				
			||||||
 | 
					extern const uint32_t adc1_seq_regs[4];
 | 
				
			||||||
 | 
					extern volatile int16_t adc1_res[4];
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
// Define the control and PWM frequencies:
 | 
					// Define the control and PWM frequencies:
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
// 16kHz is the maximum frequency according to the calculation duration in the mode run and spin.
 | 
					 | 
				
			||||||
#define DEVICE_MCU_FREQUENCY_Hz        (120000000U)
 | 
					#define DEVICE_MCU_FREQUENCY_Hz        (120000000U)
 | 
				
			||||||
#define DEVICE_SPEEDTC_DIV			   (4U)
 | 
					#define DEVICE_SPEEDTC_DIV			   (4U)
 | 
				
			||||||
#define DEVICE_SPEEDTC_FREQUENCY_Hz    (DEVICE_MCU_FREQUENCY_Hz/DEVICE_SPEEDTC_DIV)
 | 
					#define DEVICE_SPEEDTC_FREQUENCY_Hz    (DEVICE_MCU_FREQUENCY_Hz/DEVICE_SPEEDTC_DIV)
 | 
				
			||||||
| 
						 | 
					@ -61,8 +67,8 @@
 | 
				
			||||||
#define DEVICE_SHUNT_CURRENT_A				2.5f    // phase current(PEAK) [A]
 | 
					#define DEVICE_SHUNT_CURRENT_A				2.5f    // phase current(PEAK) [A]
 | 
				
			||||||
#define CURRENT_SENSOR_SENSITIVITY			0.4f    //V/A
 | 
					#define CURRENT_SENSOR_SENSITIVITY			0.4f    //V/A
 | 
				
			||||||
#define ONEON_CURRENT_SENSOR_SENSITIVITY	2.5f    //V/A
 | 
					#define ONEON_CURRENT_SENSOR_SENSITIVITY	2.5f    //V/A
 | 
				
			||||||
#define MAX_CUR_SENSE_OFFSET				150
 | 
					#define MAX_CUR_SENSE_OFFSET				100
 | 
				
			||||||
 | 
					#define NUM_CUR_SENSORS						4
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
// 	global variables
 | 
					// 	global variables
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
| 
						 | 
					@ -70,12 +76,17 @@
 | 
				
			||||||
static const uint8_t HALL_PATTERN_ARRAY[16]		= {0, 5, 3, 1, 6, 4, 2, 0, 0, 3, 6, 2, 5, 1, 4, 0 };
 | 
					static const uint8_t HALL_PATTERN_ARRAY[16]		= {0, 5, 3, 1, 6, 4, 2, 0, 0, 3, 6, 2, 5, 1, 4, 0 };
 | 
				
			||||||
static const uint8_t MOTOR_COMMUTATION_STEPS[8]		= {9, 1, 3, 2, 5, 6, 4, 9};
 | 
					static const uint8_t MOTOR_COMMUTATION_STEPS[8]		= {9, 1, 3, 2, 5, 6, 4, 9};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
volatile BLDCMotor_t Motor1;
 | 
					static volatile BLDCMotor_t Motor1 = {
 | 
				
			||||||
volatile BLDCMotor_t Motor2;
 | 
						.pwm_desc = &PWM_0,
 | 
				
			||||||
 | 
						.speedtimer_hw = TC2,
 | 
				
			||||||
volatile MOTOR_STATE_t Motor1_Status;
 | 
					};
 | 
				
			||||||
volatile MOTOR_STATE_t Motor2_Status;
 | 
					static volatile BLDCMotor_t Motor2  = {
 | 
				
			||||||
 | 
						.pwm_desc = &PWM_1,
 | 
				
			||||||
 | 
						.speedtimer_hw = TC4,
 | 
				
			||||||
 | 
					};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					static volatile MOTOR_STATE_t Motor1_Status;
 | 
				
			||||||
 | 
					static volatile MOTOR_STATE_t Motor2_Status;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
// 	functions
 | 
					// 	functions
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -62,6 +62,7 @@ volatile typedef struct
 | 
				
			||||||
	volatile uint8_t   actualDirection;	//! The actual direction of rotation.
 | 
						volatile uint8_t   actualDirection;	//! The actual direction of rotation.
 | 
				
			||||||
	volatile uint16_t  duty_cycle;
 | 
						volatile uint16_t  duty_cycle;
 | 
				
			||||||
	volatile int16_t   calc_rpm;
 | 
						volatile int16_t   calc_rpm;
 | 
				
			||||||
 | 
						volatile int16_t   abs_position;
 | 
				
			||||||
	volatile int16_t   Num_Steps;
 | 
						volatile int16_t   Num_Steps;
 | 
				
			||||||
	/* Hall States */
 | 
						/* Hall States */
 | 
				
			||||||
	//volatile uint8_t   prevHallPattern;
 | 
						//volatile uint8_t   prevHallPattern;
 | 
				
			||||||
| 
						 | 
					@ -81,8 +82,10 @@ volatile typedef struct BLDCmotor
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	/* Hardware */
 | 
						/* Hardware */
 | 
				
			||||||
	volatile BLDCMotor_param_t *motor_param;
 | 
						volatile BLDCMotor_param_t *motor_param;
 | 
				
			||||||
	volatile MOTOR_STATE_t motor_state;
 | 
						struct pwm_descriptor const *pwm_desc;
 | 
				
			||||||
 | 
						void *const speedtimer_hw;
 | 
				
			||||||
	/* Status */
 | 
						/* Status */
 | 
				
			||||||
 | 
						volatile MOTOR_STATE_t motor_state;
 | 
				
			||||||
	volatile MOTOR_Status motor_status;
 | 
						volatile MOTOR_Status motor_status;
 | 
				
			||||||
	/* Measured Values */
 | 
						/* Measured Values */
 | 
				
			||||||
	volatile MOTOR_PHASES_t Iphase_pu;
 | 
						volatile MOTOR_PHASES_t Iphase_pu;
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -25,12 +25,12 @@
 | 
				
			||||||
#define DMAC_CHANNEL_ADC_SEQ 2U
 | 
					#define DMAC_CHANNEL_ADC_SEQ 2U
 | 
				
			||||||
#define DMAC_CHANNEL_ADC_SRAM 1U
 | 
					#define DMAC_CHANNEL_ADC_SRAM 1U
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* Single Ended */
 | 
					const uint32_t adc0_seq_regs[4]	= {0};
 | 
				
			||||||
//const uint32_t adc_seq_regs[4]	= {0x1807, 0x1806, 0x1809, 0x1808};
 | 
					const uint32_t adc1_seq_regs[4]	= {0x0089, 0x0088, 0x0087, 0x0086}; /* Differential */
 | 
				
			||||||
/* Differential */
 | 
					//const uint32_t adc1_seq_regs[4]	= {0x1807, 0x1806, 0x1809, 0x1808}; /* Single Ended */
 | 
				
			||||||
const uint32_t adc_seq_regs[4]	= {0x0089, 0x0088, 0x0087, 0x0086};
 | 
					volatile int16_t adc0_res[4]	= {0};
 | 
				
			||||||
 | 
					volatile int16_t adc1_res[4]	= {0};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
volatile int16_t adc_res[4]	= {0};
 | 
					 | 
				
			||||||
struct _dma_resource *adc_sram_dma_resource;
 | 
					struct _dma_resource *adc_sram_dma_resource;
 | 
				
			||||||
struct _dma_resource *adc_dmac_sequence_resource;
 | 
					struct _dma_resource *adc_dmac_sequence_resource;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
| 
						 | 
					@ -132,7 +132,7 @@ inline void adc_dmac_sequence_init()
 | 
				
			||||||
	/* Configure the DMAC source address, destination address,
 | 
						/* Configure the DMAC source address, destination address,
 | 
				
			||||||
	 * next descriptor address, data count and Enable the DMAC Channel 
 | 
						 * next descriptor address, data count and Enable the DMAC Channel 
 | 
				
			||||||
	 */
 | 
						 */
 | 
				
			||||||
	_dma_set_source_address(DMAC_CHANNEL_ADC_SEQ, (const void *)adc_seq_regs);
 | 
						_dma_set_source_address(DMAC_CHANNEL_ADC_SEQ, (const void *)adc1_seq_regs);
 | 
				
			||||||
	_dma_set_destination_address(DMAC_CHANNEL_ADC_SEQ, (const void *)&ADC1->DSEQDATA.reg);
 | 
						_dma_set_destination_address(DMAC_CHANNEL_ADC_SEQ, (const void *)&ADC1->DSEQDATA.reg);
 | 
				
			||||||
	_dma_set_data_amount(DMAC_CHANNEL_ADC_SEQ, 4);
 | 
						_dma_set_data_amount(DMAC_CHANNEL_ADC_SEQ, 4);
 | 
				
			||||||
	_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SEQ, DMAC_CHANNEL_ADC_SEQ);
 | 
						_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SEQ, DMAC_CHANNEL_ADC_SEQ);
 | 
				
			||||||
| 
						 | 
					@ -149,15 +149,13 @@ inline void adc_sram_dmac_init()
 | 
				
			||||||
	/* Configure the DMAC source address, destination address,
 | 
						/* Configure the DMAC source address, destination address,
 | 
				
			||||||
	 * next descriptor address, data count and Enable the DMAC Channel */
 | 
						 * next descriptor address, data count and Enable the DMAC Channel */
 | 
				
			||||||
	_dma_set_source_address(DMAC_CHANNEL_ADC_SRAM, (const void *)&ADC1->RESULT.reg);
 | 
						_dma_set_source_address(DMAC_CHANNEL_ADC_SRAM, (const void *)&ADC1->RESULT.reg);
 | 
				
			||||||
	_dma_set_destination_address(DMAC_CHANNEL_ADC_SRAM, (const void *)adc_res);
 | 
						_dma_set_destination_address(DMAC_CHANNEL_ADC_SRAM, (const void *)adc1_res);
 | 
				
			||||||
	_dma_set_data_amount(DMAC_CHANNEL_ADC_SRAM, 4);
 | 
						_dma_set_data_amount(DMAC_CHANNEL_ADC_SRAM, 4);
 | 
				
			||||||
	_dma_set_irq_state(DMAC_CHANNEL_ADC_SRAM, DMA_TRANSFER_COMPLETE_CB, true);
 | 
						_dma_set_irq_state(DMAC_CHANNEL_ADC_SRAM, DMA_TRANSFER_COMPLETE_CB, true);
 | 
				
			||||||
	_dma_get_channel_resource(&adc_sram_dma_resource, DMAC_CHANNEL_ADC_SRAM);
 | 
						_dma_get_channel_resource(&adc_sram_dma_resource, DMAC_CHANNEL_ADC_SRAM);
 | 
				
			||||||
	adc_sram_dma_resource[0].dma_cb.transfer_done = adc_sram_dma_callback;
 | 
						adc_sram_dma_resource[0].dma_cb.transfer_done = adc_sram_dma_callback;
 | 
				
			||||||
	_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SRAM, DMAC_CHANNEL_ADC_SRAM);
 | 
						_dma_set_next_descriptor(DMAC_CHANNEL_ADC_SRAM, DMAC_CHANNEL_ADC_SRAM);
 | 
				
			||||||
	_dma_enable_transaction(DMAC_CHANNEL_ADC_SRAM, false);
 | 
						_dma_enable_transaction(DMAC_CHANNEL_ADC_SRAM, false);
 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	
 | 
					 | 
				
			||||||
	//hri_dmacchannel_set_CHCTRLB_CMD_bf(&DMAC->Channel[DMAC_CHANNEL_ADC_SRAM], 0x01);	//Suspend
 | 
						//hri_dmacchannel_set_CHCTRLB_CMD_bf(&DMAC->Channel[DMAC_CHANNEL_ADC_SRAM], 0x01);	//Suspend
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -23,8 +23,8 @@ void process_currents()
 | 
				
			||||||
	volatile int16_t phase_A_current_raw, phase_B_current_raw;
 | 
						volatile int16_t phase_A_current_raw, phase_B_current_raw;
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	/* Motor 1 */
 | 
						/* Motor 1 */
 | 
				
			||||||
	phase_A_current_raw = (adc_res[0] - Motor1.Voffset_lsb.A);
 | 
						phase_A_current_raw = (adc1_res[0] - Motor1.Voffset_lsb.A);
 | 
				
			||||||
	phase_B_current_raw = (adc_res[1] - Motor1.Voffset_lsb.B)*-1;
 | 
						phase_B_current_raw = (adc1_res[1] - Motor1.Voffset_lsb.B)*-1;
 | 
				
			||||||
	// Covert from LSB to PU (A) and filter out small readings
 | 
						// Covert from LSB to PU (A) and filter out small readings
 | 
				
			||||||
	Motor1.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
 | 
						Motor1.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
 | 
				
			||||||
	Motor1.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
 | 
						Motor1.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
 | 
				
			||||||
| 
						 | 
					@ -32,8 +32,8 @@ void process_currents()
 | 
				
			||||||
	Motor1.Iphase_pu.C = -Motor1.Iphase_pu.A - Motor1.Iphase_pu.B;
 | 
						Motor1.Iphase_pu.C = -Motor1.Iphase_pu.A - Motor1.Iphase_pu.B;
 | 
				
			||||||
	
 | 
						
 | 
				
			||||||
	/* Motor 2 negative is A instead of B*/ 
 | 
						/* Motor 2 negative is A instead of B*/ 
 | 
				
			||||||
	phase_A_current_raw = (adc_res[2] - Motor2.Voffset_lsb.A);
 | 
						phase_A_current_raw = (adc1_res[2] - Motor2.Voffset_lsb.A);
 | 
				
			||||||
	phase_B_current_raw = (adc_res[3] - Motor2.Voffset_lsb.B)*-1;
 | 
						phase_B_current_raw = (adc1_res[3] - Motor2.Voffset_lsb.B)*-1;
 | 
				
			||||||
	// Covert from LSB to PU (A) and filter out small readings
 | 
						// Covert from LSB to PU (A) and filter out small readings
 | 
				
			||||||
	Motor2.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
 | 
						Motor2.Iphase_pu.A = phase_A_current_raw * LSB_TO_PU;
 | 
				
			||||||
	Motor2.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
 | 
						Motor2.Iphase_pu.B = phase_B_current_raw * LSB_TO_PU;
 | 
				
			||||||
| 
						 | 
					@ -218,7 +218,7 @@ int main(void)
 | 
				
			||||||
	atmel_start_init();
 | 
						atmel_start_init();
 | 
				
			||||||
	__disable_irq();
 | 
						__disable_irq();
 | 
				
			||||||
	BldcInitStruct(&Motor1, &FH_22mm24BXTR);
 | 
						BldcInitStruct(&Motor1, &FH_22mm24BXTR);
 | 
				
			||||||
	BldcInitStruct(&Motor2, &FH_22mm24BXTR_temp);
 | 
						BldcInitStruct(&Motor2, &FH_22mm24BXTR);
 | 
				
			||||||
	Motor1.readHall = &readHallSensorM1;
 | 
						Motor1.readHall = &readHallSensorM1;
 | 
				
			||||||
	Motor2.readHall = &readHallSensorM2;
 | 
						Motor2.readHall = &readHallSensorM2;
 | 
				
			||||||
	read_zero_current_offset_value(&Motor1, &Motor2);
 | 
						read_zero_current_offset_value(&Motor1, &Motor2);
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -119,8 +119,6 @@ static const uint16_t COMMUTATION_PATTERN[16] = {
 | 
				
			||||||
// ----------------------------------------------------------------------
 | 
					// ----------------------------------------------------------------------
 | 
				
			||||||
typedef struct
 | 
					typedef struct
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	struct pwm_descriptor const *pwm_desc;
 | 
					 | 
				
			||||||
	void *const speedtimer_hw;
 | 
					 | 
				
			||||||
	const uint16_t motor_Poles;          
 | 
						const uint16_t motor_Poles;          
 | 
				
			||||||
	const uint16_t motor_polePairs;
 | 
						const uint16_t motor_polePairs;
 | 
				
			||||||
	const uint16_t motor_commutationStates;
 | 
						const uint16_t motor_commutationStates;
 | 
				
			||||||
| 
						 | 
					@ -141,8 +139,6 @@ typedef struct
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* Small Motor - 2214S024BXTR*/
 | 
					/* Small Motor - 2214S024BXTR*/
 | 
				
			||||||
const static BLDCMotor_param_t FH_22mm24BXTR = {
 | 
					const static BLDCMotor_param_t FH_22mm24BXTR = {
 | 
				
			||||||
	.pwm_desc				       = &PWM_0,
 | 
					 | 
				
			||||||
	.speedtimer_hw			       = TC2,
 | 
					 | 
				
			||||||
	.motor_Poles			       = 14,
 | 
						.motor_Poles			       = 14,
 | 
				
			||||||
	.motor_polePairs		       = 7,
 | 
						.motor_polePairs		       = 7,
 | 
				
			||||||
	.motor_commutationStates       = 42,			 //polePairs * 6
 | 
						.motor_commutationStates       = 42,			 //polePairs * 6
 | 
				
			||||||
| 
						 | 
					@ -150,48 +146,22 @@ const static BLDCMotor_param_t FH_22mm24BXTR = {
 | 
				
			||||||
	.motor_LD_H				       = 0.003150,
 | 
						.motor_LD_H				       = 0.003150,
 | 
				
			||||||
	.motor_LQ_H				       = 0.003150,
 | 
						.motor_LQ_H				       = 0.003150,
 | 
				
			||||||
	.motor_Flux_WB			       = 0.001575,
 | 
						.motor_Flux_WB			       = 0.001575,
 | 
				
			||||||
	.motor_Max_Spd_RPM		       = 3000,
 | 
						.motor_Max_Spd_RPM		       = 2000,
 | 
				
			||||||
	.motor_MeasureRange_RPM	       = 3000 * 1.2,	//(1.2f * MOTOR_MAX_SPD_RPM)f   // give 20% headroom
 | 
						.motor_MeasureRange_RPM	       = 3000 * 1.2,	//(1.2f * MOTOR_MAX_SPD_RPM)f   // give 20% headroom
 | 
				
			||||||
	.motor_Max_Spd_ELEC			   = (3000/60)*7.0,		//(MOTOR_MAX_SPD_RPM/60)*MOTOR_POLEPAIRS
 | 
						.motor_Max_Spd_ELEC			   = (3000/60)*7.0,		//(MOTOR_MAX_SPD_RPM/60)*MOTOR_POLEPAIRS
 | 
				
			||||||
	//.motor_Max_Current_IDC_A	   = 0.368,
 | 
						//.motor_Max_Current_IDC_A	   = 0.368,
 | 
				
			||||||
	.motor_Max_Current_IDC_A	   = 0.180,
 | 
						.motor_Max_Current_IDC_A	   = 0.180,
 | 
				
			||||||
	.controller_param.Pid_Speed.Kp = 0.00008f,
 | 
						.controller_param.Pid_Speed.Kp = 0.00004f,
 | 
				
			||||||
	.controller_param.Pid_Speed.Ki = 0.0000001f,
 | 
						.controller_param.Pid_Speed.Ki = 0.0000001f,
 | 
				
			||||||
	//.controller_param.Pid_Speed.Ki = 0.0000001f,
 | 
						//.controller_param.Pid_Speed.Ki = 0.0000001f,
 | 
				
			||||||
	.controller_param.Pi_Pos.Kp	   = 50.0f,
 | 
						.controller_param.Pi_Pos.Kp	   = 50.0f,
 | 
				
			||||||
	.controller_param.Pi_Pos.Ki	   = 0.0f,
 | 
						.controller_param.Pi_Pos.Ki	   = 0.0f,
 | 
				
			||||||
	.motor_MaxPWM = 800.0,
 | 
						.motor_MaxPWM = 600.0,
 | 
				
			||||||
};
 | 
					 | 
				
			||||||
 | 
					 | 
				
			||||||
/* Small Motor - 2214S024BXTR*/
 | 
					 | 
				
			||||||
const static BLDCMotor_param_t FH_22mm24BXTR_temp = {
 | 
					 | 
				
			||||||
	.pwm_desc				       = &PWM_1,
 | 
					 | 
				
			||||||
	.speedtimer_hw			       = TC4,
 | 
					 | 
				
			||||||
	.motor_Poles			       = 14,
 | 
					 | 
				
			||||||
	.motor_polePairs		       = 7,
 | 
					 | 
				
			||||||
	.motor_commutationStates       = 42,			 //polePairs * 6
 | 
					 | 
				
			||||||
	.motor_RS_Ohm			       = 25.9,
 | 
					 | 
				
			||||||
	.motor_LD_H				       = 0.003150,
 | 
					 | 
				
			||||||
	.motor_LQ_H				       = 0.003150,
 | 
					 | 
				
			||||||
	.motor_Flux_WB			       = 0.001575,
 | 
					 | 
				
			||||||
	.motor_Max_Spd_RPM		       = 3000,
 | 
					 | 
				
			||||||
	.motor_MeasureRange_RPM	       = 3000 * 1.2,	//(1.2f * MOTOR_MAX_SPD_RPM)f   // give 20% headroom
 | 
					 | 
				
			||||||
	.motor_Max_Spd_ELEC			   = (3000/60)*7.0,		//(MOTOR_MAX_SPD_RPM/60)*MOTOR_POLEPAIRS
 | 
					 | 
				
			||||||
	//.motor_Max_Current_IDC_A	   = 0.368,
 | 
					 | 
				
			||||||
	.motor_Max_Current_IDC_A	   = 0.180,
 | 
					 | 
				
			||||||
	.controller_param.Pid_Speed.Kp = 0.00008f,
 | 
					 | 
				
			||||||
	.controller_param.Pid_Speed.Ki = 0.0000001f,
 | 
					 | 
				
			||||||
	//.controller_param.Pid_Speed.Ki = 0.0000001f,
 | 
					 | 
				
			||||||
	.controller_param.Pi_Pos.Kp	   = 50.0f,
 | 
					 | 
				
			||||||
	.controller_param.Pi_Pos.Ki	   = 0.0f,
 | 
					 | 
				
			||||||
	.motor_MaxPWM = 800.0,
 | 
					 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* Big Motor - 3216W012BXTR */
 | 
					/* Big Motor - 3216W012BXTR */
 | 
				
			||||||
const static BLDCMotor_param_t FH_32mm12BXTR = {
 | 
					const static BLDCMotor_param_t FH_32mm12BXTR = {
 | 
				
			||||||
	.pwm_desc					   = &PWM_1,
 | 
					 | 
				
			||||||
	.speedtimer_hw				   = TC4,
 | 
					 | 
				
			||||||
	.motor_Poles				   = 14,
 | 
						.motor_Poles				   = 14,
 | 
				
			||||||
	.motor_polePairs			   = 7,
 | 
						.motor_polePairs			   = 7,
 | 
				
			||||||
	.motor_commutationStates	   = 42,			 //polePairs * 6
 | 
						.motor_commutationStates	   = 42,			 //polePairs * 6
 | 
				
			||||||
| 
						 | 
					@ -216,8 +186,6 @@ const static BLDCMotor_param_t FH_32mm12BXTR = {
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* Big Motor - 3216W024BXTR */
 | 
					/* Big Motor - 3216W024BXTR */
 | 
				
			||||||
const static BLDCMotor_param_t FH_32mm24BXTR = {
 | 
					const static BLDCMotor_param_t FH_32mm24BXTR = {
 | 
				
			||||||
	.pwm_desc					   = &PWM_1,
 | 
					 | 
				
			||||||
	.speedtimer_hw				   = TC4,
 | 
					 | 
				
			||||||
	.motor_Poles				   = 14,
 | 
						.motor_Poles				   = 14,
 | 
				
			||||||
	.motor_polePairs			   = 7,
 | 
						.motor_polePairs			   = 7,
 | 
				
			||||||
	.motor_commutationStates	   = 42,			 //polePairs * 6
 | 
						.motor_commutationStates	   = 42,			 //polePairs * 6
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
		Loading…
	
		Reference in New Issue